Patch cuda.cpp with cloudy's fix
This commit is contained in:
@@ -1,3 +1,6 @@
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// patched cuda.cpp for cuda13 by cloudy
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#include <cuda_runtime.h>
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#include <cuda_runtime.h>
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#include <cstring>
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#include <cstring>
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#include <cstdlib>
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#include <cstdlib>
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@@ -14,25 +17,20 @@ bool print_gpu_cuda(struct gpu_info* gpu) {
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char* cc = get_str_cc(gpu->arch);
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char* cc = get_str_cc(gpu->arch);
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printf("%s (Compute Capability %s)\n", gpu->name, cc);
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printf("%s (Compute Capability %s)\n", gpu->name, cc);
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free(cc);
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free(cc);
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return true;
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return true;
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}
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}
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struct cache* get_cache_info(cudaDeviceProp prop) {
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struct cache* get_cache_info(cudaDeviceProp prop) {
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struct cache* cach = (struct cache*) emalloc(sizeof(struct cache));
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struct cache* cach = (struct cache*) emalloc(sizeof(struct cache));
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cach->L2 = (struct cach*) emalloc(sizeof(struct cach));
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cach->L2 = (struct cach*) emalloc(sizeof(struct cach));
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cach->L2->size = prop.l2CacheSize;
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cach->L2->size = prop.l2CacheSize;
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cach->L2->num_caches = 1;
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cach->L2->num_caches = 1;
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cach->L2->exists = true;
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cach->L2->exists = true;
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return cach;
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return cach;
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}
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}
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int get_tensor_cores(struct uarch* arch, int sm, int major) {
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int get_tensor_cores(struct uarch* arch, int sm, int major) {
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if(major == 7) {
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if(major == 7) {
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// TU116 does not have tensor cores!
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// https://www.anandtech.com/show/13973/nvidia-gtx-1660-ti-review-feat-evga-xc-gaming/2
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if (is_chip_TU116(arch))
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if (is_chip_TU116(arch))
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return 0;
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return 0;
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return sm * 8;
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return sm * 8;
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@@ -43,57 +41,57 @@ int get_tensor_cores(struct uarch* arch, int sm, int major) {
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struct topology_c* get_topology_info(struct uarch* arch, cudaDeviceProp prop) {
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struct topology_c* get_topology_info(struct uarch* arch, cudaDeviceProp prop) {
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struct topology_c* topo = (struct topology_c*) emalloc(sizeof(struct topology_c));
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struct topology_c* topo = (struct topology_c*) emalloc(sizeof(struct topology_c));
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topo->streaming_mp = prop.multiProcessorCount;
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topo->streaming_mp = prop.multiProcessorCount;
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topo->cores_per_mp = _ConvertSMVer2Cores(prop.major, prop.minor);
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topo->cores_per_mp = _ConvertSMVer2Cores(prop.major, prop.minor);
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topo->cuda_cores = topo->streaming_mp * topo->cores_per_mp;
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topo->cuda_cores = topo->streaming_mp * topo->cores_per_mp;
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topo->tensor_cores = get_tensor_cores(arch, topo->streaming_mp, prop.major);
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topo->tensor_cores = get_tensor_cores(arch, topo->streaming_mp, prop.major);
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return topo;
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return topo;
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}
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}
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int32_t guess_clock_multipilier(struct gpu_info* gpu, struct memory* mem) {
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int32_t guess_clock_multipilier(struct gpu_info* gpu, struct memory* mem) {
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// Guess clock multiplier
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int32_t clk_mul = 1;
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int32_t clk_mul = 1;
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int32_t clk8 = abs((mem->freq/8) - gpu->freq);
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int32_t clk8 = abs((mem->freq/8) - gpu->freq);
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int32_t clk4 = abs((mem->freq/4) - gpu->freq);
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int32_t clk4 = abs((mem->freq/4) - gpu->freq);
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int32_t clk2 = abs((mem->freq/2) - gpu->freq);
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int32_t clk2 = abs((mem->freq/2) - gpu->freq);
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int32_t clk1 = abs((mem->freq/1) - gpu->freq);
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int32_t clk1 = abs((mem->freq/1) - gpu->freq);
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int32_t min = mem->freq;
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int32_t min = mem->freq;
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if(clkm_possible_for_uarch(8, gpu->arch) && min > clk8) { clk_mul = 8; min = clk8; }
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if(clkm_possible_for_uarch(8, gpu->arch) && min > clk8) { clk_mul = 8; min = clk8; }
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if(clkm_possible_for_uarch(4, gpu->arch) && min > clk4) { clk_mul = 4; min = clk4; }
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if(clkm_possible_for_uarch(4, gpu->arch) && min > clk4) { clk_mul = 4; min = clk4; }
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if(clkm_possible_for_uarch(2, gpu->arch) && min > clk2) { clk_mul = 2; min = clk2; }
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if(clkm_possible_for_uarch(2, gpu->arch) && min > clk2) { clk_mul = 2; min = clk2; }
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if(clkm_possible_for_uarch(1, gpu->arch) && min > clk1) { clk_mul = 1; min = clk1; }
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if(clkm_possible_for_uarch(1, gpu->arch) && min > clk1) { clk_mul = 1; min = clk1; }
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return clk_mul;
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return clk_mul;
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}
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}
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struct memory* get_memory_info(struct gpu_info* gpu, cudaDeviceProp prop) {
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struct memory* get_memory_info(struct gpu_info* gpu, cudaDeviceProp prop) {
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struct memory* mem = (struct memory*) emalloc(sizeof(struct memory));
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struct memory* mem = (struct memory*) emalloc(sizeof(struct memory));
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int val = 0;
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mem->size_bytes = (unsigned long long) prop.totalGlobalMem;
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mem->size_bytes = (unsigned long long) prop.totalGlobalMem;
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mem->freq = prop.memoryClockRate * 0.001f;
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if (cudaDeviceGetAttribute(&val, cudaDevAttrMemoryClockRate, gpu->idx) == cudaSuccess) {
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if (val > 1000000)
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mem->freq = (float)val / 1000000.0f;
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else
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mem->freq = (float)val * 0.001f;
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} else {
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mem->freq = 0.0f;
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}
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mem->bus_width = prop.memoryBusWidth;
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mem->bus_width = prop.memoryBusWidth;
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mem->clk_mul = guess_clock_multipilier(gpu, mem);
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mem->clk_mul = guess_clock_multipilier(gpu, mem);
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mem->type = guess_memtype_from_cmul_and_uarch(mem->clk_mul, gpu->arch);
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mem->type = guess_memtype_from_cmul_and_uarch(mem->clk_mul, gpu->arch);
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// Fix frequency returned from CUDA to show real frequency
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if (mem->clk_mul > 0)
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mem->freq = mem->freq / mem->clk_mul;
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mem->freq = mem->freq / mem->clk_mul;
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return mem;
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return mem;
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}
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}
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// Compute peak performance when using CUDA cores
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int64_t get_peak_performance_cuda(struct gpu_info* gpu) {
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int64_t get_peak_performance_cuda(struct gpu_info* gpu) {
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return gpu->freq * 1000000 * gpu->topo_c->cuda_cores * 2;
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return gpu->freq * 1000000 * gpu->topo_c->cuda_cores * 2;
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}
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}
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// Compute peak performance when using tensor cores
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int64_t get_peak_performance_tcu(cudaDeviceProp prop, struct gpu_info* gpu) {
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int64_t get_peak_performance_tcu(cudaDeviceProp prop, struct gpu_info* gpu) {
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// Volta / Turing tensor cores performs 4x4x4 FP16 matrix multiplication
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// Ampere tensor cores performs 8x4x8 FP16 matrix multiplicacion
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if(prop.major == 7) return gpu->freq * 1000000 * 4 * 4 * 4 * 2 * gpu->topo_c->tensor_cores;
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if(prop.major == 7) return gpu->freq * 1000000 * 4 * 4 * 4 * 2 * gpu->topo_c->tensor_cores;
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else if(prop.major == 8) return gpu->freq * 1000000 * 8 * 4 * 8 * 2 * gpu->topo_c->tensor_cores;
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else if(prop.major == 8) return gpu->freq * 1000000 * 8 * 4 * 8 * 2 * gpu->topo_c->tensor_cores;
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else return 0;
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else return 0;
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@@ -115,8 +113,7 @@ struct gpu_info* get_gpu_info_cuda(struct pci_dev *devices, int gpu_idx) {
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}
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}
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int num_gpus = -1;
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int num_gpus = -1;
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cudaError_t err = cudaSuccess;
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cudaError_t err = cudaGetDeviceCount(&num_gpus);
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err = cudaGetDeviceCount(&num_gpus);
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if(gpu_idx == 0) {
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if(gpu_idx == 0) {
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printf("\r%*c\r", (int) strlen(CUDA_DRIVER_START_WARNING), ' ');
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printf("\r%*c\r", (int) strlen(CUDA_DRIVER_START_WARNING), ' ');
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@@ -134,7 +131,6 @@ struct gpu_info* get_gpu_info_cuda(struct pci_dev *devices, int gpu_idx) {
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}
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}
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if(gpu->idx+1 > num_gpus) {
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if(gpu->idx+1 > num_gpus) {
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// Master is trying to query an invalid GPU
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return NULL;
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return NULL;
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}
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}
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@@ -144,15 +140,25 @@ struct gpu_info* get_gpu_info_cuda(struct pci_dev *devices, int gpu_idx) {
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return NULL;
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return NULL;
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}
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}
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gpu->freq = deviceProp.clockRate * 1e-3f;
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int core_clk = 0;
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if (cudaDeviceGetAttribute(&core_clk, cudaDevAttrClockRate, gpu->idx) == cudaSuccess) {
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if (core_clk > 1000000)
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gpu->freq = core_clk / 1000000.0f;
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else
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gpu->freq = core_clk * 0.001f;
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} else {
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gpu->freq = 0.0f;
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}
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gpu->vendor = GPU_VENDOR_NVIDIA;
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gpu->vendor = GPU_VENDOR_NVIDIA;
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gpu->name = (char *) emalloc(sizeof(char) * (strlen(deviceProp.name) + 1));
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gpu->name = (char *) emalloc(strlen(deviceProp.name) + 1);
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strcpy(gpu->name, deviceProp.name);
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strcpy(gpu->name, deviceProp.name);
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if((gpu->pci = get_pci_from_pciutils(devices, PCI_VENDOR_ID_NVIDIA, gpu_idx)) == NULL) {
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if((gpu->pci = get_pci_from_pciutils(devices, PCI_VENDOR_ID_NVIDIA, gpu_idx)) == NULL) {
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printErr("Unable to find a valid device for vendor id 0x%.4X using pciutils", PCI_VENDOR_ID_NVIDIA);
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printErr("Unable to find a valid device for vendor id 0x%.4X using pciutils", PCI_VENDOR_ID_NVIDIA);
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return NULL;
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return NULL;
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}
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}
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gpu->arch = get_uarch_from_cuda(gpu);
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gpu->arch = get_uarch_from_cuda(gpu);
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gpu->cach = get_cache_info(deviceProp);
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gpu->cach = get_cache_info(deviceProp);
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gpu->mem = get_memory_info(gpu, deviceProp);
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gpu->mem = get_memory_info(gpu, deviceProp);
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@@ -163,19 +169,7 @@ struct gpu_info* get_gpu_info_cuda(struct pci_dev *devices, int gpu_idx) {
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return gpu;
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return gpu;
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}
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}
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char* get_str_sm(struct gpu_info* gpu) {
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char* get_str_sm(struct gpu_info* gpu) { return get_str_generic(gpu->topo_c->streaming_mp); }
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return get_str_generic(gpu->topo_c->streaming_mp);
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char* get_str_cores_sm(struct gpu_info* gpu) { return get_str_generic(gpu->topo_c->cores_per_mp); }
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}
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char* get_str_cuda_cores(struct gpu_info* gpu) { return get_str_generic(gpu->topo_c->cuda_cores); }
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char* get_str_tensor_cores(struct gpu_info* gpu) { return get_str_generic(gpu->topo_c->tensor_cores); }
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char* get_str_cores_sm(struct gpu_info* gpu) {
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return get_str_generic(gpu->topo_c->cores_per_mp);
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}
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char* get_str_cuda_cores(struct gpu_info* gpu) {
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return get_str_generic(gpu->topo_c->cuda_cores);
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}
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char* get_str_tensor_cores(struct gpu_info* gpu) {
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return get_str_generic(gpu->topo_c->tensor_cores);
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}
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