4 Commits

Author SHA1 Message Date
Dr-Noob
fc7c46a389 Minor improvements 2025-10-16 07:23:50 +02:00
Dr-Noob
66387ab7a7 Fix 2025-10-15 08:46:05 +02:00
Dr-Noob
d24a737317 Fix 2025-10-15 08:43:40 +02:00
Dr-Noob
62e358a017 Supporting cases where rocm-cmake is not installed 2025-10-15 08:39:24 +02:00
12 changed files with 122 additions and 238 deletions

View File

@@ -10,10 +10,9 @@ set(CUDA_DIR "${SRC_DIR}/cuda")
set(HSA_DIR "${SRC_DIR}/hsa")
set(INTEL_DIR "${SRC_DIR}/intel")
# Make sure that at least one backend is enabled.
# It does not make sense that the user has not specified any backend.
if(NOT ENABLE_INTEL_BACKEND AND NOT ENABLE_CUDA_BACKEND AND NOT ENABLE_HSA_BACKEND)
message(FATAL_ERROR "No backend was enabled! Please enable at least one backend with -DENABLE_XXX_BACKEND")
# Enable Intel backend by default
if(NOT DEFINED ENABLE_INTEL_BACKEND)
set(ENABLE_INTEL_BACKEND true)
endif()
if(ENABLE_CUDA_BACKEND)
@@ -67,32 +66,9 @@ if(ENABLE_HSA_BACKEND)
endif()
endif()
set(GPUFECH_COMMON
${COMMON_DIR}/main.cpp
${COMMON_DIR}/args.cpp
${COMMON_DIR}/gpu.cpp
${COMMON_DIR}/global.cpp
${COMMON_DIR}/printer.cpp
${COMMON_DIR}/master.cpp
${COMMON_DIR}/uarch.cpp
)
set(GPUFETCH_LINK_TARGETS z)
if(NOT(ENABLE_HSA_BACKEND AND NOT ENABLE_CUDA_BACKEND AND NOT ENABLE_INTEL_BACKEND))
# Look for pciutils only if not building HSA only.
#
# This has the (intented) secondary effect that if only HSA backend is enabled
# by the user, but ROCm cannot be found, pciutils will still be compiled in
# order to show the list of GPUs available on the system, so that the user will
# get at least some feedback even if HSA is not found.
list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_LIST_DIR}/cmake")
list(APPEND GPUFECH_COMMON ${COMMON_DIR}/pci.cpp ${COMMON_DIR}/sort.cpp)
list(APPEND GPUFETCH_LINK_TARGETS pci)
set(CMAKE_ENABLE_PCIUTILS ON)
find_package(PCIUTILS)
if(NOT ${PCIUTILS_FOUND})
list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_LIST_DIR}/cmake")
find_package(PCIUTILS)
if(NOT ${PCIUTILS_FOUND})
message(STATUS "${BoldYellow}pciutils not found, downloading and building a local copy...${ColorReset}")
# Download and build pciutils
@@ -107,23 +83,18 @@ if(NOT(ENABLE_HSA_BACKEND AND NOT ENABLE_CUDA_BACKEND AND NOT ENABLE_INTEL_BACKE
include_directories(${PCIUTILS_INSTALL_LOCATION}/include)
link_directories(${PCIUTILS_INSTALL_LOCATION}/lib)
else()
else()
include_directories(${PCIUTILS_INCLUDE_DIR})
link_libraries(${PCIUTILS_LIBRARIES})
# Needed for linking libpci in FreeBSD
link_directories(/usr/local/lib/)
endif()
endif()
add_executable(gpufetch ${GPUFECH_COMMON})
add_executable(gpufetch ${COMMON_DIR}/main.cpp ${COMMON_DIR}/args.cpp ${COMMON_DIR}/gpu.cpp ${COMMON_DIR}/pci.cpp ${COMMON_DIR}/sort.cpp ${COMMON_DIR}/global.cpp ${COMMON_DIR}/printer.cpp ${COMMON_DIR}/master.cpp ${COMMON_DIR}/uarch.cpp)
set(SANITY_FLAGS -Wfloat-equal -Wshadow -Wpointer-arith -Wall -Wextra -pedantic -fstack-protector-all -pedantic)
target_compile_features(gpufetch PRIVATE cxx_std_11)
target_compile_options(gpufetch PRIVATE ${SANITY_FLAGS})
if (CMAKE_ENABLE_PCIUTILS)
target_compile_definitions(gpufetch PUBLIC BACKEND_USE_PCI)
endif()
if(ENABLE_INTEL_BACKEND)
target_compile_definitions(gpufetch PUBLIC BACKEND_INTEL)
@@ -185,7 +156,7 @@ if(ENABLE_HSA_BACKEND)
target_link_libraries(gpufetch hsa_backend)
endif()
target_link_libraries(gpufetch ${GPUFETCH_LINK_TARGETS})
target_link_libraries(gpufetch pci z)
install(TARGETS gpufetch DESTINATION bin)
if(NOT WIN32)

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@@ -1,24 +1,5 @@
#!/bin/bash
print_help() {
cat << EOF
Usage: $0 <backends> [build_type]
<backends> MANDATORY. Comma-separated list of
backends to enable.
Valid options: hsa, intel, cuda
Example: hsa,cuda
[build_type] OPTIONAL. Build type. Valid options:
debug, release (default: release)
Examples:
$0 hsa,intel debug
$0 cuda
$0 hsa,intel,cuda release
EOF
}
# gpufetch build script
set -e
@@ -26,79 +7,19 @@ rm -rf build/ gpufetch
mkdir build/
cd build/
if [ "$1" == "--help" ]
if [ "$1" == "debug" ]
then
echo "gpufetch build script"
echo
print_help
exit 0
fi
if [[ $# -lt 1 ]]; then
echo "ERROR: At least one backend must be specified."
echo
print_help
exit 1
fi
# Determine if last argument is build type
LAST_ARG="${!#}"
if [[ "$LAST_ARG" == "debug" || "$LAST_ARG" == "release" ]]; then
BUILD_TYPE="$LAST_ARG"
BACKEND_ARG="${1}"
BUILD_TYPE="Debug"
else
BUILD_TYPE="release"
BACKEND_ARG="${1}"
BUILD_TYPE="Release"
fi
# Split comma-separated backends into an array
IFS=',' read -r -a BACKENDS <<< "$BACKEND_ARG"
# Validate build type
if [[ "$BUILD_TYPE" != "debug" && "$BUILD_TYPE" != "release" ]]
then
echo "Error: Invalid build type '$BUILD_TYPE'."
echo "Valid options are: debug, release"
exit 1
fi
# From lower to upper case
CMAKE_FLAGS="-DCMAKE_BUILD_TYPE=${BUILD_TYPE^}"
# Validate backends
VALID_BACKENDS=("hsa" "intel" "cuda")
for BACKEND in "${BACKENDS[@]}"; do
case "$BACKEND" in
hsa)
CMAKE_FLAGS+=" -DENABLE_HSA_BACKEND=ON"
;;
intel)
CMAKE_FLAGS+=" -DENABLE_INTEL_BACKEND=ON"
;;
cuda)
CMAKE_FLAGS+=" -DENABLE_CUDA_BACKEND=ON"
;;
*)
echo "ERROR: Invalid backend '$BACKEND'."
echo "Valid options: ${VALID_BACKENDS[*]}"
exit 1
;;
esac
done
# You can also manually specify the compilation flags.
# If you need to, just run the cmake command directly
# instead of using this script.
#
# Here you will find some help:
#
# In case you have CUDA installed but it is not detected,
# - set CMAKE_CUDA_COMPILER to your nvcc binary:
# - set CMAKE_CUDA_COMPILER_TOOLKIT_ROOT to the CUDA root dir
# for example:
# cmake -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_CUDA_COMPILER=/usr/local/cuda/bin/nvcc -DCMAKE_CUDA_COMPILER_TOOLKIT_ROOT=/usr/local/cuda/ ..
#
# In case you want to explicitely disable a backend, you can:
# Disable CUDA backend:
# cmake -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DENABLE_CUDA_BACKEND=OFF ..
@@ -107,9 +28,7 @@ done
# Disable Intel backend:
# cmake -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DENABLE_INTEL_BACKEND=OFF ..
echo "$0: Running cmake $CMAKE_FLAGS"
echo
cmake $CMAKE_FLAGS ..
cmake -DCMAKE_BUILD_TYPE=$BUILD_TYPE ..
os=$(uname)
if [ "$os" == 'Linux' ]; then

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@@ -3,6 +3,8 @@
#include <cstdint>
#include "../cuda/pci.hpp"
#define UNKNOWN_FREQ -1
enum {

View File

@@ -8,10 +8,6 @@
#include "../cuda/cuda.hpp"
#include "../cuda/uarch.hpp"
#ifdef BACKEND_USE_PCI
#include "pci.hpp"
#endif
static const char* VERSION = "0.30";
void print_help(char *argv[]) {
@@ -83,12 +79,8 @@ int main(int argc, char* argv[]) {
}
if(get_num_gpus_available(list) == 0) {
#ifdef BACKEND_USE_PCI
printErr("No GPU was detected! Available GPUs are:");
print_gpus_list_pci();
#else
printErr("No GPU was detected!");
#endif
printf("Please, make sure that the appropiate backend is enabled:\n");
print_enabled_backends();
printf("Visit https://github.com/Dr-Noob/gpufetch#2-backends for more information\n");

View File

@@ -1,10 +1,7 @@
#include <cstdlib>
#include <cstdio>
#ifdef BACKEND_USE_PCI
#include "pci.hpp"
#endif
#include "pci.hpp"
#include "global.hpp"
#include "colors.hpp"
#include "master.hpp"
@@ -22,9 +19,7 @@ struct gpu_list {
struct gpu_list* get_gpu_list() {
int idx = 0;
#ifdef BACKEND_USE_PCI
struct pci_dev *devices = get_pci_devices_from_pciutils();
#endif
struct gpu_list* list = (struct gpu_list*) malloc(sizeof(struct gpu_list));
list->num_gpus = 0;
list->gpus = (struct gpu_info**) malloc(sizeof(struct info*) * MAX_GPUS);
@@ -45,7 +40,7 @@ struct gpu_list* get_gpu_list() {
bool valid = true;
while(valid) {
list->gpus[idx] = get_gpu_info_hsa(idx);
list->gpus[idx] = get_gpu_info_hsa(devices, idx);
if(list->gpus[idx] != NULL) idx++;
else valid = false;
}

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@@ -32,54 +32,64 @@
#define MAX_ATTRIBUTES 100
#define MAX_TERM_SIZE 1024
typedef struct {
int id;
const char *name;
const char *shortname;
} AttributeField;
// AttributeField IDs
// Used by
enum {
ATTRIBUTE_NAME, // ALL
ATTRIBUTE_CHIP, // ALL
ATTRIBUTE_UARCH, // ALL
ATTRIBUTE_TECHNOLOGY, // ALL
ATTRIBUTE_FREQUENCY, // ALL
ATTRIBUTE_PEAK, // ALL
ATTRIBUTE_COMPUTE_UNITS, // HSA
ATTRIBUTE_STREAMINGMP, // CUDA
ATTRIBUTE_CORESPERMP, // CUDA
ATTRIBUTE_CUDA_CORES, // CUDA
ATTRIBUTE_TENSOR_CORES, // CUDA
ATTRIBUTE_L2, // CUDA
ATTRIBUTE_MEMORY, // CUDA
ATTRIBUTE_MEMORY_FREQ, // CUDA
ATTRIBUTE_BUS_WIDTH, // CUDA
ATTRIBUTE_PEAK_TENSOR, // CUDA
ATTRIBUTE_EUS, // Intel
ATTRIBUTE_GT, // Intel
ATTRIBUTE_NAME,
ATTRIBUTE_CHIP,
ATTRIBUTE_UARCH,
ATTRIBUTE_TECHNOLOGY,
ATTRIBUTE_GT,
ATTRIBUTE_FREQUENCY,
ATTRIBUTE_STREAMINGMP,
ATTRIBUTE_CORESPERMP,
ATTRIBUTE_CUDA_CORES,
ATTRIBUTE_TENSOR_CORES,
ATTRIBUTE_EUS,
ATTRIBUTE_L2,
ATTRIBUTE_MEMORY,
ATTRIBUTE_MEMORY_FREQ,
ATTRIBUTE_BUS_WIDTH,
ATTRIBUTE_PEAK,
ATTRIBUTE_PEAK_TENSOR,
};
static const AttributeField ATTRIBUTE_INFO[] = {
{ ATTRIBUTE_NAME, "Name:", "Name:" },
{ ATTRIBUTE_CHIP, "GPU processor:", "Processor:" },
{ ATTRIBUTE_UARCH, "Microarchitecture:", "uArch:" },
{ ATTRIBUTE_TECHNOLOGY, "Technology:", "Technology:" },
{ ATTRIBUTE_FREQUENCY, "Max Frequency:", "Max Freq.:" },
{ ATTRIBUTE_PEAK, "Peak Performance:", "Peak Perf.:" },
{ ATTRIBUTE_COMPUTE_UNITS, "Compute Units (CUs):", "CUs" },
{ ATTRIBUTE_STREAMINGMP, "SMs:", "SMs:" },
{ ATTRIBUTE_CORESPERMP, "Cores/SM:", "Cores/SM:" },
{ ATTRIBUTE_CUDA_CORES, "CUDA Cores:", "CUDA Cores:" },
{ ATTRIBUTE_TENSOR_CORES, "Tensor Cores:", "Tensor Cores:" },
{ ATTRIBUTE_L2, "L2 Size:", "L2 Size:" },
{ ATTRIBUTE_MEMORY, "Memory:", "Memory:" },
{ ATTRIBUTE_MEMORY_FREQ, "Memory frequency:", "Memory freq.:" },
{ ATTRIBUTE_BUS_WIDTH, "Bus width:", "Bus width:" },
{ ATTRIBUTE_PEAK_TENSOR, "Peak Performance (MMA):", "Peak Perf.(MMA):" },
{ ATTRIBUTE_EUS, "Execution Units:", "EUs:" },
{ ATTRIBUTE_GT, "Graphics Tier:", "GT:" },
static const char* ATTRIBUTE_FIELDS [] = {
"Name:",
"GPU processor:",
"Microarchitecture:",
"Technology:",
"Graphics Tier:",
"Max Frequency:",
"SMs:",
"Cores/SM:",
"CUDA Cores:",
"Tensor Cores:",
"Execution Units:",
"L2 Size:",
"Memory:",
"Memory frequency:",
"Bus width:",
"Peak Performance:",
"Peak Performance (MMA):",
};
static const char* ATTRIBUTE_FIELDS_SHORT [] = {
"Name:",
"Processor:",
"uArch:",
"Technology:",
"GT:",
"Max Freq.:",
"SMs:",
"Cores/SM:",
"CUDA Cores:",
"Tensor Cores:",
"EUs:",
"L2 Size:",
"Memory:",
"Memory freq.:",
"Bus width:",
"Peak Perf.:",
"Peak Perf.(MMA):",
};
struct terminal {
@@ -197,6 +207,8 @@ bool ascii_fits_screen(int termw, struct ascii_logo logo, int lf) {
void replace_bgbyfg_color(struct ascii_logo* logo) {
// Replace background by foreground color
for(int i=0; i < 2; i++) {
if(logo->color_ascii[i] == NULL) break;
if(strcmp(logo->color_ascii[i], C_BG_BLACK) == 0) strcpy(logo->color_ascii[i], C_FG_BLACK);
else if(strcmp(logo->color_ascii[i], C_BG_RED) == 0) strcpy(logo->color_ascii[i], C_FG_RED);
else if(strcmp(logo->color_ascii[i], C_BG_GREEN) == 0) strcpy(logo->color_ascii[i], C_FG_GREEN);
@@ -264,14 +276,13 @@ void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* ter
}
}
uint32_t longest_attribute_length(struct ascii* art, bool use_short) {
uint32_t longest_attribute_length(struct ascii* art, const char** attribute_fields) {
uint32_t max = 0;
uint64_t len = 0;
for(uint32_t i=0; i < art->n_attributes_set; i++) {
if(art->attributes[i]->value != NULL) {
const char* str = use_short ? ATTRIBUTE_INFO[art->attributes[i]->type].shortname : ATTRIBUTE_INFO[art->attributes[i]->type].name;
len = strlen(str);
len = strlen(attribute_fields[art->attributes[i]->type]);
if(len > max) max = len;
}
}
@@ -295,7 +306,7 @@ uint32_t longest_field_length(struct ascii* art, int la) {
return max;
}
void print_ascii_generic(struct ascii* art, uint32_t la, int32_t text_space, bool use_short) {
void print_ascii_generic(struct ascii* art, uint32_t la, int32_t text_space, const char** attribute_fields) {
struct ascii_logo* logo = art->art;
int attr_to_print = 0;
int attr_type;
@@ -339,13 +350,11 @@ void print_ascii_generic(struct ascii* art, uint32_t la, int32_t text_space, boo
attr_value = art->attributes[attr_to_print]->value;
attr_to_print++;
const char* attr_str = use_short ? ATTRIBUTE_INFO[attr_type].shortname : ATTRIBUTE_INFO[attr_type].name;
space_right = 1 + (la - strlen(attr_str));
space_right = 1 + (la - strlen(attribute_fields[attr_type]));
current_space = max(0, text_space);
printf("%s%.*s%s", logo->color_text[0], current_space, attr_str, art->reset);
current_space = max(0, current_space - (int) strlen(attr_str));
printf("%s%.*s%s", logo->color_text[0], current_space, attribute_fields[attr_type], art->reset);
current_space = max(0, current_space - (int) strlen(attribute_fields[attr_type]));
printf("%*s", min(current_space, space_right), "");
current_space = max(0, current_space - min(current_space, space_right));
printf("%s%.*s%s", logo->color_text[1], current_space, attr_value, art->reset);
@@ -379,19 +388,19 @@ bool print_gpufetch_intel(struct gpu_info* gpu, STYLE s, struct color** cs, stru
setAttribute(art, ATTRIBUTE_EUS, eus);
setAttribute(art, ATTRIBUTE_PEAK, pp);
bool use_short = false;
uint32_t longest_attribute = longest_attribute_length(art, use_short);
const char** attribute_fields = ATTRIBUTE_FIELDS;
uint32_t longest_attribute = longest_attribute_length(art, attribute_fields);
uint32_t longest_field = longest_field_length(art, longest_attribute);
choose_ascii_art(art, cs, term, longest_field);
if(!ascii_fits_screen(term->w, *art->art, longest_field)) {
// Despite of choosing the smallest logo, the output does not fit
// Choose the shorter field names and recalculate the longest attr
use_short = true;
longest_attribute = longest_attribute_length(art, use_short);
attribute_fields = ATTRIBUTE_FIELDS_SHORT;
longest_attribute = longest_attribute_length(art, attribute_fields);
}
print_ascii_generic(art, longest_attribute, term->w - art->art->width, use_short);
print_ascii_generic(art, longest_attribute, term->w - art->art->width, attribute_fields);
return true;
}
@@ -448,19 +457,19 @@ bool print_gpufetch_cuda(struct gpu_info* gpu, STYLE s, struct color** cs, struc
setAttribute(art, ATTRIBUTE_PEAK_TENSOR, pp_tensor);
}
bool use_short = false;
uint32_t longest_attribute = longest_attribute_length(art, use_short);
const char** attribute_fields = ATTRIBUTE_FIELDS;
uint32_t longest_attribute = longest_attribute_length(art, attribute_fields);
uint32_t longest_field = longest_field_length(art, longest_attribute);
choose_ascii_art(art, cs, term, longest_field);
if(!ascii_fits_screen(term->w, *art->art, longest_field)) {
// Despite of choosing the smallest logo, the output does not fit
// Choose the shorter field names and recalculate the longest attr
use_short = true;
longest_attribute = longest_attribute_length(art, use_short);
attribute_fields = ATTRIBUTE_FIELDS_SHORT;
longest_attribute = longest_attribute_length(art, attribute_fields);
}
print_ascii_generic(art, longest_attribute, term->w - art->art->width, use_short);
print_ascii_generic(art, longest_attribute, term->w - art->art->width, attribute_fields);
free(manufacturing_process);
free(max_frequency);
@@ -485,7 +494,7 @@ bool print_gpufetch_amd(struct gpu_info* gpu, STYLE s, struct color** cs, struct
char* gpu_chip = get_str_chip(gpu->arch);
char* uarch = get_str_uarch_hsa(gpu->arch);
char* manufacturing_process = get_str_process(gpu->arch);
char* cus = get_str_cu(gpu);
char* sms = get_str_cu(gpu);
char* max_frequency = get_str_freq(gpu);
setAttribute(art, ATTRIBUTE_NAME, gpu_name);
@@ -495,21 +504,21 @@ bool print_gpufetch_amd(struct gpu_info* gpu, STYLE s, struct color** cs, struct
setAttribute(art, ATTRIBUTE_UARCH, uarch);
setAttribute(art, ATTRIBUTE_TECHNOLOGY, manufacturing_process);
setAttribute(art, ATTRIBUTE_FREQUENCY, max_frequency);
setAttribute(art, ATTRIBUTE_COMPUTE_UNITS, cus);
setAttribute(art, ATTRIBUTE_STREAMINGMP, sms);
bool use_short = false;
uint32_t longest_attribute = longest_attribute_length(art, use_short);
const char** attribute_fields = ATTRIBUTE_FIELDS;
uint32_t longest_attribute = longest_attribute_length(art, attribute_fields);
uint32_t longest_field = longest_field_length(art, longest_attribute);
choose_ascii_art(art, cs, term, longest_field);
if(!ascii_fits_screen(term->w, *art->art, longest_field)) {
// Despite of choosing the smallest logo, the output does not fit
// Choose the shorter field names and recalculate the longest attr
use_short = true;
longest_attribute = longest_attribute_length(art, use_short);
attribute_fields = ATTRIBUTE_FIELDS_SHORT;
longest_attribute = longest_attribute_length(art, attribute_fields);
}
print_ascii_generic(art, longest_attribute, term->w - art->art->width, use_short);
print_ascii_generic(art, longest_attribute, term->w - art->art->width, attribute_fields);
free(art->attributes);
free(art);

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@@ -5,8 +5,8 @@
#include "cuda.hpp"
#include "uarch.hpp"
#include "pci.hpp"
#include "gpufetch_helper_cuda.hpp"
#include "../common/pci.hpp"
#include "../common/global.hpp"
#include "../common/uarch.hpp"
@@ -33,8 +33,10 @@ int get_tensor_cores(struct uarch* arch, int sm, int major) {
if(major == 7) {
// TU116 does not have tensor cores!
// https://www.anandtech.com/show/13973/nvidia-gtx-1660-ti-review-feat-evga-xc-gaming/2
if (is_chip_TU116(arch))
if(arch->chip == CHIP_TU116 || arch->chip == CHIP_TU116BM ||
arch->chip == CHIP_TU116GL || arch->chip == CHIP_TU116M) {
return 0;
}
return sm * 8;
}
else if(major == 8) return sm * 4;

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@@ -8,7 +8,6 @@
#include "../common/uarch.hpp"
#include "../common/global.hpp"
#include "../common/gpu.hpp"
#include "pci.hpp"
#include "chips.hpp"
// Any clock multiplier
@@ -362,8 +361,3 @@ void free_uarch_struct(struct uarch* arch) {
free(arch->chip_str);
free(arch);
}
bool is_chip_TU116(struct uarch* arch) {
return arch->chip == CHIP_TU116 || arch->chip == CHIP_TU116BM ||
arch->chip == CHIP_TU116GL || arch->chip == CHIP_TU116M;
}

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@@ -13,6 +13,5 @@ char* get_str_cc(struct uarch* arch);
char* get_str_chip(struct uarch* arch);
char* get_str_process(struct uarch* arch);
void free_uarch_struct(struct uarch* arch);
bool is_chip_TU116(struct uarch* arch);
#endif

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@@ -13,6 +13,7 @@
#include "hsa.hpp"
#include "uarch.hpp"
#include "../common/pci.hpp"
#include "../common/global.hpp"
#include "../common/uarch.hpp"
@@ -75,7 +76,7 @@ struct topology_h* get_topology_info(struct agent_info info) {
return topo;
}
struct gpu_info* get_gpu_info_hsa(int gpu_idx) {
struct gpu_info* get_gpu_info_hsa(struct pci_dev *devices, int gpu_idx) {
struct gpu_info* gpu = (struct gpu_info*) emalloc(sizeof(struct gpu_info));
gpu->pci = NULL;
gpu->idx = gpu_idx;

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@@ -3,7 +3,7 @@
#include "../common/gpu.hpp"
struct gpu_info* get_gpu_info_hsa(int gpu_idx);
struct gpu_info* get_gpu_info_hsa(struct pci_dev *devices, int gpu_idx);
char* get_str_cu(struct gpu_info* gpu);
#endif

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@@ -127,7 +127,7 @@ enum {
#define CHECK_UARCH_START if (false) {}
#define CHECK_UARCH(arch, chip_, str, uarch, process) \
else if (arch->chip == chip_) fill_uarch(arch, str, uarch, process);
#define CHECK_UARCH_END else { if(arch->chip != CHIP_UNKNOWN_HSA) printBug("map_chip_to_uarch_hsa: Unknown chip id: %d", arch->chip); fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, UNK); }
#define CHECK_UARCH_END else { if(arch->chip != CHIP_UNKNOWN_CUDA) printBug("map_chip_to_uarch_hsa: Unknown chip id: %d", arch->chip); fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, UNK); }
void fill_uarch(struct uarch* arch, char const *str, MICROARCH u, uint32_t process) {
arch->chip_str = (char *) emalloc(sizeof(char) * (strlen(str)+1));