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10 Commits
amd-suppor
...
amd-suppor
| Author | SHA1 | Date | |
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84e6021a95 | ||
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a4916255cf | ||
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b5dc30d4b3 | ||
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2fa90179b4 | ||
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711936be81 | ||
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94a9a440f0 | ||
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78d34e71f1 | ||
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82ea16fc3d | ||
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6589de9717 | ||
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0950b97393 |
@@ -101,6 +101,17 @@ char* get_str_bus_width(struct gpu_info* gpu) {
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return string;
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}
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char* get_str_lds_size(struct gpu_info* gpu) {
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// TODO: Show XX KB (XX MB Total) like in cpufetch
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uint32_t size = 3+1+3+1;
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assert(strlen(STRING_UNKNOWN)+1 <= size);
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char* string = (char *) ecalloc(size, sizeof(char));
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sprintf(string, "%d KB", gpu->mem->lds_size / 1024);
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return string;
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}
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char* get_str_memory_clock(struct gpu_info* gpu) {
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return get_freq_as_str_mhz(gpu->mem->freq);
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}
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@@ -46,6 +46,10 @@ struct topology_c {
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// HSA topology
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struct topology_h {
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int32_t compute_units;
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int32_t num_shader_engines;
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int32_t simds_per_cu;
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int32_t num_xcc;
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int32_t matrix_cores;
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};
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// Intel topology
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@@ -61,6 +65,7 @@ struct memory {
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int32_t bus_width;
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int32_t freq;
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int32_t clk_mul; // clock multiplier
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int32_t lds_size; // HSA specific for now
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};
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struct gpu_info {
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@@ -88,6 +93,7 @@ char* get_str_freq(struct gpu_info* gpu);
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char* get_str_memory_size(struct gpu_info* gpu);
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char* get_str_memory_type(struct gpu_info* gpu);
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char* get_str_bus_width(struct gpu_info* gpu);
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char* get_str_lds_size(struct gpu_info* gpu);
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char* get_str_memory_clock(struct gpu_info* gpu);
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char* get_str_l2(struct gpu_info* gpu);
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char* get_str_peak_performance(struct gpu_info* gpu);
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@@ -32,64 +32,60 @@
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#define MAX_ATTRIBUTES 100
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#define MAX_TERM_SIZE 1024
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typedef struct {
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int id;
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const char *name;
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const char *shortname;
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} AttributeField;
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// AttributeField IDs
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// Used by
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enum {
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ATTRIBUTE_NAME,
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ATTRIBUTE_CHIP,
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ATTRIBUTE_UARCH,
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ATTRIBUTE_TECHNOLOGY,
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ATTRIBUTE_GT,
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ATTRIBUTE_FREQUENCY,
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ATTRIBUTE_STREAMINGMP,
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ATTRIBUTE_CORESPERMP,
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ATTRIBUTE_CUDA_CORES,
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ATTRIBUTE_TENSOR_CORES,
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ATTRIBUTE_EUS,
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ATTRIBUTE_L2,
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ATTRIBUTE_MEMORY,
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ATTRIBUTE_MEMORY_FREQ,
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ATTRIBUTE_BUS_WIDTH,
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ATTRIBUTE_PEAK,
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ATTRIBUTE_PEAK_TENSOR,
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ATTRIBUTE_NAME, // ALL
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ATTRIBUTE_CHIP, // ALL
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ATTRIBUTE_UARCH, // ALL
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ATTRIBUTE_TECHNOLOGY, // ALL
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ATTRIBUTE_FREQUENCY, // ALL
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ATTRIBUTE_PEAK, // ALL
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ATTRIBUTE_COMPUTE_UNITS, // HSA
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ATTRIBUTE_MATRIX_CORES, // HSA
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ATTRIBUTE_XCDS, // HSA
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ATTRIBUTE_LDS_SIZE, // HSA
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ATTRIBUTE_STREAMINGMP, // CUDA
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ATTRIBUTE_CORESPERMP, // CUDA
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ATTRIBUTE_CUDA_CORES, // CUDA
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ATTRIBUTE_TENSOR_CORES, // CUDA
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ATTRIBUTE_L2, // CUDA
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ATTRIBUTE_MEMORY, // CUDA,HSA
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ATTRIBUTE_MEMORY_FREQ, // CUDA
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ATTRIBUTE_BUS_WIDTH, // CUDA,HSA
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ATTRIBUTE_PEAK_TENSOR, // CUDA
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ATTRIBUTE_EUS, // Intel
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ATTRIBUTE_GT, // Intel
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};
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static const char* ATTRIBUTE_FIELDS [] = {
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"Name:",
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"GPU processor:",
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"Microarchitecture:",
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"Technology:",
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"Graphics Tier:",
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"Max Frequency:",
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"SMs:",
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"Cores/SM:",
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"CUDA Cores:",
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"Tensor Cores:",
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"Execution Units:",
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"L2 Size:",
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"Memory:",
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"Memory frequency:",
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"Bus width:",
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"Peak Performance:",
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"Peak Performance (MMA):",
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};
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static const char* ATTRIBUTE_FIELDS_SHORT [] = {
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"Name:",
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"Processor:",
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"uArch:",
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"Technology:",
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"GT:",
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"Max Freq.:",
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"SMs:",
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"Cores/SM:",
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"CUDA Cores:",
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"Tensor Cores:",
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"EUs:",
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"L2 Size:",
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"Memory:",
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"Memory freq.:",
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"Bus width:",
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"Peak Perf.:",
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"Peak Perf.(MMA):",
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static const AttributeField ATTRIBUTE_INFO[] = {
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{ ATTRIBUTE_NAME, "Name:", "Name:" },
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{ ATTRIBUTE_CHIP, "GPU processor:", "Processor:" },
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{ ATTRIBUTE_UARCH, "Microarchitecture:", "uArch:" },
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{ ATTRIBUTE_TECHNOLOGY, "Technology:", "Technology:" },
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{ ATTRIBUTE_FREQUENCY, "Max Frequency:", "Max Freq.:" },
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{ ATTRIBUTE_PEAK, "Peak Performance:", "Peak Perf.:" },
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{ ATTRIBUTE_COMPUTE_UNITS, "Compute Units (CUs):", "CUs" },
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{ ATTRIBUTE_MATRIX_CORES, "Matrix Cores: ", "Matrix Cores:" },
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{ ATTRIBUTE_XCDS, "XCDs:", "XCDs" },
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{ ATTRIBUTE_LDS_SIZE, "LDS size:", "LDS:" },
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{ ATTRIBUTE_STREAMINGMP, "SMs:", "SMs:" },
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{ ATTRIBUTE_CORESPERMP, "Cores/SM:", "Cores/SM:" },
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{ ATTRIBUTE_CUDA_CORES, "CUDA Cores:", "CUDA Cores:" },
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{ ATTRIBUTE_TENSOR_CORES, "Tensor Cores:", "Tensor Cores:" },
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{ ATTRIBUTE_L2, "L2 Size:", "L2 Size:" },
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{ ATTRIBUTE_MEMORY, "Memory:", "Memory:" },
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{ ATTRIBUTE_MEMORY_FREQ, "Memory frequency:", "Memory freq.:" },
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{ ATTRIBUTE_BUS_WIDTH, "Bus width:", "Bus width:" },
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{ ATTRIBUTE_PEAK_TENSOR, "Peak Performance (MMA):", "Peak Perf.(MMA):" },
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{ ATTRIBUTE_EUS, "Execution Units:", "EUs:" },
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{ ATTRIBUTE_GT, "Graphics Tier:", "GT:" },
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};
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struct terminal {
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@@ -207,8 +203,6 @@ bool ascii_fits_screen(int termw, struct ascii_logo logo, int lf) {
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void replace_bgbyfg_color(struct ascii_logo* logo) {
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// Replace background by foreground color
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for(int i=0; i < 2; i++) {
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if(logo->color_ascii[i] == NULL) break;
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if(strcmp(logo->color_ascii[i], C_BG_BLACK) == 0) strcpy(logo->color_ascii[i], C_FG_BLACK);
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else if(strcmp(logo->color_ascii[i], C_BG_RED) == 0) strcpy(logo->color_ascii[i], C_FG_RED);
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else if(strcmp(logo->color_ascii[i], C_BG_GREEN) == 0) strcpy(logo->color_ascii[i], C_FG_GREEN);
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@@ -276,13 +270,14 @@ void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* ter
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}
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}
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uint32_t longest_attribute_length(struct ascii* art, const char** attribute_fields) {
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uint32_t longest_attribute_length(struct ascii* art, bool use_short) {
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uint32_t max = 0;
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uint64_t len = 0;
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for(uint32_t i=0; i < art->n_attributes_set; i++) {
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if(art->attributes[i]->value != NULL) {
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len = strlen(attribute_fields[art->attributes[i]->type]);
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const char* str = use_short ? ATTRIBUTE_INFO[art->attributes[i]->type].shortname : ATTRIBUTE_INFO[art->attributes[i]->type].name;
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len = strlen(str);
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if(len > max) max = len;
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}
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}
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@@ -306,7 +301,7 @@ uint32_t longest_field_length(struct ascii* art, int la) {
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return max;
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}
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void print_ascii_generic(struct ascii* art, uint32_t la, int32_t text_space, const char** attribute_fields) {
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void print_ascii_generic(struct ascii* art, uint32_t la, int32_t text_space, bool use_short) {
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struct ascii_logo* logo = art->art;
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int attr_to_print = 0;
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int attr_type;
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@@ -350,11 +345,13 @@ void print_ascii_generic(struct ascii* art, uint32_t la, int32_t text_space, con
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attr_value = art->attributes[attr_to_print]->value;
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attr_to_print++;
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space_right = 1 + (la - strlen(attribute_fields[attr_type]));
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const char* attr_str = use_short ? ATTRIBUTE_INFO[attr_type].shortname : ATTRIBUTE_INFO[attr_type].name;
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space_right = 1 + (la - strlen(attr_str));
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current_space = max(0, text_space);
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printf("%s%.*s%s", logo->color_text[0], current_space, attribute_fields[attr_type], art->reset);
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current_space = max(0, current_space - (int) strlen(attribute_fields[attr_type]));
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printf("%s%.*s%s", logo->color_text[0], current_space, attr_str, art->reset);
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current_space = max(0, current_space - (int) strlen(attr_str));
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printf("%*s", min(current_space, space_right), "");
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current_space = max(0, current_space - min(current_space, space_right));
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printf("%s%.*s%s", logo->color_text[1], current_space, attr_value, art->reset);
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@@ -388,19 +385,19 @@ bool print_gpufetch_intel(struct gpu_info* gpu, STYLE s, struct color** cs, stru
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setAttribute(art, ATTRIBUTE_EUS, eus);
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setAttribute(art, ATTRIBUTE_PEAK, pp);
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const char** attribute_fields = ATTRIBUTE_FIELDS;
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uint32_t longest_attribute = longest_attribute_length(art, attribute_fields);
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bool use_short = false;
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uint32_t longest_attribute = longest_attribute_length(art, use_short);
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uint32_t longest_field = longest_field_length(art, longest_attribute);
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choose_ascii_art(art, cs, term, longest_field);
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if(!ascii_fits_screen(term->w, *art->art, longest_field)) {
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// Despite of choosing the smallest logo, the output does not fit
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// Choose the shorter field names and recalculate the longest attr
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attribute_fields = ATTRIBUTE_FIELDS_SHORT;
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longest_attribute = longest_attribute_length(art, attribute_fields);
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use_short = true;
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longest_attribute = longest_attribute_length(art, use_short);
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}
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print_ascii_generic(art, longest_attribute, term->w - art->art->width, attribute_fields);
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print_ascii_generic(art, longest_attribute, term->w - art->art->width, use_short);
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return true;
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}
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@@ -457,19 +454,19 @@ bool print_gpufetch_cuda(struct gpu_info* gpu, STYLE s, struct color** cs, struc
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setAttribute(art, ATTRIBUTE_PEAK_TENSOR, pp_tensor);
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}
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const char** attribute_fields = ATTRIBUTE_FIELDS;
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uint32_t longest_attribute = longest_attribute_length(art, attribute_fields);
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bool use_short = false;
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uint32_t longest_attribute = longest_attribute_length(art, use_short);
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uint32_t longest_field = longest_field_length(art, longest_attribute);
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choose_ascii_art(art, cs, term, longest_field);
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if(!ascii_fits_screen(term->w, *art->art, longest_field)) {
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// Despite of choosing the smallest logo, the output does not fit
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// Choose the shorter field names and recalculate the longest attr
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attribute_fields = ATTRIBUTE_FIELDS_SHORT;
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longest_attribute = longest_attribute_length(art, attribute_fields);
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use_short = true;
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longest_attribute = longest_attribute_length(art, use_short);
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}
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print_ascii_generic(art, longest_attribute, term->w - art->art->width, attribute_fields);
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print_ascii_generic(art, longest_attribute, term->w - art->art->width, use_short);
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free(manufacturing_process);
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free(max_frequency);
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@@ -494,8 +491,13 @@ bool print_gpufetch_amd(struct gpu_info* gpu, STYLE s, struct color** cs, struct
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char* gpu_chip = get_str_chip(gpu->arch);
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char* uarch = get_str_uarch_hsa(gpu->arch);
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char* manufacturing_process = get_str_process(gpu->arch);
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char* sms = get_str_cu(gpu);
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char* cus = get_str_cu(gpu);
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char* matrix_cores = get_str_matrix_cores(gpu);
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char* xcds = get_str_xcds(gpu);
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char* max_frequency = get_str_freq(gpu);
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char* bus_width = get_str_bus_width(gpu);
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char* mem_size = get_str_memory_size(gpu);
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char* lds_size = get_str_lds_size(gpu);
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setAttribute(art, ATTRIBUTE_NAME, gpu_name);
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if (gpu_chip != NULL) {
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@@ -504,21 +506,28 @@ bool print_gpufetch_amd(struct gpu_info* gpu, STYLE s, struct color** cs, struct
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setAttribute(art, ATTRIBUTE_UARCH, uarch);
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setAttribute(art, ATTRIBUTE_TECHNOLOGY, manufacturing_process);
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setAttribute(art, ATTRIBUTE_FREQUENCY, max_frequency);
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setAttribute(art, ATTRIBUTE_STREAMINGMP, sms);
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setAttribute(art, ATTRIBUTE_COMPUTE_UNITS, cus);
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setAttribute(art, ATTRIBUTE_MATRIX_CORES, matrix_cores);
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if (xcds != NULL) {
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setAttribute(art, ATTRIBUTE_XCDS, xcds);
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}
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setAttribute(art, ATTRIBUTE_LDS_SIZE, lds_size);
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setAttribute(art, ATTRIBUTE_MEMORY, mem_size);
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setAttribute(art, ATTRIBUTE_BUS_WIDTH, bus_width);
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const char** attribute_fields = ATTRIBUTE_FIELDS;
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uint32_t longest_attribute = longest_attribute_length(art, attribute_fields);
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bool use_short = false;
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uint32_t longest_attribute = longest_attribute_length(art, use_short);
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uint32_t longest_field = longest_field_length(art, longest_attribute);
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choose_ascii_art(art, cs, term, longest_field);
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if(!ascii_fits_screen(term->w, *art->art, longest_field)) {
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// Despite of choosing the smallest logo, the output does not fit
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// Choose the shorter field names and recalculate the longest attr
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attribute_fields = ATTRIBUTE_FIELDS_SHORT;
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longest_attribute = longest_attribute_length(art, attribute_fields);
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use_short = true;
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longest_attribute = longest_attribute_length(art, use_short);
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}
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print_ascii_generic(art, longest_attribute, term->w - art->art->width, attribute_fields);
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print_ascii_generic(art, longest_attribute, term->w - art->art->width, use_short);
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free(art->attributes);
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free(art);
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105
src/hsa/hsa.cpp
105
src/hsa/hsa.cpp
@@ -22,7 +22,16 @@ struct agent_info {
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char vendor_name[64];
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char device_mkt_name[64];
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uint32_t max_clock_freq;
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// Memory
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uint32_t bus_width;
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uint32_t lds_size;
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uint64_t global_size;
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// Topology
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uint32_t compute_unit;
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uint32_t num_shader_engines;
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uint32_t simds_per_cu;
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uint32_t num_xcc; // Acccelerator Complex Dies (XCDs)
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uint32_t matrix_cores; // Cores with WMMA/MFMA capabilities
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};
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#define RET_IF_HSA_ERR(err) { \
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@@ -40,6 +49,51 @@ struct agent_info {
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} \
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}
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hsa_status_t memory_pool_callback(hsa_amd_memory_pool_t pool, void* data) {
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struct agent_info* info = reinterpret_cast<struct agent_info *>(data);
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hsa_amd_segment_t segment;
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hsa_status_t err = hsa_amd_memory_pool_get_info(pool, HSA_AMD_MEMORY_POOL_INFO_SEGMENT, &segment);
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RET_IF_HSA_ERR(err);
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if (segment == HSA_AMD_SEGMENT_GROUP) {
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// LDS memory
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// We want to make sure that this memory pool is not repeated.
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if (info->lds_size != 0) {
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printErr("Found HSA_AMD_SEGMENT_GROUP twice!");
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return HSA_STATUS_ERROR;
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}
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uint32_t size = 0;
|
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err = hsa_amd_memory_pool_get_info(pool, HSA_AMD_MEMORY_POOL_INFO_SIZE, &size);
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RET_IF_HSA_ERR(err);
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info->lds_size = size;
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}
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else if (segment == HSA_AMD_SEGMENT_GLOBAL) {
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// Global memory
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uint32_t global_flags = 0;
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err = hsa_amd_memory_pool_get_info(pool, HSA_AMD_MEMORY_POOL_INFO_GLOBAL_FLAGS, &global_flags);
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RET_IF_HSA_ERR(err);
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if (global_flags & HSA_AMD_MEMORY_POOL_GLOBAL_FLAG_EXTENDED_SCOPE_FINE_GRAINED) {
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if (info->global_size != 0) {
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printErr("Found HSA_AMD_MEMORY_POOL_GLOBAL_FLAG_EXTENDED_SCOPE_FINE_GRAINED twice!");
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return HSA_STATUS_ERROR;
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}
|
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|
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uint64_t size = 0;
|
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|
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err = hsa_amd_memory_pool_get_info(pool, HSA_AMD_MEMORY_POOL_INFO_SIZE, &size);
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RET_IF_HSA_ERR(err);
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|
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info->global_size = size;
|
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}
|
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}
|
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return HSA_STATUS_SUCCESS;
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}
|
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hsa_status_t agent_callback(hsa_agent_t agent, void *data) {
|
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struct agent_info* info = reinterpret_cast<struct agent_info *>(data);
|
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|
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@@ -62,6 +116,26 @@ hsa_status_t agent_callback(hsa_agent_t agent, void *data) {
|
||||
|
||||
err = hsa_agent_get_info(agent, (hsa_agent_info_t) HSA_AMD_AGENT_INFO_COMPUTE_UNIT_COUNT, &info->compute_unit);
|
||||
RET_IF_HSA_ERR(err);
|
||||
|
||||
// According to the documentation, this is deprecated. But what should I be using then?
|
||||
err = hsa_agent_get_info(agent, (hsa_agent_info_t) HSA_AMD_AGENT_INFO_MEMORY_WIDTH, &info->bus_width);
|
||||
RET_IF_HSA_ERR(err);
|
||||
|
||||
err = hsa_agent_get_info(agent, (hsa_agent_info_t) HSA_AMD_AGENT_INFO_NUM_SHADER_ENGINES, &info->num_shader_engines);
|
||||
RET_IF_HSA_ERR(err);
|
||||
|
||||
err = hsa_agent_get_info(agent, (hsa_agent_info_t) HSA_AMD_AGENT_INFO_NUM_SIMDS_PER_CU, &info->simds_per_cu);
|
||||
RET_IF_HSA_ERR(err);
|
||||
|
||||
err = hsa_agent_get_info(agent, (hsa_agent_info_t) HSA_AMD_AGENT_INFO_NUM_XCC, &info->num_xcc);
|
||||
RET_IF_HSA_ERR(err);
|
||||
|
||||
// We will check against zero to see if it was set beforehand.
|
||||
info->global_size = 0;
|
||||
info->lds_size = 0;
|
||||
// This will fill global_size and lds_size.
|
||||
err = hsa_amd_agent_iterate_memory_pools(agent, memory_pool_callback, data);
|
||||
RET_IF_HSA_ERR(err);
|
||||
}
|
||||
|
||||
return HSA_STATUS_SUCCESS;
|
||||
@@ -71,10 +145,26 @@ struct topology_h* get_topology_info(struct agent_info info) {
|
||||
struct topology_h* topo = (struct topology_h*) emalloc(sizeof(struct topology_h));
|
||||
|
||||
topo->compute_units = info.compute_unit;
|
||||
topo->num_shader_engines = info.num_shader_engines; // not printed at the moment
|
||||
topo->simds_per_cu = info.simds_per_cu; // not printed at the moment
|
||||
topo->num_xcc = info.num_xcc;
|
||||
// Old GPUs (GCN I guess) might not have matrix cores.
|
||||
// Not sure what would happen here?
|
||||
topo->matrix_cores = topo->compute_units * topo->simds_per_cu;
|
||||
|
||||
return topo;
|
||||
}
|
||||
|
||||
struct memory* get_memory_info(struct gpu_info* gpu, struct agent_info info) {
|
||||
struct memory* mem = (struct memory*) emalloc(sizeof(struct memory));
|
||||
|
||||
mem->bus_width = info.bus_width;
|
||||
mem->lds_size = info.lds_size;
|
||||
mem->size_bytes = info.global_size;
|
||||
|
||||
return mem;
|
||||
}
|
||||
|
||||
struct gpu_info* get_gpu_info_hsa(int gpu_idx) {
|
||||
struct gpu_info* gpu = (struct gpu_info*) emalloc(sizeof(struct gpu_info));
|
||||
gpu->pci = NULL;
|
||||
@@ -118,6 +208,7 @@ struct gpu_info* get_gpu_info_hsa(int gpu_idx) {
|
||||
gpu->name = (char *) emalloc(sizeof(char) * (strlen(info.device_mkt_name) + 1));
|
||||
strcpy(gpu->name, info.device_mkt_name);
|
||||
gpu->arch = get_uarch_from_hsa(gpu, info.gpu_name);
|
||||
gpu->mem = get_memory_info(gpu, info);
|
||||
|
||||
if (gpu->arch == NULL) {
|
||||
return NULL;
|
||||
@@ -135,3 +226,17 @@ struct gpu_info* get_gpu_info_hsa(int gpu_idx) {
|
||||
char* get_str_cu(struct gpu_info* gpu) {
|
||||
return get_str_generic(gpu->topo_h->compute_units);
|
||||
}
|
||||
|
||||
char* get_str_xcds(struct gpu_info* gpu) {
|
||||
// If there is a single XCD, then we dont want to
|
||||
// print it.
|
||||
if (gpu->topo_h->num_xcc == 1) {
|
||||
return NULL;
|
||||
}
|
||||
return get_str_generic(gpu->topo_h->num_xcc);
|
||||
}
|
||||
|
||||
char* get_str_matrix_cores(struct gpu_info* gpu) {
|
||||
// TODO: Show XX (WMMA/MFMA)
|
||||
return get_str_generic(gpu->topo_h->matrix_cores);
|
||||
}
|
||||
@@ -5,5 +5,7 @@
|
||||
|
||||
struct gpu_info* get_gpu_info_hsa(int gpu_idx);
|
||||
char* get_str_cu(struct gpu_info* gpu);
|
||||
char* get_str_xcds(struct gpu_info* gpu);
|
||||
char* get_str_matrix_cores(struct gpu_info* gpu);
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user