diff --git a/src/intel/uarch.cpp b/src/intel/uarch.cpp
index b4c1427..c2bfe0f 100644
--- a/src/intel/uarch.cpp
+++ b/src/intel/uarch.cpp
@@ -14,7 +14,16 @@
 // Unknown manufacturing process
 #define UNK                  -1
 
-// MICROARCH values
+/*
+ * Mapping between iGPU and CPU uarchs
+ * -----------------------------------
+ * Gen6:   Sandy Bridge (2th Gen)
+ * Gen7:   Ivy Brdige   (3th Gen)
+ * Gen7.5: Haswell      (4th Gen)
+ * Gen8:   Broadwell    (5th Gen)
+ * Gen9:   Skylake      (6th Gen)
+ * Gen9.5: Kaby Lake
+ */
 enum {
   UARCH_UNKNOWN,
   UARCH_GEN6,
@@ -152,13 +161,14 @@ char* get_name_from_uarch(struct uarch* arch) {
 
 /*
  * Refs:
- * Gen7.5: https://en.wikipedia.org/wiki/List_of_Intel_graphics_processing_units#Gen7
-           "The Compute Architecture of Intel Processor Graphics Gen7.5, v1.0"
- * Gen8:   https://en.wikipedia.org/wiki/List_of_Intel_graphics_processing_units#Gen8
-           "The Compute Architecture of Intel Processor Graphics Gen8, v1.1"
- * Gen9:   https://en.wikichip.org/wiki/intel/microarchitectures/gen9#Configuration
-           "The Compute Architecture of Intel Processor Graphics Gen9, v1.0"
- * Gen9.5: https://en.wikichip.org/wiki/intel/microarchitectures/gen9.5#Configuration
+ * Gen6:     https://en.wikipedia.org/wiki/List_of_Intel_graphics_processing_units#Gen6
+ * Gen7/7.5: https://en.wikipedia.org/wiki/List_of_Intel_graphics_processing_units#Gen7
+             "The Compute Architecture of Intel Processor Graphics Gen7.5, v1.0"
+ * Gen8:     https://en.wikipedia.org/wiki/List_of_Intel_graphics_processing_units#Gen8
+             "The Compute Architecture of Intel Processor Graphics Gen8, v1.1"
+ * Gen9:     https://en.wikichip.org/wiki/intel/microarchitectures/gen9#Configuration
+             "The Compute Architecture of Intel Processor Graphics Gen9, v1.0"
+ * Gen9.5:   https://en.wikichip.org/wiki/intel/microarchitectures/gen9.5#Configuration
  */
 struct topology_i* get_topology_info(struct uarch* arch) {
   struct topology_i* topo = (struct topology_i*) emalloc(sizeof(struct topology_i));
@@ -166,13 +176,16 @@ struct topology_i* get_topology_info(struct uarch* arch) {
   // Syntax: (EU per subslice, Subslices, Slices)
   CHECK_TOPO_START
   // Gen6
-  // CHECK_TOPO(topo, arch, UARCH_GEN6,   GT1,  6, 1, 1)
+  CHECK_TOPO(topo, arch, UARCH_GEN6,   GT1,  6, 1, 1)
+  CHECK_TOPO(topo, arch, UARCH_GEN6,   GT2,  6, 2, 1)
   // Gen7
-  // CHECK_TOPO(topo, arch, UARCH_GEN7,   GT1,  6, 2, 1)
+  CHECK_TOPO(topo, arch, UARCH_GEN7,   GT1,  6, 1, 1)
+  CHECK_TOPO(topo, arch, UARCH_GEN7,   GT2,  8, 2, 1)
+  CHECK_TOPO(topo, arch, UARCH_GEN7,   GT3,  6, 1, 1)
   // Gen7.5
-  CHECK_TOPO(topo, arch, UARCH_GEN7_5, GT1,  6, 1, 1)
-  CHECK_TOPO(topo, arch, UARCH_GEN7_5, GT2,  8, 2, 1)
-  CHECK_TOPO(topo, arch, UARCH_GEN7_5, GT3,  6, 1, 1)
+  CHECK_TOPO(topo, arch, UARCH_GEN7_5, GT1, 10, 1, 1)
+  CHECK_TOPO(topo, arch, UARCH_GEN7_5, GT2, 10, 2, 1)
+  CHECK_TOPO(topo, arch, UARCH_GEN7_5, GT3, 10, 4, 1)
   // Gen8
   CHECK_TOPO(topo, arch, UARCH_GEN8,   GT1,  6, 2, 1)
   CHECK_TOPO(topo, arch, UARCH_GEN8,   GT2,  8, 3, 1)