[v0.30] Add uarch detection to AMD GPUs
Similarly to NVIDIA and Intel GPUs, we now detect microarchitecture, also with manufacturing process and specific chip name. We infer all of this from the gfx name (in the code we use the term llvm_target), altough it's not clear yet that this method is completely reliable (see comments for more details). In the future we might want to replace that with a better way. Once we have the gfx name, we *should* be able to infer the specific chip, and from the chip we can easily infer the microarchitecture. This commit also includes some refactorings and code improvements on the HSA backend.
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Dr-Noob
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src/hsa/uarch.cpp
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321
src/hsa/uarch.cpp
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#include <cstdlib>
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#include <cstdint>
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#include <cstring>
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#include "../common/uarch.hpp"
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#include "../common/global.hpp"
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#include "../common/gpu.hpp"
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#include "chips.hpp"
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// MICROARCH values
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enum {
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UARCH_UNKNOWN,
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// GCN (Graphics Core Next)
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// Empty for now
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// ...
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// RDNA (Radeon DNA)
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UARCH_RDNA,
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UARCH_RDNA2,
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UARCH_RDNA3,
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UARCH_RDNA4,
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// CDNA (Compute DNA)
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UARCH_CDNA,
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UARCH_CDNA2,
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UARCH_CDNA3,
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UARCH_CDNA4
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};
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static const char *uarch_str[] = {
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/*[ARCH_UNKNOWN] = */ STRING_UNKNOWN,
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/*[UARCH_RDNA] = */ "RDNA",
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/*[UARCH_RDNA2] = */ "RDNA2",
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/*[UARCH_RDNA3] = */ "RDNA3",
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/*[UARCH_RDNA4] = */ "RDNA4",
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/*[UARCH_CDNA] = */ "CDNA",
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/*[UARCH_CDNA2] = */ "CDNA2",
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/*[UARCH_CDNA3] = */ "CDNA3",
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/*[UARCH_CDNA4] = */ "CDNA4",
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};
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// Sources:
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// - https://rocm.docs.amd.com/en/latest/reference/gpu-arch-specs.html
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// - https://www.techpowerup.com
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//
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// This is sometimes refered to as LLVM target, but also shader ISA.
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//
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// LLVM target *usually* maps to a specific architecture. However there
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// are case where this is not true:
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// MI8 is GCN3.0 with LLVM target gfx803
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// MI6 is GCN4.0 with LLVM target gfx803
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// or
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// Strix Point can be gfx1150 or gfx1151
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//
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// NOTE: GCN chips are stored for completeness, but they are
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// not actively supported.
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enum {
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TARGET_UNKNOWN_HSA,
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/// GCN (Graphics Core Next)
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/// ------------------------
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// GCN 1.0
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TARGET_GFX600,
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TARGET_GFX601,
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TARGET_GFX602,
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// GCN 2.0
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TARGET_GFX700,
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TARGET_GFX701,
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TARGET_GFX702,
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TARGET_GFX703,
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TARGET_GFX704,
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TARGET_GFX705,
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// GCN 3.0 / 4.0
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TARGET_GFX801,
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TARGET_GFX802,
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TARGET_GFX803,
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TARGET_GFX805,
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TARGET_GFX810,
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// GCN 5.0
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TARGET_GFX900,
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TARGET_GFX902,
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TARGET_GFX904,
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// GCN 5.1
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TARGET_GFX906,
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// ???
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TARGET_GFX909,
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TARGET_GFX90C,
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/// RDNA (Radeon DNA)
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/// -----------------
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// RDNA1
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TARGET_GFX1010,
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TARGET_GFX1011,
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TARGET_GFX1012,
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// RDNA2
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TARGET_GFX1013, // Oberon
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TARGET_GFX1030,
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TARGET_GFX1031,
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TARGET_GFX1032,
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TARGET_GFX1033,
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TARGET_GFX1034,
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TARGET_GFX1035, // ??
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TARGET_GFX1036, // ??
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// RDNA3
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TARGET_GFX1100,
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TARGET_GFX1101,
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TARGET_GFX1102,
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TARGET_GFX1103, // ???
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// RDNA3.5
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TARGET_GFX1150, // Strix Point
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TARGET_GFX1151, // Strix Halo / Strix Point
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TARGET_GFX1152, // Krackan Point
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TARGET_GFX1153, // ???
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// RDNA4
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TARGET_GFX1200,
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TARGET_GFX1201,
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TARGET_GFX1250, // ???
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TARGET_GFX1251, // ???
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/// CDNA (Compute DNA)
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/// ------------------
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// CDNA
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TARGET_GFX908,
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// CDNA2
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TARGET_GFX90A,
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// CDNA3
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TARGET_GFX942,
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// CDNA4
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TARGET_GFX950
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};
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#define CHECK_UARCH_START if (false) {}
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#define CHECK_UARCH(arch, chip_, str, uarch, process) \
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else if (arch->chip == chip_) fill_uarch(arch, str, uarch, process);
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#define CHECK_UARCH_END else { if(arch->chip != CHIP_UNKNOWN_CUDA) printBug("map_chip_to_uarch_hsa: Unknown chip id: %d", arch->chip); fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, UNK); }
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void fill_uarch(struct uarch* arch, char const *str, MICROARCH u, uint32_t process) {
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arch->chip_str = (char *) emalloc(sizeof(char) * (strlen(str)+1));
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strcpy(arch->chip_str, str);
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arch->uarch = u;
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arch->process = process;
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}
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// On chiplet based chips (such as Navi31, Navi32, etc),
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// we have 2 different processes: The MCD process and the
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// rest of the chip process. They might be different and here
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// we just take one - let's take MCD process for now.
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//
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// TODO: Should we differentiate?
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void map_chip_to_uarch_hsa(struct uarch* arch) {
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CHECK_UARCH_START
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// RDNA
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CHECK_UARCH(arch, CHIP_NAVI_10, "Navi 10", UARCH_RDNA, 7)
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CHECK_UARCH(arch, CHIP_NAVI_12, "Navi 12", UARCH_RDNA, 7)
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CHECK_UARCH(arch, CHIP_NAVI_14, "Navi 14", UARCH_RDNA, 7)
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CHECK_UARCH(arch, CHIP_NAVI_21, "Navi 21", UARCH_RDNA2, 7)
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CHECK_UARCH(arch, CHIP_NAVI_22, "Navi 22", UARCH_RDNA2, 7)
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CHECK_UARCH(arch, CHIP_NAVI_23, "Navi 23", UARCH_RDNA2, 7)
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CHECK_UARCH(arch, CHIP_NAVI_24, "Navi 24", UARCH_RDNA2, 6)
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CHECK_UARCH(arch, CHIP_NAVI_31, "Navi 31", UARCH_RDNA3, 6)
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CHECK_UARCH(arch, CHIP_NAVI_32, "Navi 32", UARCH_RDNA3, 6)
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CHECK_UARCH(arch, CHIP_NAVI_33, "Navi 33", UARCH_RDNA3, 6)
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CHECK_UARCH(arch, CHIP_NAVI_44, "Navi 44", UARCH_RDNA4, 4)
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CHECK_UARCH(arch, CHIP_NAVI_48, "Navi 48", UARCH_RDNA4, 4)
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// CDNA
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// NOTE: We will not show chip name for CDNA, thus use empty str
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CHECK_UARCH(arch, CHIP_ARCTURUS, "", UARCH_CDNA, 7)
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CHECK_UARCH(arch, CHIP_ALDEBARAN, "", UARCH_CDNA2, 6)
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CHECK_UARCH(arch, CHIP_AQUA_VANJARAM, "", UARCH_CDNA3, 6)
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CHECK_UARCH(arch, CHIP_CDNA_NEXT, "", UARCH_CDNA4, 6) // big difference between MCD and rest of the chip process
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CHECK_UARCH_END
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}
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#define CHECK_TGT_START if (false) {}
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#define CHECK_TGT(target, llvm_target, chip) \
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else if (target == llvm_target) return chip;
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#define CHECK_TGT_END else { printBug("LLVM target '%d' has no matching chip", target); return CHIP_UNKNOWN_HSA; }
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// We have at least 2 choices to infer the chip:
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//
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// - LLVM target (e.g., gfx1101 is Navi 32)
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// - PCI ID (e.g., 0x7470 is Navi 32)
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//
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// For now we will use the first approach, which seems to have
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// some issues like mentioned in the enum.
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// However PCI detection is also not perfect, since it is
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// quite hard to find PCI ids from old hardware.
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GPUCHIP get_chip_from_target_hsa(int32_t target) {
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CHECK_TGT_START
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/// RDNA
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/// -------------------------------------------
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CHECK_TGT(target, TARGET_GFX1010, CHIP_NAVI_10)
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CHECK_TGT(target, TARGET_GFX1011, CHIP_NAVI_12)
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CHECK_TGT(target, TARGET_GFX1012, CHIP_NAVI_14)
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// CHECK_TGT(target, TARGET_GFX1013, TODO)
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/// RDNA2
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/// -------------------------------------------
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CHECK_TGT(target, TARGET_GFX1030, CHIP_NAVI_21)
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CHECK_TGT(target, TARGET_GFX1031, CHIP_NAVI_22)
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CHECK_TGT(target, TARGET_GFX1032, CHIP_NAVI_23)
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CHECK_TGT(target, TARGET_GFX1033, CHIP_NAVI_21)
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CHECK_TGT(target, TARGET_GFX1034, CHIP_NAVI_24)
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// CHECK_TGT(target, TARGET_GFX1035, TODO)
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// CHECK_TGT(target, TARGET_GFX1036, TODO)
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/// RDNA3
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/// -------------------------------------------
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CHECK_TGT(target, TARGET_GFX1100, CHIP_NAVI_31)
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CHECK_TGT(target, TARGET_GFX1101, CHIP_NAVI_32)
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CHECK_TGT(target, TARGET_GFX1102, CHIP_NAVI_33)
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// CHECK_TGT(target, TARGET_GFX1103, TODO)
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/// RDNA3.5
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/// -------------------------------------------
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// CHECK_TGT(target, TARGET_GFX1150, TODO)
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// CHECK_TGT(target, TARGET_GFX1151, TODO)
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// CHECK_TGT(target, TARGET_GFX1152, TODO)
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// CHECK_TGT(target, TARGET_GFX1153, TODO)
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/// RDNA4
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/// -------------------------------------------
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CHECK_TGT(target, TARGET_GFX1200, CHIP_NAVI_44)
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CHECK_TGT(target, TARGET_GFX1201, CHIP_NAVI_48)
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// CHECK_TGT(target, TARGET_GFX1250, TODO)
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// CHECK_TGT(target, TARGET_GFX1251, TODO)
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/// CDNA
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/// -------------------------------------------
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CHECK_TGT(target, TARGET_GFX908, CHIP_ARCTURUS)
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/// CDNA2
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/// -------------------------------------------
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CHECK_TGT(target, TARGET_GFX90A, CHIP_ALDEBARAN)
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/// CDNA3
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/// -------------------------------------------
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CHECK_TGT(target, TARGET_GFX942, CHIP_AQUA_VANJARAM)
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/// CDNA4
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/// -------------------------------------------
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CHECK_TGT(target, TARGET_GFX950, CHIP_CDNA_NEXT)
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CHECK_TGT_END
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}
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#define CHECK_TGT_STR_START if (false) {}
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#define CHECK_TGT_STR(target, llvm_target, chip) \
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else if (strcmp(target, llvm_target) == 0) return chip;
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#define CHECK_TGT_STR_END else { return TARGET_UNKNOWN_HSA; }
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// Maps the LLVM target string to the enum value
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int32_t get_llvm_target_from_str(char* target) {
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// TODO: Autogenerate this
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// TODO: Add all, not only the ones we support in get_chip_from_target_hsa
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CHECK_TGT_STR_START
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CHECK_TGT_STR(target, "gfx1010", TARGET_GFX1010)
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CHECK_TGT_STR(target, "gfx1011", TARGET_GFX1011)
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CHECK_TGT_STR(target, "gfx1012", TARGET_GFX1012)
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CHECK_TGT_STR(target, "gfx1013", TARGET_GFX1013)
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CHECK_TGT_STR(target, "gfx1030", TARGET_GFX1030)
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CHECK_TGT_STR(target, "gfx1031", TARGET_GFX1031)
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CHECK_TGT_STR(target, "gfx1032", TARGET_GFX1032)
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CHECK_TGT_STR(target, "gfx1033", TARGET_GFX1033)
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CHECK_TGT_STR(target, "gfx1034", TARGET_GFX1034)
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CHECK_TGT_STR(target, "gfx1035", TARGET_GFX1035)
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CHECK_TGT_STR(target, "gfx1036", TARGET_GFX1036)
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CHECK_TGT_STR(target, "gfx1100", TARGET_GFX1100)
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CHECK_TGT_STR(target, "gfx1101", TARGET_GFX1101)
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CHECK_TGT_STR(target, "gfx1102", TARGET_GFX1102)
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CHECK_TGT_STR(target, "gfx1103", TARGET_GFX1103)
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CHECK_TGT_STR(target, "gfx1200", TARGET_GFX1200)
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CHECK_TGT_STR(target, "gfx1201", TARGET_GFX1201)
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CHECK_TGT_STR(target, "gfx1250", TARGET_GFX1250)
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CHECK_TGT_STR(target, "gfx1251", TARGET_GFX1251)
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CHECK_TGT_STR(target, "gfx908", TARGET_GFX908)
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CHECK_TGT_STR(target, "gfx90a", TARGET_GFX90A)
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CHECK_TGT_STR(target, "gfx942", TARGET_GFX942)
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CHECK_TGT_STR(target, "gfx950", TARGET_GFX950)
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CHECK_TGT_STR_END
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}
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struct uarch* get_uarch_from_hsa(struct gpu_info* gpu, char* gpu_name) {
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struct uarch* arch = (struct uarch*) emalloc(sizeof(struct uarch));
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arch->llvm_target = get_llvm_target_from_str(gpu_name);
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if (arch->llvm_target == TARGET_UNKNOWN_HSA) {
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printErr("Unknown LLVM target: '%s'", gpu_name);
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return NULL;
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}
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arch->chip_str = NULL;
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arch->chip = get_chip_from_target_hsa(arch->llvm_target);
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map_chip_to_uarch_hsa(arch);
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return arch;
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}
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bool is_uarch_valid(struct uarch* arch) {
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if (arch == NULL) {
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printBug("Invalid uarch: arch is NULL");
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return false;
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}
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if (arch->uarch >= UARCH_UNKNOWN && arch->uarch <= UARCH_CDNA4) {
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return true;
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}
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else {
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printBug("Invalid uarch: %d", arch->uarch);
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return false;
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}
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}
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bool is_cdna(struct uarch* arch) {
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return arch->uarch == UARCH_CDNA ||
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arch->uarch == UARCH_CDNA2 ||
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arch->uarch == UARCH_CDNA3 ||
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arch->uarch == UARCH_CDNA4;
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}
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char* get_str_chip(struct uarch* arch) {
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// We dont want to show CDNA chip names as they add
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// no value, since each architecture maps one to one
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// to a chip.
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if (is_cdna(arch)) return NULL;
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return arch->chip_str;
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}
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const char* get_str_uarch_hsa(struct uarch* arch) {
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if (!is_uarch_valid(arch)) {
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return NULL;
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}
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return uarch_str[arch->uarch];
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}
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