diff --git a/src/common/printer.cpp b/src/common/printer.cpp index 7612191..cf21f10 100644 --- a/src/common/printer.cpp +++ b/src/common/printer.cpp @@ -9,6 +9,7 @@ #include "../common/global.hpp" #include "../common/gpu.hpp" +#include "../intel/uarch.hpp" #include "../cuda/cuda.hpp" #include "../cuda/uarch.hpp" @@ -34,6 +35,7 @@ enum { ATTRIBUTE_CHIP, ATTRIBUTE_UARCH, ATTRIBUTE_TECHNOLOGY, + ATTRIBUTE_GT, ATTRIBUTE_FREQUENCY, ATTRIBUTE_STREAMINGMP, ATTRIBUTE_CORESPERMP, @@ -52,6 +54,7 @@ static const char* ATTRIBUTE_FIELDS [] = { "GPU processor:", "Microarchitecture:", "Technology:", + "Graphics Tier:", "Max Frequency:", "SMs:", "Cores/SM:", @@ -70,6 +73,7 @@ static const char* ATTRIBUTE_FIELDS_SHORT [] = { "Processor:", "uArch:", "Technology:", + "GT:", "Max Freq.:", "SMs:", "Cores/SM:", @@ -359,12 +363,14 @@ bool print_gpufetch_intel(struct gpu_info* gpu, STYLE s, struct color** cs, stru return false; char* gpu_name = get_str_gpu_name(gpu); - char* uarch = get_str_uarch(gpu->arch); + char* uarch = get_str_uarch_intel(gpu->arch); + char* gt = get_str_gt(gpu->arch); char* manufacturing_process = get_str_process(gpu->arch); setAttribute(art, ATTRIBUTE_NAME, gpu_name); setAttribute(art, ATTRIBUTE_UARCH, uarch); setAttribute(art, ATTRIBUTE_TECHNOLOGY, manufacturing_process); + setAttribute(art, ATTRIBUTE_GT, gt); const char** attribute_fields = ATTRIBUTE_FIELDS; uint32_t longest_attribute = longest_attribute_length(art, attribute_fields); @@ -393,7 +399,7 @@ bool print_gpufetch_cuda(struct gpu_info* gpu, STYLE s, struct color** cs, struc char* gpu_name = get_str_gpu_name(gpu); char* gpu_chip = get_str_chip(gpu->arch); - char* uarch = get_str_uarch(gpu->arch); + char* uarch = get_str_uarch_cuda(gpu->arch); char* comp_cap = get_str_cc(gpu->arch); char* manufacturing_process = get_str_process(gpu->arch); char* sms = get_str_sm(gpu); diff --git a/src/common/uarch.hpp b/src/common/uarch.hpp index fd253f1..56bfe9b 100644 --- a/src/common/uarch.hpp +++ b/src/common/uarch.hpp @@ -11,10 +11,15 @@ typedef uint32_t GPUCHIP; typedef uint32_t MICROARCH; struct uarch { + // NVIDIA specific int32_t cc_major; int32_t cc_minor; int32_t compute_capability; + // Intel specific + int32_t gt; + int32_t eu; + MICROARCH uarch; GPUCHIP chip; diff --git a/src/cuda/uarch.cpp b/src/cuda/uarch.cpp index 20268d6..4d85e5d 100644 --- a/src/cuda/uarch.cpp +++ b/src/cuda/uarch.cpp @@ -315,10 +315,6 @@ MEMTYPE guess_memtype_from_cmul_and_uarch(int clkm, struct uarch* arch) { CHECK_MEMTYPE_END } -const char* get_str_uarch(struct uarch* arch) { - return uarch_str[arch->uarch]; -} - char* get_str_cc(struct uarch* arch) { uint32_t max_size = 4; char* cc = (char *) ecalloc(max_size, sizeof(char)); @@ -330,6 +326,10 @@ char* get_str_chip(struct uarch* arch) { return arch->chip_str; } +const char* get_str_uarch_cuda(struct uarch* arch) { + return uarch_str[arch->uarch]; +} + void free_uarch_struct(struct uarch* arch) { free(arch->uarch_str); free(arch->chip_str); diff --git a/src/cuda/uarch.hpp b/src/cuda/uarch.hpp index ee64833..375b001 100644 --- a/src/cuda/uarch.hpp +++ b/src/cuda/uarch.hpp @@ -8,7 +8,7 @@ struct uarch; struct uarch* get_uarch_from_cuda(struct gpu_info* gpu); bool clkm_possible_for_uarch(int clkm, struct uarch* arch); MEMTYPE guess_memtype_from_cmul_and_uarch(int ddr, struct uarch* arch); -char* get_str_uarch(struct uarch* arch); +char* get_str_uarch_cuda(struct uarch* arch); char* get_str_cc(struct uarch* arch); char* get_str_chip(struct uarch* arch); char* get_str_process(struct uarch* arch); diff --git a/src/intel/uarch.cpp b/src/intel/uarch.cpp index 778b27e..6e9bcdd 100644 --- a/src/intel/uarch.cpp +++ b/src/intel/uarch.cpp @@ -35,68 +35,94 @@ static const char *uarch_str[] = { /*[ARCH_GEN9_5] = */ "Gen9.5", }; -#define CHECK_UARCH_START if (false) {} -#define CHECK_UARCH(arch, chip_, str, uarch, process) \ - else if (arch->chip == chip_) fill_uarch(arch, str, uarch, process); -#define CHECK_UARCH_END else { printBug("map_chip_to_uarch: Unknown chip id: %d", arch->chip); fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, 0); } +// Graphic Tiers (GT) +enum { + GT_UNKNOWN, + GT1, + GT1_5, + GT2, + GT3, + GT3e, + GT4e +}; -void fill_uarch(struct uarch* arch, char const *str, MICROARCH u, uint32_t process) { +static const char *gt_str[] = { + /*[GT_UNKNOWN] = */ STRING_UNKNOWN, + /*[GT1] = */ "GT1", + /*[GT1_5] = */ "GT1.5", + /*[GT2] = */ "GT2", + /*[GT3] = */ "GT3", + /*[GT3e] = */ "GT3e", + /*[GT4e] = */ "GT4e", +}; + +#define CHECK_UARCH_START if (false) {} +#define CHECK_UARCH(arch, chip_, str, uarch, gt, process) \ + else if (arch->chip == chip_) fill_uarch(arch, str, uarch, gt, process); +#define CHECK_UARCH_END else { printBug("map_chip_to_uarch: Unknown chip id: %d", arch->chip); fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, GT_UNKNOWN, 0); } + +void fill_uarch(struct uarch* arch, char const *str, MICROARCH u, int32_t gt, uint32_t process) { arch->chip_str = (char *) emalloc(sizeof(char) * (strlen(str)+1)); strcpy(arch->chip_str, str); arch->uarch = u; arch->process = process; + arch->gt = gt; } void map_chip_to_uarch(struct uarch* arch) { CHECK_UARCH_START // Gen6 - CHECK_UARCH(arch, CHIP_HD_2000, "HD Graphics 2000", UARCH_GEN6, 32) - CHECK_UARCH(arch, CHIP_HD_3000, "HD Graphics 3000", UARCH_GEN6, 32) + CHECK_UARCH(arch, CHIP_HD_2000, "HD Graphics 2000", UARCH_GEN6, GT1, 32) + CHECK_UARCH(arch, CHIP_HD_3000, "HD Graphics 3000", UARCH_GEN6, GT2, 32) // Gen7 - CHECK_UARCH(arch, CHIP_HD_2500, "HD Graphics 2500", UARCH_GEN7, 22) - CHECK_UARCH(arch, CHIP_HD_4000, "HD Graphics 4000", UARCH_GEN7, 22) - CHECK_UARCH(arch, CHIP_HD_P4000, "HD Graphics P4000", UARCH_GEN7, 22) + CHECK_UARCH(arch, CHIP_HD_2500, "HD Graphics 2500", UARCH_GEN7, GT1, 22) + CHECK_UARCH(arch, CHIP_HD_4000, "HD Graphics 4000", UARCH_GEN7, GT2, 22) + CHECK_UARCH(arch, CHIP_HD_P4000, "HD Graphics P4000", UARCH_GEN7, GT2, 22) // Gen7.5 - CHECK_UARCH(arch, CHIP_HD_4200, "HD Graphics 4200", UARCH_GEN7_5, 22) - CHECK_UARCH(arch, CHIP_HD_4400, "HD Graphics 4400", UARCH_GEN7_5, 22) - CHECK_UARCH(arch, CHIP_HD_4600, "HD Graphics 4600", UARCH_GEN7_5, 22) - CHECK_UARCH(arch, CHIP_HD_P4600, "HD Graphics P4600", UARCH_GEN7_5, 22) - CHECK_UARCH(arch, CHIP_IRIS_5100, "HD Iris 5100", UARCH_GEN7_5, 22) - CHECK_UARCH(arch, CHIP_IRISP_5200, "HD Iris Pro 5200", UARCH_GEN7_5, 22) - CHECK_UARCH(arch, CHIP_IRISP_P5200, "HD Iris Pro P5200", UARCH_GEN7_5, 22) + CHECK_UARCH(arch, CHIP_HD_4200, "HD Graphics 4200", UARCH_GEN7_5, GT2, 22) + CHECK_UARCH(arch, CHIP_HD_4400, "HD Graphics 4400", UARCH_GEN7_5, GT2, 22) + CHECK_UARCH(arch, CHIP_HD_4600, "HD Graphics 4600", UARCH_GEN7_5, GT2, 22) + CHECK_UARCH(arch, CHIP_HD_P4600, "HD Graphics P4600", UARCH_GEN7_5, GT2, 22) + CHECK_UARCH(arch, CHIP_IRIS_5100, "HD Iris 5100", UARCH_GEN7_5, GT3, 22) + CHECK_UARCH(arch, CHIP_IRISP_5200, "HD Iris Pro 5200", UARCH_GEN7_5, GT3, 22) + CHECK_UARCH(arch, CHIP_IRISP_P5200, "HD Iris Pro P5200", UARCH_GEN7_5, GT3, 22) // Gen8 - CHECK_UARCH(arch, CHIP_HD_5300, "HD Graphics 5300", UARCH_GEN8, 14) - CHECK_UARCH(arch, CHIP_HD_5500, "HD Graphics 5500", UARCH_GEN8, 14) - CHECK_UARCH(arch, CHIP_HD_5600, "HD Graphics 5600", UARCH_GEN8, 14) - CHECK_UARCH(arch, CHIP_HD_P5700, "HD Graphics P5700", UARCH_GEN8, 14) - CHECK_UARCH(arch, CHIP_HD_6000, "HD Graphics 6000", UARCH_GEN8, 14) - CHECK_UARCH(arch, CHIP_IRIS_6100, "Iris Graphics 6100", UARCH_GEN8, 14) - CHECK_UARCH(arch, CHIP_IRISP_6200, "Iris Pro Graphics 6200", UARCH_GEN8, 14) - CHECK_UARCH(arch, CHIP_IRISP_P6300, "Iris Pro Graphics P6300", UARCH_GEN8, 14) + CHECK_UARCH(arch, CHIP_HD_5300, "HD Graphics 5300", UARCH_GEN8, GT2, 14) + CHECK_UARCH(arch, CHIP_HD_5500, "HD Graphics 5500", UARCH_GEN8, GT2, 14) + CHECK_UARCH(arch, CHIP_HD_5600, "HD Graphics 5600", UARCH_GEN8, GT2, 14) + CHECK_UARCH(arch, CHIP_HD_P5700, "HD Graphics P5700", UARCH_GEN8, GT2, 14) + CHECK_UARCH(arch, CHIP_HD_6000, "HD Graphics 6000", UARCH_GEN8, GT3, 14) + CHECK_UARCH(arch, CHIP_IRIS_6100, "Iris Graphics 6100", UARCH_GEN8, GT3, 14) + CHECK_UARCH(arch, CHIP_IRISP_6200, "Iris Pro Graphics 6200", UARCH_GEN8, GT3, 14) + CHECK_UARCH(arch, CHIP_IRISP_P6300, "Iris Pro Graphics P6300", UARCH_GEN8, GT3, 14) // Gen9 - CHECK_UARCH(arch, CHIP_HD_510, "HD Graphics 510", UARCH_GEN9, 14) - CHECK_UARCH(arch, CHIP_HD_515, "HD Graphics 515", UARCH_GEN9, 14) - CHECK_UARCH(arch, CHIP_HD_520, "HD Graphics 520", UARCH_GEN9, 14) - CHECK_UARCH(arch, CHIP_HD_530, "HD Graphics 530", UARCH_GEN9, 14) - CHECK_UARCH(arch, CHIP_HD_P530, "HD Graphics P530", UARCH_GEN9, 14) + CHECK_UARCH(arch, CHIP_HD_510, "HD Graphics 510", UARCH_GEN9, GT1, 14) + CHECK_UARCH(arch, CHIP_HD_515, "HD Graphics 515", UARCH_GEN9, GT2, 14) + CHECK_UARCH(arch, CHIP_HD_520, "HD Graphics 520", UARCH_GEN9, GT2, 14) + CHECK_UARCH(arch, CHIP_HD_530, "HD Graphics 530", UARCH_GEN9, GT2, 14) + CHECK_UARCH(arch, CHIP_HD_P530, "HD Graphics P530", UARCH_GEN9, GT2, 14) // Gen9.5 - CHECK_UARCH(arch, CHIP_UHD_600, "UHD Graphics 600", UARCH_GEN9_5, 14) - CHECK_UARCH(arch, CHIP_UHD_605, "UHD Graphics 605", UARCH_GEN9_5, 14) - CHECK_UARCH(arch, CHIP_UHD_620, "UHD Graphics 620", UARCH_GEN9_5, 14) - CHECK_UARCH(arch, CHIP_UHD_630, "UHD Graphics 630", UARCH_GEN9_5, 14) - CHECK_UARCH(arch, CHIP_HD_610, "HD Graphics 610", UARCH_GEN9_5, 14) - CHECK_UARCH(arch, CHIP_HD_615, "HD Graphics 615", UARCH_GEN9_5, 14) - CHECK_UARCH(arch, CHIP_HD_630, "HD Graphics 630", UARCH_GEN9_5, 14) - CHECK_UARCH(arch, CHIP_HD_P630, "HD Graphics P630", UARCH_GEN9_5, 14) - CHECK_UARCH(arch, CHIP_IRISP_640, "Iris Plus Graphics 640", UARCH_GEN9_5, 14) - CHECK_UARCH(arch, CHIP_IRISP_640, "Iris Plus Graphics 650", UARCH_GEN9_5, 14) + CHECK_UARCH(arch, CHIP_UHD_600, "UHD Graphics 600", UARCH_GEN9_5, GT1, 14) + CHECK_UARCH(arch, CHIP_UHD_605, "UHD Graphics 605", UARCH_GEN9_5, GT1_5, 14) + CHECK_UARCH(arch, CHIP_UHD_620, "UHD Graphics 620", UARCH_GEN9_5, GT2, 14) + CHECK_UARCH(arch, CHIP_UHD_630, "UHD Graphics 630", UARCH_GEN9_5, GT2, 14) + CHECK_UARCH(arch, CHIP_HD_610, "HD Graphics 610", UARCH_GEN9_5, GT1, 14) + CHECK_UARCH(arch, CHIP_HD_615, "HD Graphics 615", UARCH_GEN9_5, GT2, 14) + CHECK_UARCH(arch, CHIP_HD_630, "HD Graphics 630", UARCH_GEN9_5, GT2, 14) + CHECK_UARCH(arch, CHIP_HD_P630, "HD Graphics P630", UARCH_GEN9_5, GT2, 14) + CHECK_UARCH(arch, CHIP_IRISP_640, "Iris Plus Graphics 640", UARCH_GEN9_5, GT3e, 14) + CHECK_UARCH(arch, CHIP_IRISP_640, "Iris Plus Graphics 650", UARCH_GEN9_5, GT3e, 14) CHECK_UARCH_END } -const char* get_str_uarch(struct uarch* arch) { +const char* get_str_uarch_intel(struct uarch* arch) { return uarch_str[arch->uarch]; } +const char* get_str_gt(struct uarch* arch) { + return gt_str[arch->gt]; +} + struct uarch* get_uarch_from_pci(struct pci* pci) { struct uarch* arch = (struct uarch*) emalloc(sizeof(struct uarch)); diff --git a/src/intel/uarch.hpp b/src/intel/uarch.hpp index e368227..2c287e3 100644 --- a/src/intel/uarch.hpp +++ b/src/intel/uarch.hpp @@ -7,6 +7,7 @@ struct uarch; struct uarch* get_uarch_from_pci(struct pci* pci); char* get_name_from_uarch(struct uarch* arch); -const char* get_str_uarch(struct uarch* arch); +char* get_str_gt(struct uarch* arch); +char* get_str_uarch_intel(struct uarch* arch); #endif