61 lines
2.4 KiB
C
61 lines
2.4 KiB
C
/* _NVRM_COPYRIGHT_BEGIN_
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*
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* Copyright 2003-2016 by NVIDIA Corporation. All rights reserved. All
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* information contained herein is proprietary and confidential to NVIDIA
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* Corporation. Any use, reproduction, or disclosure without the written
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* permission of NVIDIA Corporation is prohibited.
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*
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* _NVRM_COPYRIGHT_END_
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*/
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#ifndef __dev_nv_pcfg_xve_regmap_h__
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#define __dev_nv_pcfg_xve_regmap_h__
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/* This file is autogenerated. Do not edit */
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#define NV_PCFG_XVE_REGISTER_MAP_START_OFFSET 0x00088000
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/*
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* <prefix>_MAP has 1 bit set for each dword register.
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* <prefix>_COUNT has total number of set bits in <prefix>_MAP.
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*/
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#define NV_PCFG_XVE_REGISTER_VALID_COUNT 472
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#define NV_PCFG_XVE_REGISTER_VALID_MAP { \
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/* 0x00088000 */ 0xFFF1FFFF, 0x101FFF9F, \
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/* 0x00088100 */ 0x3FFA3C7F, 0x00000000, \
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/* 0x00088200 */ 0x03F00000, 0x00000000, \
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/* 0x00088300 */ 0x00000000, 0x00000000, \
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/* 0x00088400 */ 0x8007FFC0, 0x3F3F5807, \
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/* 0x00088500 */ 0x000000BF, 0x00000000, \
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/* 0x00088600 */ 0x0140AA1F, 0x00000000, \
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/* 0x00088700 */ 0x00013FFF, 0x00000000, \
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/* 0x00088800 */ 0xFFEFDFD7, 0x1EDAFFFF, \
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/* 0x00088900 */ 0xFFFFFFFF, 0x002FFFFF, \
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/* 0x00088A00 */ 0xFF7FFFFF, 0x0007FFFF, \
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/* 0x00088B00 */ 0x00000000, 0xFFFFF000, \
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/* 0x00088C00 */ 0x0007BFE7, 0xFFC003FC, \
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/* 0x00088D00 */ 0xFFFFFFFF, 0x7C1F3FFF, \
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/* 0x00088E00 */ 0xFFFFFFFF, 0x00FFFFFF, \
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/* 0x00088F00 */ 0x00000000, 0xFE000000 }
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#define NV_PCFG_XVE_REGISTER_WR_COUNT 350
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#define NV_PCFG_XVE_REGISTER_WR_MAP { \
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/* 0x00088000 */ 0x3EF193FA, 0x1007C505, \
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/* 0x00088100 */ 0x3FFA0828, 0x00000000, \
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/* 0x00088200 */ 0x03200000, 0x00000000, \
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/* 0x00088300 */ 0x00000000, 0x00000000, \
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/* 0x00088400 */ 0x80007EC0, 0x3F075007, \
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/* 0x00088500 */ 0x000000BF, 0x00000000, \
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/* 0x00088600 */ 0x0140AA10, 0x00000000, \
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/* 0x00088700 */ 0x00013FFF, 0x00000000, \
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/* 0x00088800 */ 0x004C5FC3, 0x1C5AFFC0, \
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/* 0x00088900 */ 0xFFFC7804, 0x002FFFFF, \
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/* 0x00088A00 */ 0xFF7FFDFD, 0x00007FFF, \
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/* 0x00088B00 */ 0x00000000, 0xF8A54000, \
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/* 0x00088C00 */ 0x00003C01, 0x3FC003FC, \
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/* 0x00088D00 */ 0xFFFFFFFC, 0x701B2C3F, \
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/* 0x00088E00 */ 0xFFFFFFF8, 0x00FFBFFF, \
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/* 0x00088F00 */ 0x00000000, 0xFE000000 }
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#endif // {__dev_nv_pcfg_xve_regmap_h__}
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