289 lines
28 KiB
C
289 lines
28 KiB
C
// --------------------------------------------------------------------------------
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//
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#define NV_PGRAPH_PRI_SKED_CG 0x00407000 /* RWE4R */
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#define NV_PGRAPH_PRI_SKED_CG_IDLE_CG_DLY_CNT 5:0 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_CG_IDLE_CG_EN 6:6 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_CG_STATE_CG_EN 7:7 /* */
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#define NV_PGRAPH_PRI_SKED_CG_STATE_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PGRAPH_PRI_SKED_CG_STATE_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_STATE_CG_EN__PROD 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_STALL_CG_DLY_CNT 13:8 /* */
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#define NV_PGRAPH_PRI_SKED_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_STALL_CG_DLY_CNT__PROD 0x00000002 /* */
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#define NV_PGRAPH_PRI_SKED_CG_STALL_CG_EN 14:14 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_CG_STALL_CG_EN__PROD 0x00000001 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_CG_QUIESCENT_CG_EN 15:15 /* */
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#define NV_PGRAPH_PRI_SKED_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PGRAPH_PRI_SKED_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_QUIESCENT_CG_EN__PROD 0x00000001 /* */
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#define NV_PGRAPH_PRI_SKED_CG_WAKEUP_DLY_CNT 19:16 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_CNT 23:20 /* */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_CNT__PROD 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_DI_DT_SKEW_VAL 27:24 /* */
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#define NV_PGRAPH_PRI_SKED_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_EN 28:28 /* */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_EN__PROD 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_SW_OVER 29:29 /* */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_PAUSE_CG_EN 30:30 /* */
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#define NV_PGRAPH_PRI_SKED_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PGRAPH_PRI_SKED_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_PAUSE_CG_EN__PROD 0x00000001 /* */
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#define NV_PGRAPH_PRI_SKED_CG_HALT_CG_EN 31:31 /* */
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#define NV_PGRAPH_PRI_SKED_CG_HALT_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PGRAPH_PRI_SKED_CG_HALT_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG_HALT_CG_EN__PROD 0x00000000 /* */
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#define NV_PGRAPH_PRI_SKED_CG1 0x00407004 /* RWE4R */
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#define NV_PGRAPH_PRI_SKED_CG1_MONITOR_CG_EN 0:0 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_CG1_SLCG 8:1 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_CG1_SLCG_ENABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_CG1_SLCG_DISABLED 0x000000FF /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_CG1_SLCG__PROD 0x00000001 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR 0x00407020 /* RWE4R */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK33_SCG_TYPE_GO_IDLE_RESTRICTION 0:0 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK33_SCG_TYPE_GO_IDLE_RESTRICTION_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK33_SCG_TYPE_GO_IDLE_RESTRICTION_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK34_CTA_STEER_REG_WARP 1:1 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK34_CTA_STEER_REG_WARP_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK34_CTA_STEER_REG_WARP_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK28_PCAS_WITH_SEM 2:2 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK28_PCAS_WITH_SEM_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK28_PCAS_WITH_SEM_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK27_VSPAN_OVERFLOW 3:3 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK27_VSPAN_OVERFLOW_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK27_VSPAN_OVERFLOW_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK32_VSPAN_NONEMPTY_PREEMPT 4:4 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK32_VSPAN_NONEMPTY_PREEMPT_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK32_VSPAN_NONEMPTY_PREEMPT_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK25_THROTTLED_IS_RESTRICTED 5:5 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK25_THROTTLED_IS_RESTRICTED_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK25_THROTTLED_IS_RESTRICTED_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK24_CTA_RESUME 6:6 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK24_CTA_RESUME_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK24_CTA_RESUME_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK23_CONSTANT_BUFFER_SIZE 7:7 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK23_CONSTANT_BUFFER_SIZE_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK23_CONSTANT_BUFFER_SIZE_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK36_DEPENDENCE_COUNTER_UNDERFLOW 8:8 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK36_DEPENDENCE_COUNTER_UNDERFLOW_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK36_DEPENDENCE_COUNTER_UNDERFLOW_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK02_LOCAL_MEMORY_LOW_SIZE 9:9 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK02_LOCAL_MEMORY_LOW_SIZE_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK02_LOCAL_MEMORY_LOW_SIZE_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK03_LOCAL_MEMORY_HIGH_SIZE 10:10 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK03_LOCAL_MEMORY_HIGH_SIZE_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK03_LOCAL_MEMORY_HIGH_SIZE_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK04_LOCAL_MEMORY_CRS_SIZE 11:11 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK04_LOCAL_MEMORY_CRS_SIZE_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK04_LOCAL_MEMORY_CRS_SIZE_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK05_LOCAL_MEMORY_TOTAL_SIZE 12:12 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK05_LOCAL_MEMORY_TOTAL_SIZE_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK05_LOCAL_MEMORY_TOTAL_SIZE_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK06_REGISTER_COUNT 13:13 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK06_REGISTER_COUNT_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK06_REGISTER_COUNT_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK07_OUTER_PUT 14:14 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK07_OUTER_PUT_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK07_OUTER_PUT_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK08_INNER_PUT 15:15 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK08_INNER_PUT_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK08_INNER_PUT_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK09_INNER_GET 16:16 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK09_INNER_GET_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK09_INNER_GET_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK10_OUTER_GET 17:17 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK10_OUTER_GET_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK10_OUTER_GET_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK11_TOTAL_THREADS 18:18 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK11_TOTAL_THREADS_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK11_TOTAL_THREADS_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK35_IGNORE_VEID_CACHE_LINE 19:19 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK35_IGNORE_VEID_CACHE_LINE_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK35_IGNORE_VEID_CACHE_LINE_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK13_PROGRAM_OFFSET 20:20 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK13_PROGRAM_OFFSET_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK13_PROGRAM_OFFSET_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK14_SHARED_MEMORY_SIZE 21:21 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK14_SHARED_MEMORY_SIZE_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK14_SHARED_MEMORY_SIZE_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK15_UNUSED 22:22 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK15_UNUSED_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK15_UNUSED_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK16_CTA_THREAD_DIMENSION_ZERO 23:23 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK16_CTA_THREAD_DIMENSION_ZERO_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK16_CTA_THREAD_DIMENSION_ZERO_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK17_MEMORY_WINDOW_OVERLAP 24:24 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK17_MEMORY_WINDOW_OVERLAP_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK17_MEMORY_WINDOW_OVERLAP_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK18_L1_CONFIG_TOO_SMALL 25:25 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK18_L1_CONFIG_TOO_SMALL_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK18_L1_CONFIG_TOO_SMALL_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK19_CTA_REGISTER_CONSUMPTION 26:26 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK19_CTA_REGISTER_CONSUMPTION_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK19_CTA_REGISTER_CONSUMPTION_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK20_GET_PUT_TOO_LARGE 27:27 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK20_GET_PUT_TOO_LARGE_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK20_GET_PUT_TOO_LARGE_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK21_CIRCULAR_QUEUE_SIZE 28:28 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK21_CIRCULAR_QUEUE_SIZE_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK21_CIRCULAR_QUEUE_SIZE_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK22_INVALIDATE_ACTIVE_QMD 29:29 /* R-EVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK22_INVALIDATE_ACTIVE_QMD_FALSE 0x00000000 /* R-E-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_SKEDCHECK22_INVALIDATE_ACTIVE_QMD_TRUE 0x00000001 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_RESET 30:30 /* -WEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_RESET_NONACTIVE 0x0 /* -WE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_RESET_ACTIVE 0x1 /* -W--T */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN 0x00407024 /* RWE4R */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK33_SCG_TYPE_GO_IDLE_RESTRICTION 0:0 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK33_SCG_TYPE_GO_IDLE_RESTRICTION_FALSE 0x00000000 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK33_SCG_TYPE_GO_IDLE_RESTRICTION_TRUE 0x00000001 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK34_CTA_STEER_REG_WARP 1:1 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK34_CTA_STEER_REG_WARP_FALSE 0x00000000 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK34_CTA_STEER_REG_WARP_TRUE 0x00000001 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK28_PCAS_WITH_SEM 2:2 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK28_PCAS_WITH_SEM_FALSE 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK28_PCAS_WITH_SEM_TRUE 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK27_VSPAN_OVERFLOW 3:3 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK27_VSPAN_OVERFLOW_FALSE 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK27_VSPAN_OVERFLOW_TRUE 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK32_VSPAN_NONEMPTY_PREEMPT 4:4 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK32_VSPAN_NONEMPTY_PREEMPT_FALSE 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK32_VSPAN_NONEMPTY_PREEMPT_TRUE 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK25_THROTTLED_IS_RESTRICTED 5:5 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK25_THROTTLED_IS_RESTRICTED_FALSE 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK25_THROTTLED_IS_RESTRICTED_TRUE 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK24_CTA_RESUME 6:6 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK24_CTA_RESUME_FALSE 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK24_CTA_RESUME_TRUE 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK23_CONSTANT_BUFFER_SIZE 7:7 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK23_CONSTANT_BUFFER_SIZE_FALSE 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK23_CONSTANT_BUFFER_SIZE_TRUE 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK36_DEPENDENCE_COUNTER_UNDERFLOW 8:8 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK36_DEPENDENCE_COUNTER_UNDERFLOW_FALSE 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK36_DEPENDENCE_COUNTER_UNDERFLOW_TRUE 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK02_LOCAL_MEMORY_LOW_SIZE 9:9 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK02_LOCAL_MEMORY_LOW_SIZE_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK02_LOCAL_MEMORY_LOW_SIZE_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK03_LOCAL_MEMORY_HIGH_SIZE 10:10 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK03_LOCAL_MEMORY_HIGH_SIZE_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK03_LOCAL_MEMORY_HIGH_SIZE_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK04_LOCAL_MEMORY_CRS_SIZE 11:11 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK04_LOCAL_MEMORY_CRS_SIZE_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK04_LOCAL_MEMORY_CRS_SIZE_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK05_LOCAL_MEMORY_TOTAL_SIZE 12:12 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK05_LOCAL_MEMORY_TOTAL_SIZE_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK05_LOCAL_MEMORY_TOTAL_SIZE_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK06_REGISTER_COUNT 13:13 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK06_REGISTER_COUNT_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK06_REGISTER_COUNT_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK07_OUTER_PUT 14:14 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK07_OUTER_PUT_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK07_OUTER_PUT_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK08_INNER_PUT 15:15 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK08_INNER_PUT_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK08_INNER_PUT_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK09_INNER_GET 16:16 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK09_INNER_GET_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK09_INNER_GET_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK10_OUTER_GET 17:17 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK10_OUTER_GET_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK10_OUTER_GET_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK11_TOTAL_THREADS 18:18 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK11_TOTAL_THREADS_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK11_TOTAL_THREADS_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK35_IGNORE_VEID_CACHE_LINE 19:19 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK35_IGNORE_VEID_CACHE_LINE_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK35_IGNORE_VEID_CACHE_LINE_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK13_PROGRAM_OFFSET 20:20 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK13_PROGRAM_OFFSET_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK13_PROGRAM_OFFSET_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK14_SHARED_MEMORY_SIZE 21:21 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK14_SHARED_MEMORY_SIZE_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK14_SHARED_MEMORY_SIZE_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK15_UNUSED 22:22 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK15_UNUSED_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK15_UNUSED_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK16_CTA_THREAD_DIMENSION_ZERO 23:23 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK16_CTA_THREAD_DIMENSION_ZERO_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK16_CTA_THREAD_DIMENSION_ZERO_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK17_MEMORY_WINDOW_OVERLAP 24:24 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK17_MEMORY_WINDOW_OVERLAP_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK17_MEMORY_WINDOW_OVERLAP_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK18_L1_CONFIG_TOO_SMALL 25:25 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK18_L1_CONFIG_TOO_SMALL_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK18_L1_CONFIG_TOO_SMALL_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK19_CTA_REGISTER_CONSUMPTION 26:26 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK19_CTA_REGISTER_CONSUMPTION_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK19_CTA_REGISTER_CONSUMPTION_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK20_GET_PUT_TOO_LARGE 27:27 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK20_GET_PUT_TOO_LARGE_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK20_GET_PUT_TOO_LARGE_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK21_CIRCULAR_QUEUE_SIZE 28:28 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK21_CIRCULAR_QUEUE_SIZE_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK21_CIRCULAR_QUEUE_SIZE_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK22_INVALIDATE_ACTIVE_QMD 29:29 /* RWEVF */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK22_INVALIDATE_ACTIVE_QMD_DISABLED 0x00000000 /* RW--V */
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#define NV_PGRAPH_PRI_SKED_HWW_ESR_EN_SKEDCHECK22_INVALIDATE_ACTIVE_QMD_ENABLED 0x00000001 /* RWE-V */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_1 0x00407028 /* R--4R */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_1_VEID 7:0 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_1_VEID_0 0x00000000 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_1_CWD_SLOT 15:8 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_1_CWD_SLOT_0 0x00000000 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_2 0x0040702c /* R--4R */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_2_QMD_ID 31:0 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_2_QMD_ID_0 0x00000000 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_3 0x00407030 /* R--4R */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_3_FROM 23:0 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_3_FROM_0 0x00000000 /* R---V */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_3_DELTA 31:24 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_HWW_INFO_3_DELTA_0 0x00000000 /* R---V */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY 0x00407054 /* R--4R */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_SFE 2:0 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_SFE_IDLE 0x0 /* R---V */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_PP 5:3 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_PP_IDLE 0x0 /* R---V */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_TM 8:6 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_TM_IDLE 0x0 /* R---V */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_TFL 11:9 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_TFL_IDLE 0x0 /* R---V */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_CACHE 14:12 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_CACHE_IDLE 0x0 /* R---V */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_FBI_IF 17:15 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_FBI_IF_IDLE 0x0 /* R---V */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_FBI_CORE 20:18 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_FBI_CORE_IDLE 0x0 /* R---V */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_IQ 23:21 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_IQ_IDLE 0x0 /* R---V */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_SKED_FE 31:29 /* R-XVF */
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#define NV_PGRAPH_PRI_SKED_ACTIVITY_SKED_FE_IDLE 0x0 /* R---V */
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#define NV_PGRAPH_PRI_SKED_SUBCTX_WATERMARK(i) (0x004070a0+(i)*4) /* RWI4A */
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#define NV_PGRAPH_PRI_SKED_SUBCTX_WATERMARK__SIZE_1 16 /* */
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#define NV_PGRAPH_PRI_SKED_SUBCTX_WATERMARK_SUBCTX0 7:0 /* RWIVF */
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#define NV_PGRAPH_PRI_SKED_SUBCTX_WATERMARK_SUBCTX0_INIT 0x00000001 /* RWI-V */
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#define NV_PGRAPH_PRI_SKED_SUBCTX_WATERMARK_SUBCTX1 15:8 /* RWIVF */
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#define NV_PGRAPH_PRI_SKED_SUBCTX_WATERMARK_SUBCTX1_INIT 0x00000001 /* RWI-V */
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#define NV_PGRAPH_PRI_SKED_SUBCTX_WATERMARK_SUBCTX2 23:16 /* RWIVF */
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#define NV_PGRAPH_PRI_SKED_SUBCTX_WATERMARK_SUBCTX2_INIT 0x00000001 /* RWI-V */
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#define NV_PGRAPH_PRI_SKED_SUBCTX_WATERMARK_SUBCTX3 31:24 /* RWIVF */
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#define NV_PGRAPH_PRI_SKED_SUBCTX_WATERMARK_SUBCTX3_INIT 0x00000001 /* RWI-V */
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//
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// --------------------------------------------------------------------------------
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