1030 lines
89 KiB
C
1030 lines
89 KiB
C
/* _NVRM_COPYRIGHT_BEGIN_
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*
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* Copyright 2003-2016 by NVIDIA Corporation. All rights reserved. All
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* information contained herein is proprietary and confidential to NVIDIA
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* Corporation. Any use, reproduction, or disclosure without the written
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* permission of NVIDIA Corporation is prohibited.
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*
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* _NVRM_COPYRIGHT_END_
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*/
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#ifndef __ga102_dev_ppc_h__
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#define __ga102_dev_ppc_h__
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/* This file is autogenerated. Do not edit */
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#define NV_PPPC 0x000001ff:0x00000000 /* RW--D */
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#define NV_PPPC_PRI /* RW--L */
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#define NV_PPPC_PRI_PES 0x0000007F:0x00000000 /* RW--L */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK 0x00000050 /* RWB4R */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "ba" /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWB-V */
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#define NV_PPPC_PRI_PES_BLKCG_CG 0x00000000 /* RWE4R */
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#define NV_PPPC_PRI_PES_BLKCG_CG__PRIV_LEVEL_MASK 0x00000050 /* */
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#define NV_PPPC_PRI_PES_BLKCG_CG_BLKACTIVITY_ENABLE 2:2 /* RWEVF */
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#define NV_PPPC_PRI_PES_BLKCG_CG_BLKACTIVITY_ENABLE_DISABLE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_BLKCG_CG_BLKACTIVITY_ENABLE_ENABLE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_BLKCG_CG_BLKACTIVITY_ENABLE_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_BLKCG_CG_BLKACTIVITY_ERR 3:3 /* RWEVF */
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#define NV_PPPC_PRI_PES_BLKCG_CG_BLKACTIVITY_ERR_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_BLKCG_CG_BLKACTIVITY_ERR_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_BLKCG_CG_BLKACTIVITY_ERR_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP 0x00000004 /* RWE4R */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_STIPPLE_DISABLE 0:0 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_STIPPLE_DISABLE_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_STIPPLE_DISABLE_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_STIPPLE_DISABLE_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_FETCH_REPACK 1:1 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_FETCH_REPACK_DISABLE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_FETCH_REPACK_ENABLE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_FETCH_REPACK_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_LFO 2:2 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_LFO_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_LFO_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_LFO_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_NODEN 3:3 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_NODEN_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_NODEN_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_NODEN_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_NAN_DEL 4:4 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_NAN_DEL_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_NAN_DEL_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_DISABLE_NAN_DEL_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE5 5:5 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE5_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE5_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE5_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE6 6:6 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE6_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE6_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE6_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE7 7:7 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE7_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE7_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CLIP_SPARE7_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC 0x00000008 /* RWE4R */
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#define NV_PPPC_PRI_PES_VSC_VPC_CULL_DISABLE 0:0 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_CULL_DISABLE_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CULL_DISABLE_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_CULL_DISABLE_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_MPC_CULL_DISABLE 1:1 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_MPC_CULL_DISABLE_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_MPC_CULL_DISABLE_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_MPC_CULL_DISABLE_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_FAST_MODE_SWITCH 2:2 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_FAST_MODE_SWITCH_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_FAST_MODE_SWITCH_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_FAST_MODE_SWITCH_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_TIER_1_STYLE_LINES_AND_POINTS 3:3 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_TIER_1_STYLE_LINES_AND_POINTS_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_TIER_1_STYLE_LINES_AND_POINTS_ENABLE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_TIER_1_STYLE_LINES_AND_POINTS_DISABLE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_MAX_VIEWPORT_BBOX_FOR_CLAMPED_PRIMS 4:4 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_MAX_VIEWPORT_BBOX_FOR_CLAMPED_PRIMS_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_MAX_VIEWPORT_BBOX_FOR_CLAMPED_PRIMS_ENABLE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_MAX_VIEWPORT_BBOX_FOR_CLAMPED_PRIMS_DISABLE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_WID_RECTS_CULL 5:5 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_WID_RECTS_CULL_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_WID_RECTS_CULL_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_WID_RECTS_CULL_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_L1 0x0000000c /* RWE4R */
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#define NV_PPPC_PRI_PES_VSC_L1_DM_CACHE_DISABLE 0:0 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_L1_DM_CACHE_DISABLE_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_L1_DM_CACHE_DISABLE_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_L1_DM_CACHE_DISABLE_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_L1_SWITCH_SM_LIMIT 4:1 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_L1_SWITCH_SM_LIMIT_INIT 0x00000004 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG 0x00000010 /* RWE4R */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_CULL_EN 0:0 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_CULL_EN_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_CULL_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_CULL_EN_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_DIAMOND_CULL_EN 1:1 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_DIAMOND_CULL_EN_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_DIAMOND_CULL_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_DIAMOND_CULL_EN_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SMALL_LINE_CULL_EN 2:2 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SMALL_LINE_CULL_EN_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SMALL_LINE_CULL_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SMALL_LINE_CULL_EN_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_BBOX_CULL 3:3 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_BBOX_CULL_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_BBOX_CULL_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_BBOX_CULL_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_DIAMOND_CULL 4:4 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_DIAMOND_CULL_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_DIAMOND_CULL_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_DIAMOND_CULL_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_SMALL_LINE_CULL 5:5 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_SMALL_LINE_CULL_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_SMALL_LINE_CULL_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FLIP_SMALL_LINE_CULL_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_CULL_VC_MODES 6:6 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_CULL_VC_MODES_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_CULL_VC_MODES_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_CULL_VC_MODES_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CLIP_SINGLE_TRI 7:7 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CLIP_SINGLE_TRI_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CLIP_SINGLE_TRI_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CLIP_SINGLE_TRI_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SURFACE_CULL_EN 8:8 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SURFACE_CULL_EN_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SURFACE_CULL_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SURFACE_CULL_EN_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCISSOR_CULL_EN 9:9 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCISSOR_CULL_EN_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCISSOR_CULL_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCISSOR_CULL_EN_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SHRINK_DISABLE 10:10 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SHRINK_DISABLE_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SHRINK_DISABLE_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SHRINK_DISABLE_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BACKFACE_CULL_EN 11:11 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BACKFACE_CULL_EN_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BACKFACE_CULL_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BACKFACE_CULL_EN_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BROADCAST_STIPPLE_EN 12:12 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BROADCAST_STIPPLE_EN_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BROADCAST_STIPPLE_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BROADCAST_STIPPLE_EN_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SET_COUNTERS 13:13 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SET_COUNTERS_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SET_COUNTERS_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SET_COUNTERS_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SEND_CULLED_POLYGONS 14:14 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SEND_CULLED_POLYGONS_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SEND_CULLED_POLYGONS_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SEND_CULLED_POLYGONS_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_BLOAT_AA_POINT 15:15 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_BLOAT_AA_POINT_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_BLOAT_AA_POINT_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_BLOAT_AA_POINT_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCOUNT_EMAX_EN 16:16 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCOUNT_EMAX_EN_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCOUNT_EMAX_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCOUNT_EMAX_EN_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCISSOR_CULL_BLOAT 17:17 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCISSOR_CULL_BLOAT_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCISSOR_CULL_BLOAT_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_SCISSOR_CULL_BLOAT_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_24_BIT_STIPPLE_PHASE 18:18 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_24_BIT_STIPPLE_PHASE_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_24_BIT_STIPPLE_PHASE_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_24_BIT_STIPPLE_PHASE_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_DIAMOND_EXIT 19:19 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_DIAMOND_EXIT_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_DIAMOND_EXIT_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_DIAMOND_EXIT_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SMOOTH_LINES 20:20 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SMOOTH_LINES_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SMOOTH_LINES_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SMOOTH_LINES_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_ROTATED_GRID 21:21 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_ROTATED_GRID_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_ROTATED_GRID_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_ROTATED_GRID_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SM_LINE_DIAMOND 23:23 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SM_LINE_DIAMOND_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SM_LINE_DIAMOND_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_BBOX_SM_LINE_DIAMOND_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CBE_WRITE_SLOWDOWN 22:22 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CBE_WRITE_SLOWDOWN_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CBE_WRITE_SLOWDOWN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CBE_WRITE_SLOWDOWN_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_DISABLE_NIC_CG_FIX 24:24 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_DISABLE_NIC_CG_FIX_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_DISABLE_NIC_CG_FIX_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_DISABLE_NIC_CG_FIX_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CLIP_BBOX_TO_SCISSOR 25:25 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CLIP_BBOX_TO_SCISSOR_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CLIP_BBOX_TO_SCISSOR_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_CLIP_BBOX_TO_SCISSOR_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_TIGHTEN_SCISSOR_BBOX 26:26 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_TIGHTEN_SCISSOR_BBOX_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_TIGHTEN_SCISSOR_BBOX_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_TIGHTEN_SCISSOR_BBOX_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FIX_BMAP_COUNTER 27:27 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FIX_BMAP_COUNTER_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FIX_BMAP_COUNTER_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FIX_BMAP_COUNTER_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_PE2MPCDONE_ORDER_DISABLE 28:28 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_PE2MPCDONE_ORDER_DISABLE_DISABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_PE2MPCDONE_ORDER_DISABLE_ENABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_PE2MPCDONE_ORDER_DISABLE_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_PROV_LOOKAHEAD 29:29 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_PROV_LOOKAHEAD_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_PROV_LOOKAHEAD_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_PROV_LOOKAHEAD_INIT 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_2BATCH_CBE_OPT 30:30 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_2BATCH_CBE_OPT_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_2BATCH_CBE_OPT_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_2BATCH_CBE_OPT_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_2BATCH_VCACHE_OPT 31:31 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_2BATCH_VCACHE_OPT_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_2BATCH_VCACHE_OPT_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_VPC_DEBUG_FGS_2BATCH_VCACHE_OPT_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_PM 0x00000014 /* RWE4R */
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#define NV_PPPC_PRI_PES_PM_SELECT 7:0 /* RWEVF */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_TG 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_VSC 0x00000002 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_PEM 0x00000003 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_CG_STATUS_TG 0x00000004 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_CG_STATUS_VSC 0x00000005 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_CG_STATUS 0x00000006 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_BLK_ACTIVITY 0x00000007 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_WAKEUP 0x00000008 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_CPO_GRP_0 0x00000009 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_CPO_GRP_1 0x0000000a /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_SSYNC_GRP_0 0x0000000b /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STREAM_GRP_0 0x0000000c /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STREAM_GRP_1 0x0000000d /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STREAM_GRP_2 0x0000000e /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STREAM_GRP_3 0x0000000f /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_0 0x00000010 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_1 0x00000011 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_2 0x00000012 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_3 0x00000013 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_4 0x00000014 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_5 0x00000015 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_6 0x00000016 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_7 0x00000017 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_8 0x00000018 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_9 0x00000019 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_10 0x0000001a /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_11 0x0000001b /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_12 0x0000001c /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_13 0x0000001d /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_14 0x0000001e /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_15 0x0000001f /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_16 0x00000020 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_17 0x00000021 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_TG_GRP_18 0x00000022 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_0 0x00000023 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_1 0x00000024 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_2 0x00000025 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_3 0x00000026 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_4 0x00000027 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_5 0x00000028 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_6 0x00000029 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_7 0x0000002a /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_8 0x0000002b /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PVLDRDY1 0x0000002c /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PVLDRDY2 0x0000002d /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PVLDRDY3 0x0000002e /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PVLDRDY4 0x0000002f /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VALID1 0x00000030 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VALID2 0x00000031 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VALID3 0x00000032 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PVLDRDY5 0x00000033 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PVLDRDY6 0x00000034 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_9 0x00000035 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_10 0x00000036 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_11 0x00000037 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PG_STATUS 0x00000038 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_1 0x00000040 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_2 0x00000041 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_3 0x00000042 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_4 0x00000043 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_5 0x00000044 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_6 0x00000045 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_7 0x00000046 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_8 0x00000047 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_9 0x00000048 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_10 0x00000049 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_11 0x0000004a /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_12 0x0000004b /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_13 0x0000004c /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_14 0x0000004d /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_15 0x0000004e /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_16 0x0000004f /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_17 0x00000050 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_18 0x00000051 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_19 0x00000052 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_20 0x00000053 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_21 0x00000054 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_22 0x00000055 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_23 0x00000056 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_24 0x00000057 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_25 0x00000058 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_26 0x00000059 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_27 0x0000005a /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_28 0x0000005b /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_29 0x0000005c /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_30 0x0000005d /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_31 0x0000005e /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_32 0x0000005f /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_33 0x00000060 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_34 0x00000061 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_35 0x00000062 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_36 0x00000063 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_37 0x00000064 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_38 0x00000065 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_39 0x00000066 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_40 0x00000067 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_41 0x00000068 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_42 0x00000069 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_43 0x0000006a /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_44 0x0000006b /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_45 0x0000006c /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_46 0x0000006d /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_PEM_GRP_47 0x0000006e /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_12 0x00000070 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_13 0x00000071 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_14 0x00000072 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_15 0x00000073 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_16 0x00000074 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_17 0x00000075 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_18 0x00000076 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_19 0x00000077 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_20 0x00000078 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_VPC_GRP_21 0x00000079 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_GRP_19 0x00000080 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_GRP_20 0x00000081 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_GRP_21 0x00000082 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_GRP_22 0x00000083 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_GRP_23 0x00000084 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_GRP_24 0x00000085 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_GRP_25 0x00000086 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_GRP_26 0x00000087 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_GRP_27 0x00000088 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATUS_GRP_28 0x00000089 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_BA_GRP_1 0x00000090 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_BA_GRP_2 0x00000091 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_BA_GRP_3 0x00000092 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_SINGLE_PASS_GRP1 0x00000093 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATIC_PATTERN_2A_6_GROUP 0x000000a0 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_STATIC_PATTERN_15_6_GROUP 0x000000a1 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_PM_SELECT_CTL_EN 8:8 /* RWEVF */
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#define NV_PPPC_PRI_PES_PM_SELECT_CTL_EN_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_PM_SELECT_CTL_EN_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_PM_SELECT_CTL_EN_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_STREAM 0x00000018 /* RWE4R */
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#define NV_PPPC_PRI_PES_VSC_STREAM_MASTER_PE 0:0 /* RWEVF */
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#define NV_PPPC_PRI_PES_VSC_STREAM_MASTER_PE_INIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_VSC_STREAM_MASTER_PE_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_STREAM_MASTER_PE_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_STATUS 0x0000001c /* R-E4R */
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#define NV_PPPC_PRI_PES_STATUS_PES 2:0 /* R-EVF */
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#define NV_PPPC_PRI_PES_STATUS_PES_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_STATUS_TGA 5:3 /* R-EVF */
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#define NV_PPPC_PRI_PES_STATUS_TGA_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_STATUS_VSC 8:6 /* R-EVF */
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#define NV_PPPC_PRI_PES_STATUS_VSC_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_STATUS_TGB 11:9 /* R-EVF */
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#define NV_PPPC_PRI_PES_STATUS_TGB_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_STATUS_PEM 14:12 /* R-EVF */
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#define NV_PPPC_PRI_PES_STATUS_PEM_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_STATUS_CACHE 17:15 /* R-EVF */
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#define NV_PPPC_PRI_PES_STATUS_CACHE_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_VSC_STATUS 0x00000020 /* R-E4R */
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#define NV_PPPC_PRI_PES_VSC_STATUS_IFACE 2:0 /* R-EVF */
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#define NV_PPPC_PRI_PES_VSC_STATUS_IFACE_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_VSC_STATUS_SYNC 5:3 /* R-EVF */
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#define NV_PPPC_PRI_PES_VSC_STATUS_SYNC_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_VSC_STATUS_SCOUNT 8:6 /* R-EVF */
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#define NV_PPPC_PRI_PES_VSC_STATUS_SCOUNT_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_VSC_STATUS_PFETCH 11:9 /* R-EVF */
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#define NV_PPPC_PRI_PES_VSC_STATUS_PFETCH_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_VSC_STATUS_CLIP 14:12 /* R-EVF */
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#define NV_PPPC_PRI_PES_VSC_STATUS_CLIP_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_VSC_STATUS_CULL 17:15 /* R-EVF */
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#define NV_PPPC_PRI_PES_VSC_STATUS_CULL_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_VSC_STATUS_CBMGR 20:18 /* R-EVF */
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#define NV_PPPC_PRI_PES_VSC_STATUS_CBMGR_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_VSC_STATUS_WWDX 23:21 /* R-EVF */
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#define NV_PPPC_PRI_PES_VSC_STATUS_WWDX_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_VSC_STATUS_DOUT 26:24 /* R-EVF */
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#define NV_PPPC_PRI_PES_VSC_STATUS_DOUT_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_VSC_STATUS_NIC 29:27 /* R-EVF */
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#define NV_PPPC_PRI_PES_VSC_STATUS_NIC_INIT 0x00000000 /* R-E-V */
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#define NV_PPPC_PRI_PES_TG 0x00000024 /* RWI4R */
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#define NV_PPPC_PRI_PES_TG_USE_SW_COMPUTED_GS_CONSTRAINT_V 0:0 /* RWIVF */
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#define NV_PPPC_PRI_PES_TG_USE_SW_COMPUTED_GS_CONSTRAINT_V_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_PES_TG_CONSTRAINT_BALANCE_LOAD 1:1 /* RWIVF */
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#define NV_PPPC_PRI_PES_TG_CONSTRAINT_BALANCE_LOAD_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_TG_CONSTRAINT_BALANCE_LOAD_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_TG_CONSTRAINT_BALANCE_LOAD_INIT 0x00000001 /* RWI-V */
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#define NV_PPPC_PRI_PES_TG_SCAN_INTERIOR_HORIZONTALLY 2:2 /* RWIVF */
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#define NV_PPPC_PRI_PES_TG_SCAN_INTERIOR_HORIZONTALLY_INIT 0x00000001 /* RWI-V */
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#define NV_PPPC_PRI_PES_TG_VERTEX_REORDERING 3:3 /* RWIVF */
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#define NV_PPPC_PRI_PES_TG_VERTEX_REORDERING_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_TG_VERTEX_REORDERING_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_TG_VERTEX_REORDERING_INIT 0x00000001 /* RWI-V */
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#define NV_PPPC_PRI_PES_TG_WINDING_SWAP 4:4 /* RWIVF */
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#define NV_PPPC_PRI_PES_TG_WINDING_SWAP_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_TG_WINDING_SWAP_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_TG_WINDING_SWAP_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_PES_VSC_MODES 0x00000054 /* RWI4R */
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#define NV_PPPC_PRI_PES_VSC_MODES_FORCE_SWIZZLE_NEG_W_TO_ONE 0:0 /* RWIVF */
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#define NV_PPPC_PRI_PES_VSC_MODES_FORCE_SWIZZLE_NEG_W_TO_ONE_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_MODES_FORCE_SWIZZLE_NEG_W_TO_ONE_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_MODES_FORCE_SWIZZLE_NEG_W_TO_ONE_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_PES_VSC_MODES_PROVOKING_FIRST_DX_MODE 2:1 /* RWIVF */
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#define NV_PPPC_PRI_PES_VSC_MODES_PROVOKING_FIRST_DX_MODE_NO_ROTATE_DEFAULT 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_MODES_PROVOKING_FIRST_DX_MODE_ROTATE_DEPENDS_ON_BARYCENTRICS 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_MODES_PROVOKING_FIRST_DX_MODE_ROTATE_LEGACY 0x00000002 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_MODES_PROVOKING_FIRST_DX_MODE_ROTATE_RESERVED 0x00000003 /* RW--V */
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#define NV_PPPC_PRI_PES_VSC_MODES_PROVOKING_FIRST_DX_MODE_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_PES_CG 0x00000028 /* RWE4R */
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#define NV_PPPC_PRI_PES_CG_IDLE_CG_DLY_CNT 5:0 /* RWEVF */
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#define NV_PPPC_PRI_PES_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */
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#define NV_PPPC_PRI_PES_CG_IDLE_CG_EN 6:6 /* RWEVF */
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#define NV_PPPC_PRI_PES_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_CG_STATE_CG_EN 7:7 /* */
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#define NV_PPPC_PRI_PES_CG_STATE_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_PES_CG_STATE_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_STATE_CG_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_STALL_CG_DLY_CNT 13:8 /* */
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#define NV_PPPC_PRI_PES_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_STALL_CG_DLY_CNT__PROD 0x00000002 /* */
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#define NV_PPPC_PRI_PES_CG_STALL_CG_EN 14:14 /* RWEVF */
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#define NV_PPPC_PRI_PES_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_CG_QUIESCENT_CG_EN 15:15 /* */
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#define NV_PPPC_PRI_PES_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_PES_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_QUIESCENT_CG_EN__PROD 0x00000001 /* */
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#define NV_PPPC_PRI_PES_CG_WAKEUP_DLY_CNT 19:16 /* RWEVF */
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#define NV_PPPC_PRI_PES_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_CNT 23:20 /* */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_CNT__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_DI_DT_SKEW_VAL 27:24 /* */
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#define NV_PPPC_PRI_PES_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_EN 28:28 /* */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_SW_OVER 29:29 /* */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_PAUSE_CG_EN 30:30 /* */
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#define NV_PPPC_PRI_PES_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_PES_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_PAUSE_CG_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_HALT_CG_EN 31:31 /* */
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#define NV_PPPC_PRI_PES_CG_HALT_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_PES_CG_HALT_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG_HALT_CG_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_PES_CG1 0x0000002C /* RWE4R */
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#define NV_PPPC_PRI_PES_CG1_MONITOR_CG_EN 0:0 /* RWEVF */
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#define NV_PPPC_PRI_PES_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_PES_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_PES_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_CG1_SLCG 31:1 /* RWEVF */
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#define NV_PPPC_PRI_PES_CG1_SLCG_ENABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_PES_CG1_SLCG_DISABLED 0x7FFFFFFF /* RWE-V */
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#define NV_PPPC_PRI_PES_CG1_SLCG__PROD 0x0208AFE0 /* RW--V */
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#define NV_PPPC_PRI_PES_HWW_ESR 0x00000038 /* RWE4R */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_BD_P01_ERR 0:0 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_BD_P01_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_BD_P01_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_BD_P02_ERR 1:1 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_BD_P02_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_BD_P02_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_BD_P12_ERR 2:2 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_BD_P12_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_BD_P12_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_TK_P01_ERR 3:3 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_TK_P01_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_TK_P01_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_TK_P02_ERR 4:4 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_TK_P02_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_TK_P02_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_TK_P12_ERR 5:5 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_TK_P12_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_TK_P12_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_WK_P01_ERR 6:6 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_WK_P01_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_WK_P01_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_WK_P02_ERR 7:7 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_WK_P02_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_WK_P02_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_WK_P12_ERR 8:8 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_WK_P12_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_ALPHA_WK_P12_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_BD_P01_ERR 9:9 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_BD_P01_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_BD_P01_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_BD_P02_ERR 10:10 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_BD_P02_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_BD_P02_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_BD_P12_ERR 11:11 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_BD_P12_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_BD_P12_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_TK_P01_ERR 12:12 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_TK_P01_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_TK_P01_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_TK_P02_ERR 13:13 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_TK_P02_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_TK_P02_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_TK_P12_ERR 14:14 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_TK_P12_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_TK_P12_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_WK_P01_ERR 15:15 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_WK_P01_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_WK_P01_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_WK_P02_ERR 16:16 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_WK_P02_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_WK_P02_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_WK_P12_ERR 17:17 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_WK_P12_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_VSC_BETA_WK_P12_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_BD_P01_ERR 18:18 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_BD_P01_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_BD_P01_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_BD_P02_ERR 19:19 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_BD_P02_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_BD_P02_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_BD_P12_ERR 20:20 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_BD_P12_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_BD_P12_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_TK_P01_ERR 21:21 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_TK_P01_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_TK_P01_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_TK_P02_ERR 22:22 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_TK_P02_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_TK_P02_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_TK_P12_ERR 23:23 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_TK_P12_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_TK_P12_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_WK_P01_ERR 24:24 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_WK_P01_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_WK_P01_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_WK_P02_ERR 25:25 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_WK_P02_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_WK_P02_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_WK_P12_ERR 26:26 /* R-EVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_WK_P12_ERR_NOT_PENDING 0x0 /* R-E-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_PEM_TGB_FILL_WK_P12_ERR_PENDING 0x1 /* R---V */
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#define NV_PPPC_PRI_PES_HWW_ESR_RESET 30:30 /* -WEVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_RESET_TASK 0x1 /* -W--T */
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#define NV_PPPC_PRI_PES_HWW_ESR_RESET_INIT 0x0 /* -WE-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_EN 31:31 /* RWEVF */
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#define NV_PPPC_PRI_PES_HWW_ESR_EN_INIT 0x1 /* RWE-V */
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#define NV_PPPC_PRI_PES_HWW_ESR_EN_DISABLE 0x0 /* RW--V */
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#define NV_PPPC_PRI_PES_HWW_ESR_EN_ENABLE 0x1 /* RW--V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_A 0x0000003C /* RW-4R */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_A__PRIV_LEVEL_MASK 0x00000050 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_A_1 9:0 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_A_1_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_A_2 19:10 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_A_2_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_A_3 29:20 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_A_3_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_B 0x00000040 /* RW-4R */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_B__PRIV_LEVEL_MASK 0x00000050 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_B_4 9:0 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_B_4_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_B_5 19:10 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_B_5_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_B_6 29:20 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_B_6_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_C 0x00000044 /* RW-4R */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_C__PRIV_LEVEL_MASK 0x00000050 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_C_7 9:0 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_C_7_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_C_8 19:10 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_C_8_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_C_9 29:20 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_C_9_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_D 0x00000048 /* RW-4R */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_D__PRIV_LEVEL_MASK 0x00000050 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_D_10 9:0 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_D_10_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_D_11 19:10 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_D_11_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_D_12 29:20 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_D_12_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_E 0x0000004C /* RW-4R */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_E__PRIV_LEVEL_MASK 0x00000050 /* */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_E_13 9:0 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_E_13_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_E_14 19:10 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_E_14_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_E_15 29:20 /* RWBVF */
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#define NV_PPPC_PRI_PES_BLK_ACTIVITY_WEIGHTS_E_15_INIT 0x00000000 /* RWB-V */
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#define NV_PPPC_PRI_WWDX 0x000001FF:0x00000100 /* RW--L */
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#define NV_PPPC_PRI_WWDX_GPC_MAP(i) (0x00000100+(i)*4) /* RWI4A */
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#define NV_PPPC_PRI_WWDX_GPC_MAP__SIZE_1 43 /* */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE0 4:0 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE0_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE1 9:5 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE1_INIT 0x00000001 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE2 14:10 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE2_INIT 0x00000002 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE3 19:15 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE3_INIT 0x00000003 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE4 24:20 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE4_INIT 0x00000004 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE5 29:25 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_GPC_MAP_TILE5_INIT 0x00000005 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG 0x000001D0 /* RWI4R */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_ROW_OFFSET 7:0 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_ROW_OFFSET_INIT 0x00000003 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_NUM_ENTRIES 15:8 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_NUM_ENTRIES_INIT 1 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_NORMALIZED_NUM_ENTRIES 20:16 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_NORMALIZED_NUM_ENTRIES_INIT 0x00000010 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_NORMALIZED_SHIFT_VALUE 23:21 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_NORMALIZED_SHIFT_VALUE_INIT 0x00000004 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_SM_NUM_RCP 0x000001D4 /* RWE4R */
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#define NV_PPPC_PRI_WWDX_SM_NUM_RCP_CONSERVATIVE 23:0 /* RWEVF */
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#define NV_PPPC_PRI_WWDX_SM_NUM_RCP_CONSERVATIVE_MAX 0x800000 /* */
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#define NV_PPPC_PRI_WWDX_SM_NUM_RCP_CONSERVATIVE_INIT 0x00800000 /* RWE-V */
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#define NV_PPPC_PRI_WWDX_PM 0x000001DC /* RWE4R */
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#define NV_PPPC_PRI_WWDX_PM_SELECT 5:0 /* RWEVF */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP0 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP1 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP2 0x00000002 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP3 0x00000003 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP4 0x00000004 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP5 0x00000005 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP6 0x00000006 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP7 0x00000007 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP8 0x00000008 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP9 0x00000009 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP10 0x0000000a /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP11 0x0000000b /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP12 0x0000000c /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP13 0x0000000d /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP14 0x0000000e /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP15 0x0000000f /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP16 0x00000010 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP17 0x00000011 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP18 0x00000012 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP19 0x00000013 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP20 0x00000014 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP21 0x00000015 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP22 0x00000016 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP23 0x00000017 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP24 0x00000018 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP25 0x00000019 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP26 0x0000001a /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP27 0x0000001b /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP28 0x0000001c /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP29 0x0000001d /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP30 0x0000001e /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP31 0x0000001f /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP32 0x00000020 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP33 0x00000021 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP34 0x00000022 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP35 0x00000023 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP36 0x00000024 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP37 0x00000025 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP38 0x00000026 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP39 0x00000027 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP40 0x00000028 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP41 0x00000029 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP42 0x0000002a /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP43 0x0000002b /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP44 0x0000002c /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP45 0x0000002d /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP46 0x0000002e /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP47 0x0000002f /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP48 0x00000030 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP49 0x00000031 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP50 0x00000032 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP51 0x00000033 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP52 0x00000034 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP53 0x00000035 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP54 0x00000036 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP55 0x00000037 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP56 0x00000038 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP57 0x00000039 /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP58 0x0000003A /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_GRP59 0x0000003B /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_DEBUG_SIGNAL_GPC_INSTANCE_ID_GROUP 0x0000003C /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_DEBUG_SIGNAL_TPC_INSTANCE_ID_GROUP 0x0000003D /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_STATIC_PATTERN_2AAA_15_GROUP 0x0000003e /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_STATIC_PATTERN_5555_15_GROUP 0x0000003f /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_SELECT_MAX 0x0000003f /* RW--V */
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#define NV_PPPC_PRI_WWDX_PM_ENABLE 31:31 /* RWEVF */
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#define NV_PPPC_PRI_WWDX_PM_ENABLE_OFF 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_WWDX_PM_ENABLE_ON 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CONFIG 0x000001E0 /* RWI4R */
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#define NV_PPPC_PRI_WWDX_CONFIG_CACHETILE_COVERAGE_BBOX 15:15 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_CONFIG_CACHETILE_COVERAGE_BBOX_DISABLE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CONFIG_CACHETILE_COVERAGE_BBOX_ENABLE 0x00000001 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_CONFIG_RESERVED 21:16 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_CONFIG_RESERVED_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_CONFIG_FORCE_CBE_ADDR_TO_ALL_GPCS 22:22 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_CONFIG_FORCE_CBE_ADDR_TO_ALL_GPCS_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_CONFIG_FORCE_CBE_ADDR_TO_ALL_GPCS_FALSE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CONFIG_FORCE_CBE_ADDR_TO_ALL_GPCS_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CONFIG_FORCE_PRIMS_TO_ALL_GPCS 23:23 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_CONFIG_FORCE_PRIMS_TO_ALL_GPCS_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_CONFIG_FORCE_PRIMS_TO_ALL_GPCS_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CONFIG_PRIORITIZE_ALPHA_CBES 24:24 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_CONFIG_PRIORITIZE_ALPHA_CBES_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_CONFIG_PRIORITIZE_ALPHA_CBES_TRUE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CONFIG_TASK_FIFO_REDUCE_DIV32 28:26 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_CONFIG_TASK_FIFO_REDUCE_DIV32_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_CONFIG_TASK_FIFO_REDUCE_DIV32_FULLSIZE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CONFIG_PRIM_FIFO_REDUCE_DIV32 30:29 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_CONFIG_PRIM_FIFO_REDUCE_DIV32_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_CONFIG_PRIM_FIFO_REDUCE_DIV32_FULLSIZE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CONFIG_TILED_CACHING 31:31 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_CONFIG_TILED_CACHING_ENABLE 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CONFIG_TILED_CACHING_DISABLE 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CONFIG_TILED_CACHING_INIT 0x00000001 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_COEFF(i) (0x000001b0+(i)*4) /* RWI4A */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_COEFF__SIZE_1 5 /* */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_COEFF_0_MOD_VALUE 7:0 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_COEFF_0_MOD_VALUE_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_COEFF_1_MOD_VALUE 15:8 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_COEFF_1_MOD_VALUE_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_COEFF_2_MOD_VALUE 23:16 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_COEFF_2_MOD_VALUE_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_COEFF_3_MOD_VALUE 31:24 /* RWIVF */
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#define NV_PPPC_PRI_WWDX_MAP_TABLE_CONFIG_COEFF_3_MOD_VALUE_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_WWDX_CG 0x000001E8 /* RWE4R */
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#define NV_PPPC_PRI_WWDX_CG_IDLE_CG_DLY_CNT 5:0 /* RWEVF */
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#define NV_PPPC_PRI_WWDX_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_WWDX_CG_IDLE_CG_DLY_CNT__PROD 0x00000004 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CG_IDLE_CG_EN 6:6 /* RWEVF */
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#define NV_PPPC_PRI_WWDX_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_WWDX_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CG_STATE_CG_EN 7:7 /* */
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#define NV_PPPC_PRI_WWDX_CG_STATE_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_WWDX_CG_STATE_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_STATE_CG_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_STALL_CG_DLY_CNT 13:8 /* */
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#define NV_PPPC_PRI_WWDX_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_STALL_CG_DLY_CNT__PROD 0x00000004 /* */
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#define NV_PPPC_PRI_WWDX_CG_STALL_CG_EN 14:14 /* RWEVF */
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#define NV_PPPC_PRI_WWDX_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_WWDX_CG_STALL_CG_EN__PROD 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CG_QUIESCENT_CG_EN 15:15 /* */
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#define NV_PPPC_PRI_WWDX_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_WWDX_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_QUIESCENT_CG_EN__PROD 0x00000001 /* */
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#define NV_PPPC_PRI_WWDX_CG_WAKEUP_DLY_CNT 19:16 /* RWEVF */
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#define NV_PPPC_PRI_WWDX_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_WWDX_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_CNT 23:20 /* */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_CNT__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_DI_DT_SKEW_VAL 27:24 /* */
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#define NV_PPPC_PRI_WWDX_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_EN 28:28 /* */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_SW_OVER 29:29 /* */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_PAUSE_CG_EN 30:30 /* */
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#define NV_PPPC_PRI_WWDX_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_WWDX_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_PAUSE_CG_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_HALT_CG_EN 31:31 /* */
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#define NV_PPPC_PRI_WWDX_CG_HALT_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_WWDX_CG_HALT_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG_HALT_CG_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_WWDX_CG1 0x000001EC /* RWE4R */
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#define NV_PPPC_PRI_WWDX_CG1_MONITOR_CG_EN 0:0 /* RWEVF */
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#define NV_PPPC_PRI_WWDX_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_WWDX_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CG1_SLCG 31:1 /* RWEVF */
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#define NV_PPPC_PRI_WWDX_CG1_SLCG_ENABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_WWDX_CG1_SLCG_DISABLED 0x7FFFFFFF /* RWE-V */
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#define NV_PPPC_PRI_WWDX_CG1_SLCG__PROD 0x7FFFFFF8 /* RW--V */
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#define NV_PPPC_PRI_CBM 0x000000FF:0x000000C0 /* RW--L */
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#define NV_PPPC_PRI_CBM_BETA_CB_SIZE 0x000000C0 /* RWI4R */
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#define NV_PPPC_PRI_CBM_BETA_CB_SIZE_V 21:0 /* RWIVF */
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#define NV_PPPC_PRI_CBM_BETA_CB_SIZE_V_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_CBM_BETA_CB_SIZE_V_DEFAULT 1152 /* RW--V */
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#define NV_PPPC_PRI_CBM_BETA_CB_SIZE_V_GFXP 3368 /* RW--V */
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#define NV_PPPC_PRI_CBM_BETA_CB_SIZE_V_GRANULARITY 0x00000020 /* RW--V */
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#define NV_PPPC_PRI_CBM_ALPHA_CB_SIZE 0x000000E4 /* RWI4R */
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#define NV_PPPC_PRI_CBM_ALPHA_CB_SIZE_V 15:0 /* RWIVF */
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#define NV_PPPC_PRI_CBM_ALPHA_CB_SIZE_V_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_CBM_ALPHA_CB_SIZE_V_DEFAULT 2048 /* RW--V */
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#define NV_PPPC_PRI_CBM_ALPHA_CB_SIZE_V_GRANULARITY 0x00000020 /* RW--V */
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#define NV_PPPC_PRI_CBM_BETA_CB_OFFSET 0x000000F4 /* RWI4R */
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#define NV_PPPC_PRI_CBM_BETA_CB_OFFSET_V 21:0 /* RWIVF */
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#define NV_PPPC_PRI_CBM_BETA_CB_OFFSET_V_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_CBM_ALPHA_CB_OFFSET 0x000000F8 /* RWI4R */
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#define NV_PPPC_PRI_CBM_ALPHA_CB_OFFSET_V 21:0 /* RWIVF */
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#define NV_PPPC_PRI_CBM_ALPHA_CB_OFFSET_V_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_CBM_BETA_STEADY_STATE_CB_SIZE 0x000000F0 /* RWI4R */
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#define NV_PPPC_PRI_CBM_BETA_STEADY_STATE_CB_SIZE_V 21:0 /* RWIVF */
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#define NV_PPPC_PRI_CBM_BETA_STEADY_STATE_CB_SIZE_V_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_CBM_BETA_STEADY_STATE_CB_SIZE_V_DEFAULT 1152 /* RW--V */
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#define NV_PPPC_PRI_CBM_BETA_STEADY_STATE_CB_SIZE_V_GRANULARITY 0x00000020 /* RW--V */
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#define NV_PPPC_PRI_CBM_BETA_CB_CTRL 0x000000FC /* RWI4R */
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#define NV_PPPC_PRI_CBM_BETA_CB_CTRL_CBES_RESERVE 11:0 /* RWIVF */
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#define NV_PPPC_PRI_CBM_BETA_CB_CTRL_CBES_RESERVE_NON_GFXP 0 /* RWI-V */
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#define NV_PPPC_PRI_CBM_BETA_CB_CTRL_CBES_RESERVE_GFXP 256 /* RW--V */
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#define NV_PPPC_PRI_CBM_DEBUG 0x000000C4 /* RWI4R */
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#define NV_PPPC_PRI_CBM_DEBUG_INVALIDATE_ALPHA 0:0 /* RWIVF */
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#define NV_PPPC_PRI_CBM_DEBUG_INVALIDATE_ALPHA_DISABLE 0 /* RW--V */
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#define NV_PPPC_PRI_CBM_DEBUG_INVALIDATE_ALPHA_ENABLE 1 /* RWI-V */
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#define NV_PPPC_PRI_CBM_DEBUG_INVALIDATE_BETA 1:1 /* RWIVF */
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#define NV_PPPC_PRI_CBM_DEBUG_INVALIDATE_BETA_DISABLE 0 /* RW--V */
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#define NV_PPPC_PRI_CBM_DEBUG_INVALIDATE_BETA_ENABLE 1 /* RWI-V */
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#define NV_PPPC_PRI_CBM_DEBUG_DELETE_ARB 26:25 /* RWIVF */
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#define NV_PPPC_PRI_CBM_DEBUG_DELETE_ARB_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_CBM_DEBUG_DELETE_ARB_ROUND_ROBIN 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_CBM_DEBUG_DELETE_ARB_PRIM_PRIORITY 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_CBM_DEBUG_DELETE_ARB_TASK_PRIORITY 0x00000002 /* RW--V */
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#define NV_PPPC_PRI_CBM_DEBUG_RESERVED 31:27 /* RWIVF */
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#define NV_PPPC_PRI_CBM_DEBUG_RESERVED_INIT 0x00000000 /* RWI-V */
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#define NV_PPPC_PRI_CBM_STATUS_INDEX 0x000000C8 /* RWE4R */
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#define NV_PPPC_PRI_CBM_STATUS_INDEX_INDEX 2:0 /* RWEVF */
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#define NV_PPPC_PRI_CBM_STATUS_INDEX_INDEX_MIN 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_CBM_STATUS_INDEX_INDEX_MAX 0x00000004 /* RW--V */
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#define NV_PPPC_PRI_CBM_STATUS_INDEX_READINCR 31:31 /* RWEVF */
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#define NV_PPPC_PRI_CBM_STATUS_INDEX_READINCR_DISABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_CBM_STATUS_INDEX_READINCR_ENABLED 0x00000001 /* RWE-V */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE 0x000000DC /* R--4R */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE__APERTURE_INDEX 0x000000C8 /* */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_VAL 31:0 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_0_ALPHA_FSM 21:18 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_0_BETA_FSM 25:22 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_0_WWDX2CBMGR 28:26 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_0_AB_MERGE 31:29 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_1_ALPHA_COUNT 15:0 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_1_BETA_COUNT 31:16 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_ALPHA_ALLOC 2:0 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_ALPHA_ALLOC_ALLOC 5:3 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_ALPHA_ALLOC_INVFIFO 8:6 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_BETA_ALLOC 11:9 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_BETA_ALLOC_ALLOC 14:12 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_BETA_ALLOC_INVFIFO 17:15 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_PE2CBMGR_VSC 20:18 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_CBMGR2PE_VSC 23:21 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_CBMGR2PE_PIN 26:24 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_PE2CBMGR_INVACK 29:27 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_ALPHA_SIZE_GT_MAX_HANG 30:30 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_ALPHA_SIZE_GT_MAX_HANG_NOT_HUNG 0x00000000 /* R---V */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_ALPHA_SIZE_GT_MAX_HANG_HUNG 0x00000001 /* R---V */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_BETA_SIZE_GT_MAX_HANG 31:31 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_BETA_SIZE_GT_MAX_HANG_NOT_HUNG 0x00000000 /* R---V */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_2_BETA_SIZE_GT_MAX_HANG_HUNG 0x00000001 /* R---V */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_3_MPC2CBMGR0 2:0 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_3_CBMGR2MPC0 5:3 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_3_MPC2CBMGR1 8:6 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_3_CBMGR2MPC1 11:9 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_3_MPC2CBMGR2 14:12 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_3_CBMGR2MPC2 17:15 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_3_MPC2CBMGR3 20:18 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_3_CBMGR2MPC3 23:21 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_3_MPC2CBMGR4 26:24 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_3_CBMGR2MPC4 29:27 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_4_ALPHA_ALLOC_SPACE 15:0 /* R--VF */
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#define NV_PPPC_PRI_CBM_STATUS_APERTURE_4_BETA_ALLOC_SPACE 31:16 /* R--VF */
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#define NV_PPPC_PRI_CBM_PM 0x000000CC /* RWE4R */
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#define NV_PPPC_PRI_CBM_PM_SELECT 4:0 /* RWEVF */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP0 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP1 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP2 0x00000002 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP3 0x00000003 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP4 0x00000004 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP5 0x00000005 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP6 0x00000006 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP7 0x00000007 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP8 0x00000008 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP9 0x00000009 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP10 0x0000000A /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP11 0x0000000B /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP12 0x0000000C /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP13 0x0000000D /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP14 0x0000000E /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP15 0x0000000F /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP16 0x00000010 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP17 0x00000011 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP18 0x00000012 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP19 0x00000013 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP20 0x00000014 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP21 0x00000015 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP22 0x00000016 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP23 0x00000017 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP24 0x00000018 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP25 0x00000019 /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP26 0x0000001A /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_GRP27 0x0000001B /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_DEBUG_SIGNAL_GPC_INSTANCE_ID_GROUP 0x0000001C /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_DEBUG_SIGNAL_TPC_INSTANCE_ID_GROUP 0x0000001D /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_STATIC_PATTERN_2AAA_14_GROUP 0x0000001E /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_STATIC_PATTERN_1555_14_GROUP 0x0000001F /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_SELECT_MAX 0x0000001F /* RW--V */
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#define NV_PPPC_PRI_CBM_PM_ENABLE 31:31 /* RWEVF */
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#define NV_PPPC_PRI_CBM_PM_ENABLE_OFF 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_CBM_PM_ENABLE_ON 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_CBM_CG 0x000000D0 /* RWE4R */
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#define NV_PPPC_PRI_CBM_CG_IDLE_CG_DLY_CNT 5:0 /* RWEVF */
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#define NV_PPPC_PRI_CBM_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_CBM_CG_IDLE_CG_DLY_CNT__PROD 0x00000004 /* RW--V */
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#define NV_PPPC_PRI_CBM_CG_IDLE_CG_EN 6:6 /* RWEVF */
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#define NV_PPPC_PRI_CBM_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_CBM_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_CBM_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_CBM_CG_STATE_CG_EN 7:7 /* */
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#define NV_PPPC_PRI_CBM_CG_STATE_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_CBM_CG_STATE_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_STATE_CG_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_STALL_CG_DLY_CNT 13:8 /* */
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#define NV_PPPC_PRI_CBM_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_STALL_CG_DLY_CNT__PROD 0x00000004 /* */
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#define NV_PPPC_PRI_CBM_CG_STALL_CG_EN 14:14 /* RWEVF */
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#define NV_PPPC_PRI_CBM_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_CBM_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_CBM_CG_STALL_CG_EN__PROD 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_CBM_CG_QUIESCENT_CG_EN 15:15 /* */
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#define NV_PPPC_PRI_CBM_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_CBM_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_QUIESCENT_CG_EN__PROD 0x00000001 /* */
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#define NV_PPPC_PRI_CBM_CG_WAKEUP_DLY_CNT 19:16 /* RWEVF */
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#define NV_PPPC_PRI_CBM_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_CBM_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_CNT 23:20 /* */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_CNT__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_DI_DT_SKEW_VAL 27:24 /* */
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#define NV_PPPC_PRI_CBM_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_EN 28:28 /* */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_SW_OVER 29:29 /* */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_PAUSE_CG_EN 30:30 /* */
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#define NV_PPPC_PRI_CBM_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_CBM_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_PAUSE_CG_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_HALT_CG_EN 31:31 /* */
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#define NV_PPPC_PRI_CBM_CG_HALT_CG_EN_ENABLED 0x00000001 /* */
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#define NV_PPPC_PRI_CBM_CG_HALT_CG_EN_DISABLED 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG_HALT_CG_EN__PROD 0x00000000 /* */
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#define NV_PPPC_PRI_CBM_CG1 0x000000D4 /* RWE4R */
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#define NV_PPPC_PRI_CBM_CG1_MONITOR_CG_EN 0:0 /* RWEVF */
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#define NV_PPPC_PRI_CBM_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */
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#define NV_PPPC_PRI_CBM_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWE-V */
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#define NV_PPPC_PRI_CBM_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_CBM_CG1_SLCG 31:1 /* RWEVF */
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#define NV_PPPC_PRI_CBM_CG1_SLCG_ENABLED 0x00000000 /* RW--V */
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#define NV_PPPC_PRI_CBM_CG1_SLCG_DISABLED 0x7FFFFFFF /* RWE-V */
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#define NV_PPPC_PRI_CBM_CG1_SLCG__PROD 0x7FFFFFFC /* RW--V */
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#endif // __ga102_dev_ppc_h__
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