55 lines
2.9 KiB
C
55 lines
2.9 KiB
C
/* _NVRM_COPYRIGHT_BEGIN_
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*
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* Copyright 2003-2016 by NVIDIA Corporation. All rights reserved. All
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* information contained herein is proprietary and confidential to NVIDIA
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* Corporation. Any use, reproduction, or disclosure without the written
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* permission of NVIDIA Corporation is prohibited.
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*
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* _NVRM_COPYRIGHT_END_
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*/
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#ifndef __ga102_nv_gsp_riscv_address_map_h__
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#define __ga102_nv_gsp_riscv_address_map_h__
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/* This file is autogenerated. Do not edit */
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#define NV_RISCV_ADDRESS_MAP_H_
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#define NV_RISCV_AMAP_IROM_START 0x0000000000080000ull
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#define NV_RISCV_AMAP_IROM_SIZE 0x0000000000080000ull
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#define NV_RISCV_AMAP_IROM_END 0x0000000000100000ull
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#define NV_RISCV_AMAP_IMEM_START 0x0000000000100000ull
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#define NV_RISCV_AMAP_IMEM_SIZE 0x0000000000080000ull
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#define NV_RISCV_AMAP_IMEM_END 0x0000000000180000ull
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#define NV_RISCV_AMAP_DMEM_START 0x0000000000180000ull
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#define NV_RISCV_AMAP_DMEM_SIZE 0x0000000000080000ull
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#define NV_RISCV_AMAP_DMEM_END 0x0000000000200000ull
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#define NV_RISCV_AMAP_EMEM_START 0x0000000001200000ull
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#define NV_RISCV_AMAP_EMEM_SIZE 0x0000000000080000ull
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#define NV_RISCV_AMAP_EMEM_END 0x0000000001280000ull
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#define NV_RISCV_AMAP_INTIO_START 0x0000000001280000ull
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#define NV_RISCV_AMAP_INTIO_SIZE 0x0000000000080000ull
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#define NV_RISCV_AMAP_INTIO_END 0x0000000001300000ull
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#define NV_RISCV_AMAP_EXTIO1_START 0x2000000000000000ull
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#define NV_RISCV_AMAP_EXTIO1_SIZE 0x0000000004000000ull
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#define NV_RISCV_AMAP_EXTIO1_END 0x2000000004000000ull
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#define NV_RISCV_AMAP_EXTMEM1_START 0x6060000000000000ull
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#define NV_RISCV_AMAP_EXTMEM1_SIZE 0x0020000000000000ull
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#define NV_RISCV_AMAP_EXTMEM1_END 0x6080000000000000ull
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#define NV_RISCV_AMAP_EXTMEM2_START 0x8060000000000000ull
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#define NV_RISCV_AMAP_EXTMEM2_SIZE 0x0020000000000000ull
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#define NV_RISCV_AMAP_EXTMEM2_END 0x8080000000000000ull
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#define NV_RISCV_AMAP_EXTMEM3_START 0xA000000000000000ull
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#define NV_RISCV_AMAP_EXTMEM3_SIZE 0x0002000000000000ull
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#define NV_RISCV_AMAP_EXTMEM3_END 0xA002000000000000ull
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#define NV_RISCV_AMAP_PRIV_START NV_RISCV_AMAP_EXTIO1_START
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#define NV_RISCV_AMAP_PRIV_SIZE NV_RISCV_AMAP_EXTIO1_SIZE
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#define NV_RISCV_AMAP_PRIV_END NV_RISCV_AMAP_EXTIO1_END
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#define NV_RISCV_AMAP_FBGPA_START NV_RISCV_AMAP_EXTMEM1_START
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#define NV_RISCV_AMAP_FBGPA_SIZE NV_RISCV_AMAP_EXTMEM1_SIZE
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#define NV_RISCV_AMAP_FBGPA_END NV_RISCV_AMAP_EXTMEM1_END
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#define NV_RISCV_AMAP_SYSGPA_START NV_RISCV_AMAP_EXTMEM2_START
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#define NV_RISCV_AMAP_SYSGPA_SIZE NV_RISCV_AMAP_EXTMEM2_SIZE
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#define NV_RISCV_AMAP_SYSGPA_END NV_RISCV_AMAP_EXTMEM2_END
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#define NV_RISCV_AMAP_GVA_START NV_RISCV_AMAP_EXTMEM3_START
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#define NV_RISCV_AMAP_GVA_SIZE NV_RISCV_AMAP_EXTMEM3_SIZE
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#define NV_RISCV_AMAP_GVA_END NV_RISCV_AMAP_EXTMEM3_END
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#endif // __ga102_nv_gsp_riscv_address_map_h__
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