Files
gddr6/include/ampere/ga102/dev_access_counter.h
Ole Algoritme 698a8f7487 first commit
2022-09-05 21:52:22 +02:00

65 lines
5.4 KiB
C

/* _NVRM_COPYRIGHT_BEGIN_
*
* Copyright 2003-2016 by NVIDIA Corporation. All rights reserved. All
* information contained herein is proprietary and confidential to NVIDIA
* Corporation. Any use, reproduction, or disclosure without the written
* permission of NVIDIA Corporation is prohibited.
*
* _NVRM_COPYRIGHT_END_
*/
#ifndef __ga102_dev_access_counter_h__
#define __ga102_dev_access_counter_h__
/* This file is autogenerated. Do not edit */
#define NV_ACCESS_COUNTER_NOTIFY_BUF /* ----G */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY 0x1F:0x00000000 /* RW--M */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_SIZE 32 /* */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_TYPE (0+0*32):(0*32+0) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_TYPE_CPU 0x00000000 /* RWX-V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_TYPE_GPU 0x00000001 /* RWX-V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_ADDR_TYPE (1+0*32):(0*32+1) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_ADDR_TYPE_GVA 0x00000000 /* RWX-V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_ADDR_TYPE_GPA 0x00000001 /* RWX-V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK (5+0*32):(0*32+2) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_0 0x00000000 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_1 0x00000001 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_2 0x00000002 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_3 0x00000003 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_4 0x00000004 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_5 0x00000005 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_6 0x00000006 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_7 0x00000007 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_8 0x00000008 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_9 0x00000009 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_10 0x0000000A /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_11 0x0000000B /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_12 0x0000000C /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_13 0x0000000D /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_14 0x0000000E /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_BANK_15 0x0000000F /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_APERTURE (9+0*32):(0*32+8) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_APERTURE_VID_MEM 0x00000000 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_APERTURE_PEER_MEM 0x00000001 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_APERTURE_SYS_MEM_COHERENT 0x00000002 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_INST_APERTURE (11+0*32):(0*32+10) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_INST_APERTURE_VID_MEM 0x00000000 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_INST_APERTURE_SYS_MEM_COHERENT 0x00000002 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_INST_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 /* RW--V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_INST_LO (31+0*32):(0*32+12) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_INST_HI (31+1*32):(1*32+0) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_INST (31+1*32):(0*32+12) /* */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_ADDR_LO (31+2*32):(2*32+0) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_ADDR_HI (31+3*32):(3*32+0) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_ADDR (31+3*32):(2*32+0) /* */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_SUB_GRANULARITY (31+4*32):(4*32+0) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_NOTIFY_TAG (19+5*32):(5*32+0) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_COUNTER_VAL (15+6*32):(6*32+0) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_PEER_ID (2+7*32):(7*32+0) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_MMU_ENGINE_ID (28+7*32):(7*32+20) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_VALID (31+7*32):(7*32+31) /* RWXVF */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_VALID_FALSE 0x00000000 /* RWX-V */
#define NV_ACCESS_COUNTER_NOTIFY_BUF_ENTRY_VALID_TRUE 0x00000001 /* RWX-V */
#define NV_ACCESS_COUNTER_NOTIFIERS_ACCESS_COUNTER (0)
#endif // __ga102_dev_access_counter_h__