5365 lines
483 KiB
C
5365 lines
483 KiB
C
/* _NVRM_COPYRIGHT_BEGIN_
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*
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* Copyright 2003-2016 by NVIDIA Corporation. All rights reserved. All
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* information contained herein is proprietary and confidential to NVIDIA
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* Corporation. Any use, reproduction, or disclosure without the written
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* permission of NVIDIA Corporation is prohibited.
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*
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* _NVRM_COPYRIGHT_END_
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*/
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/* This file is autogenerated by ref2h.pl. Do not edit */
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// Command: /home/ip/shared/inf/perfmux/1.0/47751827/bin/mkpmhdr_new -s ./../../../../../../../../../ip/perf/hwpm/4.1/defs/public/perfmon/litter/galit2/perfmon_new.generated_spec -c ./pm_signals.h -w ./pm_watch.v -d ./pm_defines.vh -t NV_PM_TB_watch.vh -l ./pmhdr_new.pm -n galit2 -f ./pm_funnel_defines.pm -R ./../../../../../../../../../ip/nvif/nvlink/3.1/defs/public/registers/perfmon_consolidate/galit2/hwpm_nvlink_regsters.h
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_ZERO 0
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_ONE 1
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMFBP_LTC1S3_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define LTC2PM_LTC_LTS7_MUXED_BUS_0 22
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#define LTC2PM_LTC_LTS7_MUXED_BUS_1 23
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#define LTC2PM_LTC_LTS7_MUXED_BUS_2 24
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#define LTC2PM_LTC_LTS7_MUXED_BUS_3 25
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#define LTC2PM_LTC_LTS7_MUXED_BUS_4 26
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#define LTC2PM_LTC_LTS7_MUXED_BUS_5 27
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#define LTC2PM_LTC_LTS7_MUXED_BUS_6 28
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#define LTC2PM_LTC_LTS7_MUXED_BUS_7 29
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#define LTC2PM_LTC_LTS7_MUXED_BUS_8 30
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#define LTC2PM_LTC_LTS7_MUXED_BUS_9 31
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#define LTC2PM_LTC_LTS7_MUXED_BUS_10 32
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#define LTC2PM_LTC_LTS7_MUXED_BUS_11 33
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#define LTC2PM_LTC_LTS7_MUXED_BUS_12 34
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#define LTC2PM_LTC_LTS7_MUXED_BUS_13 35
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#define LTC2PM_LTC_LTS7_MUXED_BUS_14 36
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#define LTC2PM_LTC_LTS7_MUXED_BUS_15 37
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#define LTC2PM_LTC_LTS7_MUXED_BUS_16 38
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#define LTC2PM_LTC_LTS7_MUXED_BUS_17 39
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#define LTC2PM_LTC_LTS7_MUXED_BUS_18 40
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#define LTC2PM_LTC_LTS7_MUXED_BUS_19 41
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#define LTC2PM_LTC_LTS7_MUXED_BUS_20 42
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#define LTC2PM_LTC_LTS7_MUXED_BUS_21 43
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#define LTC2PM_LTC_LTS7_MUXED_BUS_22 44
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#define LTC2PM_LTC_LTS7_MUXED_BUS_23 45
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#define LTC2PM_LTC_LTS7_MUXED_BUS_24 46
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#define LTC2PM_LTC_LTS7_MUXED_BUS_25 47
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#define LTC2PM_LTC_LTS7_MUXED_BUS_26 48
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#define LTC2PM_LTC_LTS7_MUXED_BUS_27 49
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#define LTC2PM_LTC_LTS7_MUXED_BUS_28 50
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#define LTC2PM_LTC_LTS7_MUXED_BUS_29 51
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#define LTC2PM_LTC_LTS7_MUXED_BUS_30 52
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#define LTC2PM_LTC_LTS7_MUXED_BUS_31 53
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_0 54
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_1 55
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_2 56
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_3 57
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_4 58
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_5 59
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_6 60
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_7 61
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_8 62
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_9 63
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_10 64
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_11 65
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_12 66
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_13 67
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_14 68
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_15 69
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_16 70
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_17 71
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_18 72
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_19 73
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_20 74
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_21 75
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_22 76
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_23 77
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_24 78
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_25 79
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_26 80
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_27 81
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_28 82
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_29 83
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_30 84
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#define LTC2PM_LTC_LTS7_MUXED_BUS_CLONE_31 85
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#define LTC2PM_LTC_LTS7_SECTOR_MUXED_BUS_0 86
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#define LTC2PM_LTC_LTS7_SECTOR_MUXED_BUS_1 87
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#define LTC2PM_LTC_LTS7_SECTOR_MUXED_BUS_2 88
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#define LTC2PM_LTC_LTS7_SECTOR_MUXED_BUS_3 89
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#define LTC2PM_LTC_LTS7_SRCUNIT_MUXED_BUS 90
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_ZERO 0
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_ONE 1
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMFBP_LTC1S2_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define LTC2PM_LTC_LTS6_MUXED_BUS_0 22
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#define LTC2PM_LTC_LTS6_MUXED_BUS_1 23
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#define LTC2PM_LTC_LTS6_MUXED_BUS_2 24
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#define LTC2PM_LTC_LTS6_MUXED_BUS_3 25
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#define LTC2PM_LTC_LTS6_MUXED_BUS_4 26
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#define LTC2PM_LTC_LTS6_MUXED_BUS_5 27
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#define LTC2PM_LTC_LTS6_MUXED_BUS_6 28
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#define LTC2PM_LTC_LTS6_MUXED_BUS_7 29
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#define LTC2PM_LTC_LTS6_MUXED_BUS_8 30
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#define LTC2PM_LTC_LTS6_MUXED_BUS_9 31
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#define LTC2PM_LTC_LTS6_MUXED_BUS_10 32
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#define LTC2PM_LTC_LTS6_MUXED_BUS_11 33
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#define LTC2PM_LTC_LTS6_MUXED_BUS_12 34
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#define LTC2PM_LTC_LTS6_MUXED_BUS_13 35
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#define LTC2PM_LTC_LTS6_MUXED_BUS_14 36
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#define LTC2PM_LTC_LTS6_MUXED_BUS_15 37
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#define LTC2PM_LTC_LTS6_MUXED_BUS_16 38
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#define LTC2PM_LTC_LTS6_MUXED_BUS_17 39
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#define LTC2PM_LTC_LTS6_MUXED_BUS_18 40
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#define LTC2PM_LTC_LTS6_MUXED_BUS_19 41
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#define LTC2PM_LTC_LTS6_MUXED_BUS_20 42
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#define LTC2PM_LTC_LTS6_MUXED_BUS_21 43
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#define LTC2PM_LTC_LTS6_MUXED_BUS_22 44
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#define LTC2PM_LTC_LTS6_MUXED_BUS_23 45
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#define LTC2PM_LTC_LTS6_MUXED_BUS_24 46
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#define LTC2PM_LTC_LTS6_MUXED_BUS_25 47
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#define LTC2PM_LTC_LTS6_MUXED_BUS_26 48
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#define LTC2PM_LTC_LTS6_MUXED_BUS_27 49
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#define LTC2PM_LTC_LTS6_MUXED_BUS_28 50
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#define LTC2PM_LTC_LTS6_MUXED_BUS_29 51
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#define LTC2PM_LTC_LTS6_MUXED_BUS_30 52
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#define LTC2PM_LTC_LTS6_MUXED_BUS_31 53
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_0 54
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_1 55
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_2 56
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_3 57
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_4 58
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_5 59
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_6 60
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_7 61
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_8 62
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_9 63
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_10 64
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_11 65
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_12 66
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_13 67
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_14 68
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_15 69
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_16 70
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_17 71
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_18 72
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_19 73
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_20 74
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_21 75
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_22 76
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_23 77
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_24 78
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_25 79
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_26 80
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_27 81
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_28 82
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_29 83
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_30 84
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#define LTC2PM_LTC_LTS6_MUXED_BUS_CLONE_31 85
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#define LTC2PM_LTC_LTS6_SECTOR_MUXED_BUS_0 86
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#define LTC2PM_LTC_LTS6_SECTOR_MUXED_BUS_1 87
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#define LTC2PM_LTC_LTS6_SECTOR_MUXED_BUS_2 88
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#define LTC2PM_LTC_LTS6_SECTOR_MUXED_BUS_3 89
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#define LTC2PM_LTC_LTS6_SRCUNIT_MUXED_BUS 90
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_ZERO 0
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_ONE 1
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMFBP_LTC1S1_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define LTC2PM_LTC_LTS5_MUXED_BUS_0 22
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#define LTC2PM_LTC_LTS5_MUXED_BUS_1 23
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#define LTC2PM_LTC_LTS5_MUXED_BUS_2 24
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#define LTC2PM_LTC_LTS5_MUXED_BUS_3 25
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#define LTC2PM_LTC_LTS5_MUXED_BUS_4 26
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#define LTC2PM_LTC_LTS5_MUXED_BUS_5 27
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#define LTC2PM_LTC_LTS5_MUXED_BUS_6 28
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#define LTC2PM_LTC_LTS5_MUXED_BUS_7 29
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#define LTC2PM_LTC_LTS5_MUXED_BUS_8 30
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#define LTC2PM_LTC_LTS5_MUXED_BUS_9 31
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#define LTC2PM_LTC_LTS5_MUXED_BUS_10 32
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#define LTC2PM_LTC_LTS5_MUXED_BUS_11 33
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#define LTC2PM_LTC_LTS5_MUXED_BUS_12 34
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#define LTC2PM_LTC_LTS5_MUXED_BUS_13 35
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#define LTC2PM_LTC_LTS5_MUXED_BUS_14 36
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#define LTC2PM_LTC_LTS5_MUXED_BUS_15 37
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#define LTC2PM_LTC_LTS5_MUXED_BUS_16 38
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#define LTC2PM_LTC_LTS5_MUXED_BUS_17 39
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#define LTC2PM_LTC_LTS5_MUXED_BUS_18 40
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#define LTC2PM_LTC_LTS5_MUXED_BUS_19 41
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#define LTC2PM_LTC_LTS5_MUXED_BUS_20 42
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#define LTC2PM_LTC_LTS5_MUXED_BUS_21 43
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#define LTC2PM_LTC_LTS5_MUXED_BUS_22 44
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#define LTC2PM_LTC_LTS5_MUXED_BUS_23 45
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#define LTC2PM_LTC_LTS5_MUXED_BUS_24 46
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#define LTC2PM_LTC_LTS5_MUXED_BUS_25 47
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#define LTC2PM_LTC_LTS5_MUXED_BUS_26 48
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#define LTC2PM_LTC_LTS5_MUXED_BUS_27 49
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#define LTC2PM_LTC_LTS5_MUXED_BUS_28 50
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#define LTC2PM_LTC_LTS5_MUXED_BUS_29 51
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#define LTC2PM_LTC_LTS5_MUXED_BUS_30 52
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#define LTC2PM_LTC_LTS5_MUXED_BUS_31 53
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_0 54
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_1 55
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_2 56
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_3 57
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_4 58
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_5 59
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_6 60
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_7 61
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_8 62
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_9 63
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_10 64
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_11 65
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_12 66
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_13 67
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_14 68
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_15 69
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_16 70
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_17 71
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_18 72
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_19 73
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_20 74
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_21 75
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_22 76
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_23 77
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_24 78
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_25 79
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_26 80
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_27 81
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_28 82
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_29 83
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_30 84
|
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#define LTC2PM_LTC_LTS5_MUXED_BUS_CLONE_31 85
|
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#define LTC2PM_LTC_LTS5_SECTOR_MUXED_BUS_0 86
|
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#define LTC2PM_LTC_LTS5_SECTOR_MUXED_BUS_1 87
|
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#define LTC2PM_LTC_LTS5_SECTOR_MUXED_BUS_2 88
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#define LTC2PM_LTC_LTS5_SECTOR_MUXED_BUS_3 89
|
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#define LTC2PM_LTC_LTS5_SRCUNIT_MUXED_BUS 90
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_ZERO 0
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_ONE 1
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_PMA_TRIGGER 2
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_T_PULSE 3
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_VWTRIGGER0 8
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_VWTRIGGER4 12
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_VWTRIGGER6 14
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_VWTRIGGER7 15
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
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#define NV_PERF_PMMFBP_LTC1S0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define LTC2PM_LTC_LTS4_MUXED_BUS_0 22
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_1 23
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_2 24
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#define LTC2PM_LTC_LTS4_MUXED_BUS_3 25
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_4 26
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_5 27
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_6 28
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_7 29
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_8 30
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_9 31
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_10 32
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_11 33
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_12 34
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_13 35
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_14 36
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_15 37
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_16 38
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_17 39
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_18 40
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_19 41
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_20 42
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_21 43
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_22 44
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_23 45
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_24 46
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_25 47
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_26 48
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_27 49
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_28 50
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_29 51
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_30 52
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_31 53
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_0 54
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_1 55
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_2 56
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_3 57
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_4 58
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_5 59
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_6 60
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_7 61
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_8 62
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_9 63
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_10 64
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_11 65
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_12 66
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_13 67
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_14 68
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_15 69
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_16 70
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_17 71
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_18 72
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_19 73
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_20 74
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_21 75
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_22 76
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_23 77
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_24 78
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_25 79
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_26 80
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_27 81
|
|
#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_28 82
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_29 83
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_30 84
|
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#define LTC2PM_LTC_LTS4_MUXED_BUS_CLONE_31 85
|
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#define LTC2PM_LTC_LTS4_SECTOR_MUXED_BUS_0 86
|
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#define LTC2PM_LTC_LTS4_SECTOR_MUXED_BUS_1 87
|
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#define LTC2PM_LTC_LTS4_SECTOR_MUXED_BUS_2 88
|
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#define LTC2PM_LTC_LTS4_SECTOR_MUXED_BUS_3 89
|
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#define LTC2PM_LTC_LTS4_SRCUNIT_MUXED_BUS 90
|
|
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#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_PMMPRICONTROL3 7
|
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#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_VWTRIGGER0 8
|
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#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_VWTRIGGER3 11
|
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#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_VWTRIGGER4 12
|
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#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMFBP_LTC0S3_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_0 22
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_1 23
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_2 24
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_3 25
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_4 26
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_5 27
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_6 28
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_7 29
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_8 30
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_9 31
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_10 32
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_11 33
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_12 34
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_13 35
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_14 36
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_15 37
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_16 38
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_17 39
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_18 40
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_19 41
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_20 42
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_21 43
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_22 44
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_23 45
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_24 46
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_25 47
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_26 48
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_27 49
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_28 50
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_29 51
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_30 52
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_31 53
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_0 54
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_1 55
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_2 56
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_3 57
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_4 58
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_5 59
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_6 60
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_7 61
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_8 62
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_9 63
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_10 64
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_11 65
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_12 66
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_13 67
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_14 68
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_15 69
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_16 70
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_17 71
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_18 72
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_19 73
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_20 74
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_21 75
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_22 76
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_23 77
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_24 78
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_25 79
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_26 80
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_27 81
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_28 82
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_29 83
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_30 84
|
|
#define LTC2PM_LTC_LTS3_MUXED_BUS_CLONE_31 85
|
|
#define LTC2PM_LTC_LTS3_SECTOR_MUXED_BUS_0 86
|
|
#define LTC2PM_LTC_LTS3_SECTOR_MUXED_BUS_1 87
|
|
#define LTC2PM_LTC_LTS3_SECTOR_MUXED_BUS_2 88
|
|
#define LTC2PM_LTC_LTS3_SECTOR_MUXED_BUS_3 89
|
|
#define LTC2PM_LTC_LTS3_SRCUNIT_MUXED_BUS 90
|
|
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMFBP_LTC0S2_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_0 22
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_1 23
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_2 24
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_3 25
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_4 26
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_5 27
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_6 28
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_7 29
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_8 30
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_9 31
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_10 32
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_11 33
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_12 34
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_13 35
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_14 36
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_15 37
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_16 38
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_17 39
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_18 40
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_19 41
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_20 42
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_21 43
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_22 44
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_23 45
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_24 46
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_25 47
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_26 48
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_27 49
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_28 50
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_29 51
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_30 52
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_31 53
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_0 54
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_1 55
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_2 56
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_3 57
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_4 58
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_5 59
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_6 60
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_7 61
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_8 62
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_9 63
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_10 64
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_11 65
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_12 66
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_13 67
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_14 68
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_15 69
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_16 70
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_17 71
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_18 72
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_19 73
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_20 74
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_21 75
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_22 76
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_23 77
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_24 78
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_25 79
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_26 80
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_27 81
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_28 82
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_29 83
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_30 84
|
|
#define LTC2PM_LTC_LTS2_MUXED_BUS_CLONE_31 85
|
|
#define LTC2PM_LTC_LTS2_SECTOR_MUXED_BUS_0 86
|
|
#define LTC2PM_LTC_LTS2_SECTOR_MUXED_BUS_1 87
|
|
#define LTC2PM_LTC_LTS2_SECTOR_MUXED_BUS_2 88
|
|
#define LTC2PM_LTC_LTS2_SECTOR_MUXED_BUS_3 89
|
|
#define LTC2PM_LTC_LTS2_SRCUNIT_MUXED_BUS 90
|
|
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMFBP_LTC0S1_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_0 22
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_1 23
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_2 24
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_3 25
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_4 26
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_5 27
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_6 28
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_7 29
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_8 30
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_9 31
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_10 32
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_11 33
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_12 34
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_13 35
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_14 36
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_15 37
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_16 38
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_17 39
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_18 40
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_19 41
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_20 42
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_21 43
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_22 44
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_23 45
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_24 46
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_25 47
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_26 48
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_27 49
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_28 50
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_29 51
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_30 52
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_31 53
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_0 54
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_1 55
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_2 56
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_3 57
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_4 58
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_5 59
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_6 60
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_7 61
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_8 62
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_9 63
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_10 64
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_11 65
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_12 66
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_13 67
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_14 68
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_15 69
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_16 70
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_17 71
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_18 72
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_19 73
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_20 74
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_21 75
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_22 76
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_23 77
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_24 78
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_25 79
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_26 80
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_27 81
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_28 82
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_29 83
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_30 84
|
|
#define LTC2PM_LTC_LTS1_MUXED_BUS_CLONE_31 85
|
|
#define LTC2PM_LTC_LTS1_SECTOR_MUXED_BUS_0 86
|
|
#define LTC2PM_LTC_LTS1_SECTOR_MUXED_BUS_1 87
|
|
#define LTC2PM_LTC_LTS1_SECTOR_MUXED_BUS_2 88
|
|
#define LTC2PM_LTC_LTS1_SECTOR_MUXED_BUS_3 89
|
|
#define LTC2PM_LTC_LTS1_SRCUNIT_MUXED_BUS 90
|
|
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMFBP_LTC0S0_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_0 22
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_1 23
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_2 24
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_3 25
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_4 26
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_5 27
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_6 28
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_7 29
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_8 30
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_9 31
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_10 32
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_11 33
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_12 34
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_13 35
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_14 36
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_15 37
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_16 38
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_17 39
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_18 40
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_19 41
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_20 42
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_21 43
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_22 44
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_23 45
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_24 46
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_25 47
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_26 48
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_27 49
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_28 50
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_29 51
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_30 52
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_31 53
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_0 54
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_1 55
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_2 56
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_3 57
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_4 58
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_5 59
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_6 60
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_7 61
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_8 62
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_9 63
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_10 64
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_11 65
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_12 66
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_13 67
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_14 68
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_15 69
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_16 70
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_17 71
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_18 72
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_19 73
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_20 74
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_21 75
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_22 76
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_23 77
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_24 78
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_25 79
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_26 80
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_27 81
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_28 82
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_29 83
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_30 84
|
|
#define LTC2PM_LTC_LTS0_MUXED_BUS_CLONE_31 85
|
|
#define LTC2PM_LTC_LTS0_SECTOR_MUXED_BUS_0 86
|
|
#define LTC2PM_LTC_LTS0_SECTOR_MUXED_BUS_1 87
|
|
#define LTC2PM_LTC_LTS0_SECTOR_MUXED_BUS_2 88
|
|
#define LTC2PM_LTC_LTS0_SECTOR_MUXED_BUS_3 89
|
|
#define LTC2PM_LTC_LTS0_SRCUNIT_MUXED_BUS 90
|
|
|
|
#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_T_PULSE 3
|
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMFBP_FBPA0S1_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_0 22
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_1 23
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_2 24
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_3 25
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_4 26
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_5 27
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_6 28
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_7 29
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_8 30
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_9 31
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_10 32
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#define FBPA02PM_SUBP1_LTC_FB_PERF_MUXED_BUS_11 33
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_ZERO 0
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_ONE 1
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMFBP_FBPA0S0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_0 22
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_1 23
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_2 24
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_3 25
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_4 26
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_5 27
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_6 28
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_7 29
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_8 30
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_9 31
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_10 32
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#define FBPA02PM_SUBP0_LTC_FB_PERF_MUXED_BUS_11 33
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_ZERO 0
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_ONE 1
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMFBP_FBPA0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_0 22
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_1 23
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_2 24
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_3 25
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_4 26
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_5 27
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_6 28
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_7 29
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_8 30
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_9 31
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_10 32
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#define FBPA02PM_LTC_FB_PERF_MUXED_BUS_11 33
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_ZERO 0
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_ONE 1
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMFBP_FBP0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define LTC2PM_LTC0_MUXED_BUS_0 22
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#define LTC2PM_LTC0_MUXED_BUS_1 23
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#define LTC2PM_LTC0_MUXED_BUS_2 24
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#define LTC2PM_LTC0_MUXED_BUS_3 25
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#define LTC2PM_LTC0_MUXED_BUS_4 26
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#define LTC2PM_LTC0_MUXED_BUS_5 27
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#define LTC2PM_LTC0_MUXED_BUS_6 28
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#define LTC2PM_LTC0_MUXED_BUS_7 29
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#define LTC2PM_LTC1_MUXED_BUS_0 30
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#define LTC2PM_LTC1_MUXED_BUS_1 31
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#define LTC2PM_LTC1_MUXED_BUS_2 32
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#define LTC2PM_LTC1_MUXED_BUS_3 33
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#define LTC2PM_LTC1_MUXED_BUS_4 34
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#define LTC2PM_LTC1_MUXED_BUS_5 35
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#define LTC2PM_LTC1_MUXED_BUS_6 36
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#define LTC2PM_LTC1_MUXED_BUS_7 37
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#define PMMFBP_ROUTER2PM_CS2PMM_PRI_VLD 38
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#define PMMFBP_ROUTER2PM_PMM2CD_COUNT_PRI_PVLD 39
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#define PMMFBP_ROUTER2PM_PMM2CD_COUNT_PRI_PRDY 40
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#define PMMFBP_ROUTER2PM_PMM2PMA_REQUEST_SENT 41
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#define PMMFBP_ROUTER2PM_PMM2PMA_GRANT_RECEIVED 42
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#define PMMFBP_ROUTER2PM_ROUTER_FIFO_EMPTY 43
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#define PMMFBP_ROUTER2PM_ROUTER_FIFO_BLOCKING 44
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#define PMMFBP_ROUTER2PM_ROUTER_PRI_BACKPRESSURE 45
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#define PMMFBP_ROUTER2PM_ROUTER_HS_RECORD_SENT 46
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#define PMMFBP_ROUTER2PM_ROUTER_HS_CREDIT_RECEIVED 47
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#define PMMFBP_ROUTER2PM_ROUTER_HS_NO_CREDITS_AVAILABLE 48
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#define PMMFBP_ROUTER2PM_ROUTER_HS_BLOCKING_INTERFACE 49
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#define PMMFBP_ROUTER2PM_ROUTER_HS_BLOCKING_PMA_CREDITS 50
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#define PMMFBP_ROUTER2PM_ROUTER_HS_CREDITS_OUTSTANDING 51
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#define PMMFBP_ROUTER2PM_ROUTER_RECORD_READY 52
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_ZERO 0
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_ONE 1
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_PMA_TRIGGER 2
|
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMGPC_ROP1_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define CROP2PM_ROP1_PERF_MUXED_BUS_0 22
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#define CROP2PM_ROP1_PERF_MUXED_BUS_1 23
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#define CROP2PM_ROP1_PERF_MUXED_BUS_2 24
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#define CROP2PM_ROP1_PERF_MUXED_BUS_3 25
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#define CROP2PM_ROP1_PERF_MUXED_BUS_4 26
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#define CROP2PM_ROP1_PERF_MUXED_BUS_5 27
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#define CROP2PM_ROP1_PERF_MUXED_BUS_6 28
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#define CROP2PM_ROP1_PERF_MUXED_BUS_7 29
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#define CROP2PM_ROP1_PERF_MUXED_BUS_8 30
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#define CROP2PM_ROP1_PERF_MUXED_BUS_9 31
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#define CROP2PM_ROP1_PERF_MUXED_BUS_10 32
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#define CROP2PM_ROP1_PERF_MUXED_BUS_11 33
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#define CROP2PM_ROP1_PERF_MUXED_BUS_12 34
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#define CROP2PM_ROP1_PERF_MUXED_BUS_13 35
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#define CROP2PM_ROP1_PERF_MUXED_BUS_14 36
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#define CROP2PM_ROP1_PERF_MUXED_BUS_15 37
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_0 38
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_1 39
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_2 40
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_3 41
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_4 42
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_5 43
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_6 44
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_7 45
|
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_8 46
|
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_9 47
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_10 48
|
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_11 49
|
|
#define CROP2PM_ROP1_PERF_MUXED_BUS2_12 50
|
|
#define CROP2PM_ROP1_PERF_MUXED_BUS2_13 51
|
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_14 52
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#define CROP2PM_ROP1_PERF_MUXED_BUS2_15 53
|
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#define RRH2PM_ROP1_PERF_MUXED_BUS_0 54
|
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#define RRH2PM_ROP1_PERF_MUXED_BUS_1 55
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#define RRH2PM_ROP1_PERF_MUXED_BUS_2 56
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS_3 57
|
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#define RRH2PM_ROP1_PERF_MUXED_BUS_4 58
|
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#define RRH2PM_ROP1_PERF_MUXED_BUS_5 59
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS_6 60
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS_7 61
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS_8 62
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS_9 63
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS_10 64
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS_11 65
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS_12 66
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_0 67
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_1 68
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_2 69
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_3 70
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_4 71
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_5 72
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_6 73
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_7 74
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_8 75
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_9 76
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_10 77
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_11 78
|
|
#define RRH2PM_ROP1_PERF_MUXED_BUS2_12 79
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS_0 80
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS_1 81
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS_2 82
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS_3 83
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS_4 84
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS_5 85
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS2_0 86
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS2_1 87
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS2_2 88
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS2_3 89
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS2_4 90
|
|
#define ZROP2PM_ROP1_ZROP_COUNT_MUXED_BUS2_5 91
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS_0 92
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS_1 93
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS_2 94
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS_3 95
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS_4 96
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS_5 97
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS2_0 98
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS2_1 99
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS2_2 100
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS2_3 101
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS2_4 102
|
|
#define ZROP2PM_ROP1_ZROP_PERF_MUXED_BUS2_5 103
|
|
#define RRH12PM_ROP1_CLAMP_PERFMONOUT 104
|
|
#define ZROP12PM_ROP1_CLAMP_PERFMONOUT 105
|
|
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_ROP0_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_0 22
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_1 23
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_2 24
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_3 25
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_4 26
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_5 27
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_6 28
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_7 29
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_8 30
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_9 31
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_10 32
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_11 33
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_12 34
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_13 35
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_14 36
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS_15 37
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_0 38
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_1 39
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_2 40
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_3 41
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_4 42
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_5 43
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_6 44
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_7 45
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_8 46
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_9 47
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_10 48
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_11 49
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_12 50
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_13 51
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_14 52
|
|
#define CROP2PM_ROP0_PERF_MUXED_BUS2_15 53
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_0 54
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_1 55
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_2 56
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_3 57
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_4 58
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_5 59
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_6 60
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_7 61
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_8 62
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_9 63
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_10 64
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_11 65
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS_12 66
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_0 67
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_1 68
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_2 69
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_3 70
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_4 71
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_5 72
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_6 73
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_7 74
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_8 75
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_9 76
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_10 77
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_11 78
|
|
#define RRH2PM_ROP0_PERF_MUXED_BUS2_12 79
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS_0 80
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS_1 81
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS_2 82
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS_3 83
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS_4 84
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS_5 85
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS2_0 86
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS2_1 87
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS2_2 88
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS2_3 89
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS2_4 90
|
|
#define ZROP2PM_ROP0_ZROP_COUNT_MUXED_BUS2_5 91
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS_0 92
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS_1 93
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS_2 94
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS_3 95
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS_4 96
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS_5 97
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS2_0 98
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS2_1 99
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS2_2 100
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS2_3 101
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS2_4 102
|
|
#define ZROP2PM_ROP0_ZROP_PERF_MUXED_BUS2_5 103
|
|
#define RRH02PM_ROP0_CLAMP_PERFMONOUT 104
|
|
#define ZROP02PM_ROP0_CLAMP_PERFMONOUT 105
|
|
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPCTPCC5_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_0 22
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_1 23
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_2 24
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_3 25
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_4 26
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_5 27
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_6 28
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_7 29
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_8 30
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_9 31
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_10 32
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_11 33
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_12 34
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_13 35
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_14 36
|
|
#define SMV_TTU2PM_GPCTPCC5_MUXED_BUS_15 37
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_0 38
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_1 39
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_2 40
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_3 41
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_4 42
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_5 43
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_6 44
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_7 45
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_8 46
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_9 47
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_10 48
|
|
#define PEL2PM_GPCTPCC5_MUXED_BUS_11 49
|
|
#define MPC2PM_GPCTPCC5_SCG_MODE 50
|
|
#define MPC2PM_GPCTPCC5_SCG_MODE_SWITCH 51
|
|
#define TPC5_PEL2PM_GPCTPCC5_CLAMP_PERFMONOUT 52
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_0 53
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_1 54
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_2 55
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_3 56
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_4 57
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_5 58
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_6 59
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_7 60
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_8 61
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_9 62
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_10 63
|
|
#define MPC2PM_GPCTPCC5_MUXED_BUS_11 64
|
|
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPCTPCC4_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_0 22
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_1 23
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_2 24
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_3 25
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_4 26
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_5 27
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_6 28
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_7 29
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_8 30
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_9 31
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_10 32
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_11 33
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_12 34
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_13 35
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_14 36
|
|
#define SMV_TTU2PM_GPCTPCC4_MUXED_BUS_15 37
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_0 38
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_1 39
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_2 40
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_3 41
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_4 42
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_5 43
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_6 44
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_7 45
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_8 46
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_9 47
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_10 48
|
|
#define PEL2PM_GPCTPCC4_MUXED_BUS_11 49
|
|
#define MPC2PM_GPCTPCC4_SCG_MODE 50
|
|
#define MPC2PM_GPCTPCC4_SCG_MODE_SWITCH 51
|
|
#define TPC4_PEL2PM_GPCTPCC4_CLAMP_PERFMONOUT 52
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_0 53
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_1 54
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_2 55
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_3 56
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_4 57
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_5 58
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_6 59
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_7 60
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_8 61
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_9 62
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_10 63
|
|
#define MPC2PM_GPCTPCC4_MUXED_BUS_11 64
|
|
|
|
#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMGPC_GPCTPCC3_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_0 22
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_1 23
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_2 24
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_3 25
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_4 26
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_5 27
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_6 28
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_7 29
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_8 30
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_9 31
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_10 32
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_11 33
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_12 34
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_13 35
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_14 36
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#define SMV_TTU2PM_GPCTPCC3_MUXED_BUS_15 37
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#define PEL2PM_GPCTPCC3_MUXED_BUS_0 38
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#define PEL2PM_GPCTPCC3_MUXED_BUS_1 39
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#define PEL2PM_GPCTPCC3_MUXED_BUS_2 40
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#define PEL2PM_GPCTPCC3_MUXED_BUS_3 41
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#define PEL2PM_GPCTPCC3_MUXED_BUS_4 42
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#define PEL2PM_GPCTPCC3_MUXED_BUS_5 43
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#define PEL2PM_GPCTPCC3_MUXED_BUS_6 44
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#define PEL2PM_GPCTPCC3_MUXED_BUS_7 45
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#define PEL2PM_GPCTPCC3_MUXED_BUS_8 46
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#define PEL2PM_GPCTPCC3_MUXED_BUS_9 47
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#define PEL2PM_GPCTPCC3_MUXED_BUS_10 48
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#define PEL2PM_GPCTPCC3_MUXED_BUS_11 49
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#define MPC2PM_GPCTPCC3_SCG_MODE 50
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#define MPC2PM_GPCTPCC3_SCG_MODE_SWITCH 51
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#define TPC3_PEL2PM_GPCTPCC3_CLAMP_PERFMONOUT 52
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#define MPC2PM_GPCTPCC3_MUXED_BUS_0 53
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#define MPC2PM_GPCTPCC3_MUXED_BUS_1 54
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#define MPC2PM_GPCTPCC3_MUXED_BUS_2 55
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#define MPC2PM_GPCTPCC3_MUXED_BUS_3 56
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#define MPC2PM_GPCTPCC3_MUXED_BUS_4 57
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#define MPC2PM_GPCTPCC3_MUXED_BUS_5 58
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#define MPC2PM_GPCTPCC3_MUXED_BUS_6 59
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#define MPC2PM_GPCTPCC3_MUXED_BUS_7 60
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#define MPC2PM_GPCTPCC3_MUXED_BUS_8 61
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#define MPC2PM_GPCTPCC3_MUXED_BUS_9 62
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#define MPC2PM_GPCTPCC3_MUXED_BUS_10 63
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#define MPC2PM_GPCTPCC3_MUXED_BUS_11 64
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_ZERO 0
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_ONE 1
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMGPC_GPCTPCC2_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_0 22
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_1 23
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_2 24
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_3 25
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_4 26
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_5 27
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_6 28
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_7 29
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_8 30
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_9 31
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_10 32
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_11 33
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_12 34
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_13 35
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_14 36
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#define SMV_TTU2PM_GPCTPCC2_MUXED_BUS_15 37
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#define PEL2PM_GPCTPCC2_MUXED_BUS_0 38
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#define PEL2PM_GPCTPCC2_MUXED_BUS_1 39
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#define PEL2PM_GPCTPCC2_MUXED_BUS_2 40
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#define PEL2PM_GPCTPCC2_MUXED_BUS_3 41
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#define PEL2PM_GPCTPCC2_MUXED_BUS_4 42
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#define PEL2PM_GPCTPCC2_MUXED_BUS_5 43
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#define PEL2PM_GPCTPCC2_MUXED_BUS_6 44
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#define PEL2PM_GPCTPCC2_MUXED_BUS_7 45
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#define PEL2PM_GPCTPCC2_MUXED_BUS_8 46
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#define PEL2PM_GPCTPCC2_MUXED_BUS_9 47
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#define PEL2PM_GPCTPCC2_MUXED_BUS_10 48
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#define PEL2PM_GPCTPCC2_MUXED_BUS_11 49
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#define MPC2PM_GPCTPCC2_SCG_MODE 50
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#define MPC2PM_GPCTPCC2_SCG_MODE_SWITCH 51
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#define TPC2_PEL2PM_GPCTPCC2_CLAMP_PERFMONOUT 52
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#define MPC2PM_GPCTPCC2_MUXED_BUS_0 53
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#define MPC2PM_GPCTPCC2_MUXED_BUS_1 54
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#define MPC2PM_GPCTPCC2_MUXED_BUS_2 55
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#define MPC2PM_GPCTPCC2_MUXED_BUS_3 56
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#define MPC2PM_GPCTPCC2_MUXED_BUS_4 57
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#define MPC2PM_GPCTPCC2_MUXED_BUS_5 58
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#define MPC2PM_GPCTPCC2_MUXED_BUS_6 59
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#define MPC2PM_GPCTPCC2_MUXED_BUS_7 60
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#define MPC2PM_GPCTPCC2_MUXED_BUS_8 61
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#define MPC2PM_GPCTPCC2_MUXED_BUS_9 62
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#define MPC2PM_GPCTPCC2_MUXED_BUS_10 63
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#define MPC2PM_GPCTPCC2_MUXED_BUS_11 64
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_ZERO 0
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_ONE 1
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_T_PULSE 3
|
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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|
#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPCTPCC1_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_0 22
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#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_1 23
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#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_2 24
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#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_3 25
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|
#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_4 26
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|
#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_5 27
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|
#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_6 28
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|
#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_7 29
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#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_8 30
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|
#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_9 31
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#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_10 32
|
|
#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_11 33
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|
#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_12 34
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|
#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_13 35
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|
#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_14 36
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#define SMV_TTU2PM_GPCTPCC1_MUXED_BUS_15 37
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#define PEL2PM_GPCTPCC1_MUXED_BUS_0 38
|
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#define PEL2PM_GPCTPCC1_MUXED_BUS_1 39
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#define PEL2PM_GPCTPCC1_MUXED_BUS_2 40
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#define PEL2PM_GPCTPCC1_MUXED_BUS_3 41
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#define PEL2PM_GPCTPCC1_MUXED_BUS_4 42
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#define PEL2PM_GPCTPCC1_MUXED_BUS_5 43
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#define PEL2PM_GPCTPCC1_MUXED_BUS_6 44
|
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#define PEL2PM_GPCTPCC1_MUXED_BUS_7 45
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#define PEL2PM_GPCTPCC1_MUXED_BUS_8 46
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#define PEL2PM_GPCTPCC1_MUXED_BUS_9 47
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#define PEL2PM_GPCTPCC1_MUXED_BUS_10 48
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#define PEL2PM_GPCTPCC1_MUXED_BUS_11 49
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#define MPC2PM_GPCTPCC1_SCG_MODE 50
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#define MPC2PM_GPCTPCC1_SCG_MODE_SWITCH 51
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#define TPC1_PEL2PM_GPCTPCC1_CLAMP_PERFMONOUT 52
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|
#define MPC2PM_GPCTPCC1_MUXED_BUS_0 53
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#define MPC2PM_GPCTPCC1_MUXED_BUS_1 54
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#define MPC2PM_GPCTPCC1_MUXED_BUS_2 55
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#define MPC2PM_GPCTPCC1_MUXED_BUS_3 56
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#define MPC2PM_GPCTPCC1_MUXED_BUS_4 57
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#define MPC2PM_GPCTPCC1_MUXED_BUS_5 58
|
|
#define MPC2PM_GPCTPCC1_MUXED_BUS_6 59
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|
#define MPC2PM_GPCTPCC1_MUXED_BUS_7 60
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|
#define MPC2PM_GPCTPCC1_MUXED_BUS_8 61
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#define MPC2PM_GPCTPCC1_MUXED_BUS_9 62
|
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#define MPC2PM_GPCTPCC1_MUXED_BUS_10 63
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#define MPC2PM_GPCTPCC1_MUXED_BUS_11 64
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|
|
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#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPCTPCC0_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_0 22
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_1 23
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_2 24
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_3 25
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_4 26
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_5 27
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_6 28
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_7 29
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_8 30
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_9 31
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_10 32
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_11 33
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_12 34
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_13 35
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_14 36
|
|
#define SMV_TTU2PM_GPCTPCC0_MUXED_BUS_15 37
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_0 38
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_1 39
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_2 40
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_3 41
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_4 42
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_5 43
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_6 44
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_7 45
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_8 46
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_9 47
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_10 48
|
|
#define PEL2PM_GPCTPCC0_MUXED_BUS_11 49
|
|
#define MPC2PM_GPCTPCC0_SCG_MODE 50
|
|
#define MPC2PM_GPCTPCC0_SCG_MODE_SWITCH 51
|
|
#define TPC0_PEL2PM_GPCTPC0_CLAMP_PERFMONOUT 52
|
|
#define MPC2PM_GPCTPCC0_MUXED_BUS_0 53
|
|
#define MPC2PM_GPCTPCC0_MUXED_BUS_1 54
|
|
#define MPC2PM_GPCTPCC0_MUXED_BUS_2 55
|
|
#define MPC2PM_GPCTPCC0_MUXED_BUS_3 56
|
|
#define MPC2PM_GPCTPCC0_MUXED_BUS_4 57
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#define MPC2PM_GPCTPCC0_MUXED_BUS_5 58
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#define MPC2PM_GPCTPCC0_MUXED_BUS_6 59
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#define MPC2PM_GPCTPCC0_MUXED_BUS_7 60
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#define MPC2PM_GPCTPCC0_MUXED_BUS_8 61
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#define MPC2PM_GPCTPCC0_MUXED_BUS_9 62
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#define MPC2PM_GPCTPCC0_MUXED_BUS_10 63
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#define MPC2PM_GPCTPCC0_MUXED_BUS_11 64
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_ZERO 0
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_ONE 1
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMGPC_GPCTPCB5_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_0 22
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_1 23
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_2 24
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_3 25
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_4 26
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_5 27
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_6 28
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_7 29
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_8 30
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_9 31
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_10 32
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_11 33
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_12 34
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_13 35
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_14 36
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#define SMV_CORE2PM_GPCTPCB5_MUXED_BUS_15 37
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_0 38
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_1 39
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_2 40
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_3 41
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_4 42
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_5 43
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_6 44
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_7 45
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_8 46
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_9 47
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_10 48
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_11 49
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_12 50
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_13 51
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_14 52
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#define SMV_CORE2PM_GPCTPCB5_SCTL_PM_MUX_AGGREGATED_15 53
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_0 54
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_1 55
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_2 56
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_3 57
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_4 58
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_5 59
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_6 60
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_7 61
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_8 62
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_9 63
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_10 64
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_11 65
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_12 66
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_13 67
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_14 68
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#define SMV_SCTL02PM_GPCTPCB5_MUXED_BUS_15 69
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_0 70
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_1 71
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_2 72
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_3 73
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_4 74
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_5 75
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_6 76
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|
#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_7 77
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_8 78
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_9 79
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_10 80
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_11 81
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|
#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_12 82
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_13 83
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_14 84
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#define SMV_SCTL12PM_GPCTPCB5_MUXED_BUS_15 85
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|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_0 86
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#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_1 87
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|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_2 88
|
|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_3 89
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|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_4 90
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|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_5 91
|
|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_6 92
|
|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_7 93
|
|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_8 94
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|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_9 95
|
|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_10 96
|
|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_11 97
|
|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_12 98
|
|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_13 99
|
|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_14 100
|
|
#define SMV_SCTL22PM_GPCTPCB5_MUXED_BUS_15 101
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_0 102
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_1 103
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_2 104
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_3 105
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_4 106
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_5 107
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_6 108
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_7 109
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_8 110
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_9 111
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_10 112
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_11 113
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_12 114
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_13 115
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_14 116
|
|
#define SMV_SCTL32PM_GPCTPCB5_MUXED_BUS_15 117
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|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_0 118
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_1 119
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_2 120
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_3 121
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_4 122
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_5 123
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_6 124
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_7 125
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_8 126
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_9 127
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_10 128
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_11 129
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_12 130
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_13 131
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_14 132
|
|
#define SMV_MIO12PM_GPCTPCB5_MUXED_BUS_15 133
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_0 134
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_1 135
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_2 136
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_3 137
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_4 138
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_5 139
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_6 140
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_7 141
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_8 142
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_9 143
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_10 144
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_11 145
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_12 146
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_13 147
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_14 148
|
|
#define SMV_TEX12PM_GPCTPCB5_MUXED_BUS_15 149
|
|
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_VWTRIGGER5 13
|
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#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_VWTRIGGER6 14
|
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#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
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#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
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#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPCTPCB4_SIGVAL_PMM_CONTEXT_FREEZE 21
|
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#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_0 22
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_1 23
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_2 24
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_3 25
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_4 26
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_5 27
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_6 28
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_7 29
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_8 30
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_9 31
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_10 32
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_11 33
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_12 34
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_13 35
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_14 36
|
|
#define SMV_CORE2PM_GPCTPCB4_MUXED_BUS_15 37
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_0 38
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_1 39
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_2 40
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_3 41
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_4 42
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_5 43
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_6 44
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_7 45
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_8 46
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_9 47
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_10 48
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_11 49
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_12 50
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_13 51
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_14 52
|
|
#define SMV_CORE2PM_GPCTPCB4_SCTL_PM_MUX_AGGREGATED_15 53
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_0 54
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_1 55
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_2 56
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_3 57
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_4 58
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_5 59
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_6 60
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_7 61
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_8 62
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_9 63
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_10 64
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_11 65
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_12 66
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_13 67
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_14 68
|
|
#define SMV_SCTL02PM_GPCTPCB4_MUXED_BUS_15 69
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_0 70
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_1 71
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_2 72
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_3 73
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_4 74
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_5 75
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_6 76
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_7 77
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_8 78
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_9 79
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_10 80
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_11 81
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_12 82
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_13 83
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_14 84
|
|
#define SMV_SCTL12PM_GPCTPCB4_MUXED_BUS_15 85
|
|
#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_0 86
|
|
#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_1 87
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#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_2 88
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#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_3 89
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#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_4 90
|
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#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_5 91
|
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#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_6 92
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#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_7 93
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#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_8 94
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#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_9 95
|
|
#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_10 96
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|
#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_11 97
|
|
#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_12 98
|
|
#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_13 99
|
|
#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_14 100
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|
#define SMV_SCTL22PM_GPCTPCB4_MUXED_BUS_15 101
|
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#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_0 102
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_1 103
|
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#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_2 104
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#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_3 105
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_4 106
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_5 107
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_6 108
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_7 109
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_8 110
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_9 111
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_10 112
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_11 113
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_12 114
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_13 115
|
|
#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_14 116
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#define SMV_SCTL32PM_GPCTPCB4_MUXED_BUS_15 117
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_0 118
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_1 119
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_2 120
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_3 121
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_4 122
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_5 123
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_6 124
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_7 125
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_8 126
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_9 127
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_10 128
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_11 129
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_12 130
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_13 131
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_14 132
|
|
#define SMV_MIO12PM_GPCTPCB4_MUXED_BUS_15 133
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_0 134
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_1 135
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_2 136
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_3 137
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_4 138
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_5 139
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_6 140
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_7 141
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_8 142
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_9 143
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_10 144
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_11 145
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_12 146
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_13 147
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_14 148
|
|
#define SMV_TEX12PM_GPCTPCB4_MUXED_BUS_15 149
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|
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|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
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#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPCTPCB3_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_0 22
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_1 23
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_2 24
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_3 25
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_4 26
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_5 27
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_6 28
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_7 29
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_8 30
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_9 31
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_10 32
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_11 33
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_12 34
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_13 35
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_14 36
|
|
#define SMV_CORE2PM_GPCTPCB3_MUXED_BUS_15 37
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_0 38
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_1 39
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_2 40
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_3 41
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_4 42
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_5 43
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_6 44
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_7 45
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_8 46
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_9 47
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_10 48
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_11 49
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_12 50
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_13 51
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_14 52
|
|
#define SMV_CORE2PM_GPCTPCB3_SCTL_PM_MUX_AGGREGATED_15 53
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_0 54
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_1 55
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_2 56
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_3 57
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_4 58
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_5 59
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_6 60
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_7 61
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_8 62
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_9 63
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_10 64
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_11 65
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_12 66
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_13 67
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_14 68
|
|
#define SMV_SCTL02PM_GPCTPCB3_MUXED_BUS_15 69
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_0 70
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_1 71
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_2 72
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_3 73
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_4 74
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_5 75
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_6 76
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_7 77
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_8 78
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_9 79
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_10 80
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_11 81
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_12 82
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_13 83
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_14 84
|
|
#define SMV_SCTL12PM_GPCTPCB3_MUXED_BUS_15 85
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_0 86
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_1 87
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_2 88
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_3 89
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_4 90
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_5 91
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_6 92
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_7 93
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_8 94
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_9 95
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_10 96
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_11 97
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_12 98
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_13 99
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_14 100
|
|
#define SMV_SCTL22PM_GPCTPCB3_MUXED_BUS_15 101
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_0 102
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_1 103
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_2 104
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_3 105
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_4 106
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_5 107
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_6 108
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_7 109
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_8 110
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_9 111
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_10 112
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_11 113
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_12 114
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_13 115
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_14 116
|
|
#define SMV_SCTL32PM_GPCTPCB3_MUXED_BUS_15 117
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_0 118
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_1 119
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_2 120
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_3 121
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_4 122
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_5 123
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_6 124
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_7 125
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_8 126
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_9 127
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_10 128
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_11 129
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_12 130
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_13 131
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_14 132
|
|
#define SMV_MIO12PM_GPCTPCB3_MUXED_BUS_15 133
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_0 134
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_1 135
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_2 136
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_3 137
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_4 138
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_5 139
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_6 140
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_7 141
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_8 142
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_9 143
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_10 144
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_11 145
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_12 146
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_13 147
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_14 148
|
|
#define SMV_TEX12PM_GPCTPCB3_MUXED_BUS_15 149
|
|
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPCTPCB2_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_0 22
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_1 23
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_2 24
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_3 25
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_4 26
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_5 27
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_6 28
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_7 29
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_8 30
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_9 31
|
|
#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_10 32
|
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#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_11 33
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#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_12 34
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#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_13 35
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#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_14 36
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#define SMV_CORE2PM_GPCTPCB2_MUXED_BUS_15 37
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_0 38
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_1 39
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_2 40
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_3 41
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_4 42
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_5 43
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_6 44
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_7 45
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_8 46
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_9 47
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_10 48
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_11 49
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_12 50
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_13 51
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_14 52
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#define SMV_CORE2PM_GPCTPCB2_SCTL_PM_MUX_AGGREGATED_15 53
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_0 54
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_1 55
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_2 56
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_3 57
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_4 58
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_5 59
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_6 60
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_7 61
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_8 62
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_9 63
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_10 64
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_11 65
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_12 66
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_13 67
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_14 68
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#define SMV_SCTL02PM_GPCTPCB2_MUXED_BUS_15 69
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_0 70
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_1 71
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_2 72
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_3 73
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_4 74
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_5 75
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_6 76
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_7 77
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_8 78
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_9 79
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_10 80
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_11 81
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_12 82
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_13 83
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_14 84
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#define SMV_SCTL12PM_GPCTPCB2_MUXED_BUS_15 85
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_0 86
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_1 87
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_2 88
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_3 89
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_4 90
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_5 91
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_6 92
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_7 93
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_8 94
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_9 95
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_10 96
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_11 97
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_12 98
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_13 99
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_14 100
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#define SMV_SCTL22PM_GPCTPCB2_MUXED_BUS_15 101
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#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_0 102
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|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_1 103
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#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_2 104
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|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_3 105
|
|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_4 106
|
|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_5 107
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|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_6 108
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|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_7 109
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|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_8 110
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|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_9 111
|
|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_10 112
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|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_11 113
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|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_12 114
|
|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_13 115
|
|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_14 116
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|
#define SMV_SCTL32PM_GPCTPCB2_MUXED_BUS_15 117
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#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_0 118
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_1 119
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_2 120
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_3 121
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_4 122
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_5 123
|
|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_6 124
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_7 125
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_8 126
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_9 127
|
|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_10 128
|
|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_11 129
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_12 130
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_13 131
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#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_14 132
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|
#define SMV_MIO12PM_GPCTPCB2_MUXED_BUS_15 133
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_0 134
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_1 135
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_2 136
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_3 137
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_4 138
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_5 139
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#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_6 140
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_7 141
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_8 142
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_9 143
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_10 144
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_11 145
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_12 146
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_13 147
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_14 148
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|
#define SMV_TEX12PM_GPCTPCB2_MUXED_BUS_15 149
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|
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_ZERO 0
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_ONE 1
|
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_VWTRIGGER7 15
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|
#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMGPC_GPCTPCB1_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_0 22
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#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_1 23
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#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_2 24
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#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_3 25
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#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_4 26
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#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_5 27
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|
#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_6 28
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#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_7 29
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#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_8 30
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#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_9 31
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#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_10 32
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|
#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_11 33
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|
#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_12 34
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|
#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_13 35
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|
#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_14 36
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|
#define SMV_CORE2PM_GPCTPCB1_MUXED_BUS_15 37
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|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_0 38
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#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_1 39
|
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#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_2 40
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|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_3 41
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|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_4 42
|
|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_5 43
|
|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_6 44
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#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_7 45
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|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_8 46
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|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_9 47
|
|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_10 48
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|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_11 49
|
|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_12 50
|
|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_13 51
|
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#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_14 52
|
|
#define SMV_CORE2PM_GPCTPCB1_SCTL_PM_MUX_AGGREGATED_15 53
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#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_0 54
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#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_1 55
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#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_2 56
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|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_3 57
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|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_4 58
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|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_5 59
|
|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_6 60
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|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_7 61
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|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_8 62
|
|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_9 63
|
|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_10 64
|
|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_11 65
|
|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_12 66
|
|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_13 67
|
|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_14 68
|
|
#define SMV_SCTL02PM_GPCTPCB1_MUXED_BUS_15 69
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_0 70
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_1 71
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_2 72
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_3 73
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_4 74
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_5 75
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_6 76
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_7 77
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_8 78
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_9 79
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_10 80
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_11 81
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_12 82
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_13 83
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_14 84
|
|
#define SMV_SCTL12PM_GPCTPCB1_MUXED_BUS_15 85
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_0 86
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_1 87
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_2 88
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_3 89
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_4 90
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_5 91
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_6 92
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_7 93
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_8 94
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_9 95
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_10 96
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_11 97
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_12 98
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_13 99
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_14 100
|
|
#define SMV_SCTL22PM_GPCTPCB1_MUXED_BUS_15 101
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_0 102
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_1 103
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_2 104
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_3 105
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_4 106
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_5 107
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_6 108
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_7 109
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_8 110
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_9 111
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_10 112
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_11 113
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_12 114
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_13 115
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_14 116
|
|
#define SMV_SCTL32PM_GPCTPCB1_MUXED_BUS_15 117
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_0 118
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_1 119
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_2 120
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_3 121
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_4 122
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_5 123
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_6 124
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_7 125
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_8 126
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_9 127
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_10 128
|
|
#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_11 129
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#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_12 130
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#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_13 131
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#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_14 132
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#define SMV_MIO12PM_GPCTPCB1_MUXED_BUS_15 133
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_0 134
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_1 135
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_2 136
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_3 137
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_4 138
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_5 139
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_6 140
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_7 141
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_8 142
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_9 143
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_10 144
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_11 145
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_12 146
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_13 147
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_14 148
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#define SMV_TEX12PM_GPCTPCB1_MUXED_BUS_15 149
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_ZERO 0
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_ONE 1
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMGPC_GPCTPCB0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_0 22
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_1 23
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_2 24
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_3 25
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_4 26
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_5 27
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_6 28
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_7 29
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_8 30
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_9 31
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_10 32
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_11 33
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_12 34
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_13 35
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_14 36
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#define SMV_CORE2PM_GPCTPCB0_MUXED_BUS_15 37
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_0 38
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_1 39
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_2 40
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_3 41
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|
#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_4 42
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_5 43
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_6 44
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|
#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_7 45
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_8 46
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_9 47
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_10 48
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_11 49
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|
#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_12 50
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|
#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_13 51
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_14 52
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#define SMV_CORE2PM_GPCTPCB0_SCTL_PM_MUX_AGGREGATED_15 53
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#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_0 54
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#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_1 55
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#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_2 56
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#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_3 57
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#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_4 58
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#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_5 59
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#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_6 60
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|
#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_7 61
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#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_8 62
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#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_9 63
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|
#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_10 64
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|
#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_11 65
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|
#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_12 66
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|
#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_13 67
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#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_14 68
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|
#define SMV_SCTL02PM_GPCTPCB0_MUXED_BUS_15 69
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#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_0 70
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#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_1 71
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#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_2 72
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|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_3 73
|
|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_4 74
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|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_5 75
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|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_6 76
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|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_7 77
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|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_8 78
|
|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_9 79
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|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_10 80
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|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_11 81
|
|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_12 82
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|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_13 83
|
|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_14 84
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|
#define SMV_SCTL12PM_GPCTPCB0_MUXED_BUS_15 85
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|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_0 86
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_1 87
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_2 88
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_3 89
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_4 90
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_5 91
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_6 92
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_7 93
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_8 94
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_9 95
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_10 96
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_11 97
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_12 98
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_13 99
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_14 100
|
|
#define SMV_SCTL22PM_GPCTPCB0_MUXED_BUS_15 101
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_0 102
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_1 103
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_2 104
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_3 105
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_4 106
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_5 107
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_6 108
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_7 109
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_8 110
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_9 111
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_10 112
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_11 113
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_12 114
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_13 115
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_14 116
|
|
#define SMV_SCTL32PM_GPCTPCB0_MUXED_BUS_15 117
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_0 118
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_1 119
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_2 120
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_3 121
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_4 122
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_5 123
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_6 124
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_7 125
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_8 126
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_9 127
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_10 128
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_11 129
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_12 130
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_13 131
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_14 132
|
|
#define SMV_MIO12PM_GPCTPCB0_MUXED_BUS_15 133
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_0 134
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_1 135
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_2 136
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_3 137
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_4 138
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_5 139
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_6 140
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_7 141
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_8 142
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_9 143
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|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_10 144
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_11 145
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_12 146
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_13 147
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_14 148
|
|
#define SMV_TEX12PM_GPCTPCB0_MUXED_BUS_15 149
|
|
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_VWTRIGGER5 13
|
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#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPCTPCA5_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_0 22
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_1 23
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_2 24
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_3 25
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_4 26
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_5 27
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_6 28
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_7 29
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_8 30
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_9 31
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_10 32
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_11 33
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_12 34
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_13 35
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_14 36
|
|
#define SMV_CORE2PM_GPCTPCA5_MUXED_BUS_15 37
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_0 38
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_1 39
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_2 40
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_3 41
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_4 42
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_5 43
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_6 44
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_7 45
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_8 46
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_9 47
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_10 48
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_11 49
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_12 50
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_13 51
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_14 52
|
|
#define SMV_CORE2PM_GPCTPCA5_SCTL_PM_MUX_AGGREGATED_15 53
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_0 54
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_1 55
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_2 56
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_3 57
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_4 58
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_5 59
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_6 60
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_7 61
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_8 62
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_9 63
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_10 64
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_11 65
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_12 66
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_13 67
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_14 68
|
|
#define SMV_SCTL02PM_GPCTPCA5_MUXED_BUS_15 69
|
|
#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_0 70
|
|
#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_1 71
|
|
#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_2 72
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_3 73
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_4 74
|
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_5 75
|
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_6 76
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_7 77
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_8 78
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_9 79
|
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_10 80
|
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_11 81
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_12 82
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_13 83
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_14 84
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#define SMV_SCTL12PM_GPCTPCA5_MUXED_BUS_15 85
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#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_0 86
|
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#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_1 87
|
|
#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_2 88
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#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_3 89
|
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#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_4 90
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#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_5 91
|
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#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_6 92
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#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_7 93
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|
#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_8 94
|
|
#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_9 95
|
|
#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_10 96
|
|
#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_11 97
|
|
#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_12 98
|
|
#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_13 99
|
|
#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_14 100
|
|
#define SMV_SCTL22PM_GPCTPCA5_MUXED_BUS_15 101
|
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#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_0 102
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_1 103
|
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#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_2 104
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_3 105
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_4 106
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_5 107
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_6 108
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_7 109
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_8 110
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_9 111
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_10 112
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_11 113
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_12 114
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_13 115
|
|
#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_14 116
|
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#define SMV_SCTL32PM_GPCTPCA5_MUXED_BUS_15 117
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_0 118
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_1 119
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_2 120
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_3 121
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_4 122
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_5 123
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_6 124
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_7 125
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_8 126
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_9 127
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_10 128
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_11 129
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_12 130
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_13 131
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_14 132
|
|
#define SMV_MIO02PM_GPCTPCA5_MUXED_BUS_15 133
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_0 134
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_1 135
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_2 136
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_3 137
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_4 138
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_5 139
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_6 140
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_7 141
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_8 142
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_9 143
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_10 144
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_11 145
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_12 146
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_13 147
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_14 148
|
|
#define SMV_TEX02PM_GPCTPCA5_MUXED_BUS_15 149
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_0 150
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_1 151
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_2 152
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_3 153
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_4 154
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_5 155
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_6 156
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_7 157
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_8 158
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_9 159
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_10 160
|
|
#define MPC2PM_GPCTPCA5_MUXED_BUS_11 161
|
|
#define MPC2PM_GPCTPCA5_SCG_MODE 162
|
|
#define MPC2PM_GPCTPCA5_SCG_MODE_SWITCH 163
|
|
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPCTPCA4_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_0 22
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_1 23
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_2 24
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_3 25
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_4 26
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_5 27
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_6 28
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_7 29
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_8 30
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_9 31
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_10 32
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_11 33
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_12 34
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_13 35
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_14 36
|
|
#define SMV_CORE2PM_GPCTPCA4_MUXED_BUS_15 37
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_0 38
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_1 39
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_2 40
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_3 41
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_4 42
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_5 43
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_6 44
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_7 45
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_8 46
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_9 47
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_10 48
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_11 49
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_12 50
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_13 51
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_14 52
|
|
#define SMV_CORE2PM_GPCTPCA4_SCTL_PM_MUX_AGGREGATED_15 53
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_0 54
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_1 55
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_2 56
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_3 57
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_4 58
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_5 59
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_6 60
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_7 61
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_8 62
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_9 63
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_10 64
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_11 65
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_12 66
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_13 67
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_14 68
|
|
#define SMV_SCTL02PM_GPCTPCA4_MUXED_BUS_15 69
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_0 70
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_1 71
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_2 72
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_3 73
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_4 74
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_5 75
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_6 76
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_7 77
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_8 78
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_9 79
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_10 80
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_11 81
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_12 82
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_13 83
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_14 84
|
|
#define SMV_SCTL12PM_GPCTPCA4_MUXED_BUS_15 85
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_0 86
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_1 87
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_2 88
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_3 89
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_4 90
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_5 91
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_6 92
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_7 93
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_8 94
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_9 95
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_10 96
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_11 97
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_12 98
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_13 99
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_14 100
|
|
#define SMV_SCTL22PM_GPCTPCA4_MUXED_BUS_15 101
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_0 102
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_1 103
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_2 104
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_3 105
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_4 106
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_5 107
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_6 108
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_7 109
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_8 110
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_9 111
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_10 112
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_11 113
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_12 114
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_13 115
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_14 116
|
|
#define SMV_SCTL32PM_GPCTPCA4_MUXED_BUS_15 117
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_0 118
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_1 119
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_2 120
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_3 121
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_4 122
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_5 123
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_6 124
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_7 125
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_8 126
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_9 127
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_10 128
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_11 129
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_12 130
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_13 131
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_14 132
|
|
#define SMV_MIO02PM_GPCTPCA4_MUXED_BUS_15 133
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_0 134
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_1 135
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_2 136
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_3 137
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_4 138
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_5 139
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_6 140
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_7 141
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_8 142
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_9 143
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_10 144
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_11 145
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_12 146
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_13 147
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_14 148
|
|
#define SMV_TEX02PM_GPCTPCA4_MUXED_BUS_15 149
|
|
#define MPC2PM_GPCTPCA4_MUXED_BUS_0 150
|
|
#define MPC2PM_GPCTPCA4_MUXED_BUS_1 151
|
|
#define MPC2PM_GPCTPCA4_MUXED_BUS_2 152
|
|
#define MPC2PM_GPCTPCA4_MUXED_BUS_3 153
|
|
#define MPC2PM_GPCTPCA4_MUXED_BUS_4 154
|
|
#define MPC2PM_GPCTPCA4_MUXED_BUS_5 155
|
|
#define MPC2PM_GPCTPCA4_MUXED_BUS_6 156
|
|
#define MPC2PM_GPCTPCA4_MUXED_BUS_7 157
|
|
#define MPC2PM_GPCTPCA4_MUXED_BUS_8 158
|
|
#define MPC2PM_GPCTPCA4_MUXED_BUS_9 159
|
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#define MPC2PM_GPCTPCA4_MUXED_BUS_10 160
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#define MPC2PM_GPCTPCA4_MUXED_BUS_11 161
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#define MPC2PM_GPCTPCA4_SCG_MODE 162
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#define MPC2PM_GPCTPCA4_SCG_MODE_SWITCH 163
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_ZERO 0
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_ONE 1
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMGPC_GPCTPCA3_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_0 22
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_1 23
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_2 24
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_3 25
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_4 26
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_5 27
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_6 28
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_7 29
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_8 30
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_9 31
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_10 32
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_11 33
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_12 34
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_13 35
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_14 36
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#define SMV_CORE2PM_GPCTPCA3_MUXED_BUS_15 37
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_0 38
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_1 39
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_2 40
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_3 41
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_4 42
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_5 43
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_6 44
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_7 45
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_8 46
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_9 47
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_10 48
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_11 49
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_12 50
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_13 51
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_14 52
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#define SMV_CORE2PM_GPCTPCA3_SCTL_PM_MUX_AGGREGATED_15 53
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_0 54
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_1 55
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_2 56
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_3 57
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_4 58
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_5 59
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_6 60
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_7 61
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_8 62
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_9 63
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_10 64
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_11 65
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_12 66
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_13 67
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|
#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_14 68
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#define SMV_SCTL02PM_GPCTPCA3_MUXED_BUS_15 69
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|
#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_0 70
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#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_1 71
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#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_2 72
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#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_3 73
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#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_4 74
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#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_5 75
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#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_6 76
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#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_7 77
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#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_8 78
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|
#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_9 79
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|
#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_10 80
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|
#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_11 81
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|
#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_12 82
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|
#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_13 83
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|
#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_14 84
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|
#define SMV_SCTL12PM_GPCTPCA3_MUXED_BUS_15 85
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|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_0 86
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#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_1 87
|
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#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_2 88
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_3 89
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_4 90
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_5 91
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|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_6 92
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_7 93
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_8 94
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_9 95
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_10 96
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_11 97
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_12 98
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_13 99
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_14 100
|
|
#define SMV_SCTL22PM_GPCTPCA3_MUXED_BUS_15 101
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_0 102
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_1 103
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_2 104
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_3 105
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_4 106
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_5 107
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_6 108
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_7 109
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_8 110
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_9 111
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_10 112
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_11 113
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_12 114
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_13 115
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_14 116
|
|
#define SMV_SCTL32PM_GPCTPCA3_MUXED_BUS_15 117
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_0 118
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_1 119
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_2 120
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_3 121
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_4 122
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_5 123
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_6 124
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_7 125
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_8 126
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_9 127
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_10 128
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_11 129
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_12 130
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_13 131
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_14 132
|
|
#define SMV_MIO02PM_GPCTPCA3_MUXED_BUS_15 133
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_0 134
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_1 135
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_2 136
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_3 137
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_4 138
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_5 139
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_6 140
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_7 141
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_8 142
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_9 143
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_10 144
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_11 145
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_12 146
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_13 147
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_14 148
|
|
#define SMV_TEX02PM_GPCTPCA3_MUXED_BUS_15 149
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_0 150
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_1 151
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_2 152
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_3 153
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_4 154
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_5 155
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_6 156
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_7 157
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_8 158
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_9 159
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_10 160
|
|
#define MPC2PM_GPCTPCA3_MUXED_BUS_11 161
|
|
#define MPC2PM_GPCTPCA3_SCG_MODE 162
|
|
#define MPC2PM_GPCTPCA3_SCG_MODE_SWITCH 163
|
|
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_VWTRIGGER5 13
|
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#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPCTPCA2_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_0 22
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_1 23
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_2 24
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_3 25
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_4 26
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_5 27
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_6 28
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_7 29
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_8 30
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_9 31
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_10 32
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_11 33
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_12 34
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_13 35
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_14 36
|
|
#define SMV_CORE2PM_GPCTPCA2_MUXED_BUS_15 37
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_0 38
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_1 39
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_2 40
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_3 41
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_4 42
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_5 43
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_6 44
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_7 45
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_8 46
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_9 47
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_10 48
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_11 49
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_12 50
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_13 51
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_14 52
|
|
#define SMV_CORE2PM_GPCTPCA2_SCTL_PM_MUX_AGGREGATED_15 53
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_0 54
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_1 55
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_2 56
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_3 57
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_4 58
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_5 59
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_6 60
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_7 61
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_8 62
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_9 63
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_10 64
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_11 65
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_12 66
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_13 67
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_14 68
|
|
#define SMV_SCTL02PM_GPCTPCA2_MUXED_BUS_15 69
|
|
#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_0 70
|
|
#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_1 71
|
|
#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_2 72
|
|
#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_3 73
|
|
#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_4 74
|
|
#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_5 75
|
|
#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_6 76
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|
#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_7 77
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#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_8 78
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#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_9 79
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#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_10 80
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#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_11 81
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#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_12 82
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#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_13 83
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#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_14 84
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#define SMV_SCTL12PM_GPCTPCA2_MUXED_BUS_15 85
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_0 86
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_1 87
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_2 88
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_3 89
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_4 90
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_5 91
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_6 92
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_7 93
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_8 94
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_9 95
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_10 96
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_11 97
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_12 98
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_13 99
|
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_14 100
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#define SMV_SCTL22PM_GPCTPCA2_MUXED_BUS_15 101
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_0 102
|
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_1 103
|
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_2 104
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_3 105
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_4 106
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_5 107
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_6 108
|
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_7 109
|
|
#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_8 110
|
|
#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_9 111
|
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_10 112
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_11 113
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_12 114
|
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_13 115
|
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_14 116
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#define SMV_SCTL32PM_GPCTPCA2_MUXED_BUS_15 117
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#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_0 118
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|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_1 119
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|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_2 120
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#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_3 121
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#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_4 122
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#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_5 123
|
|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_6 124
|
|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_7 125
|
|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_8 126
|
|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_9 127
|
|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_10 128
|
|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_11 129
|
|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_12 130
|
|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_13 131
|
|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_14 132
|
|
#define SMV_MIO02PM_GPCTPCA2_MUXED_BUS_15 133
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_0 134
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_1 135
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_2 136
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_3 137
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_4 138
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_5 139
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_6 140
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_7 141
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_8 142
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|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_9 143
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_10 144
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_11 145
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_12 146
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_13 147
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_14 148
|
|
#define SMV_TEX02PM_GPCTPCA2_MUXED_BUS_15 149
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|
#define MPC2PM_GPCTPCA2_MUXED_BUS_0 150
|
|
#define MPC2PM_GPCTPCA2_MUXED_BUS_1 151
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#define MPC2PM_GPCTPCA2_MUXED_BUS_2 152
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|
#define MPC2PM_GPCTPCA2_MUXED_BUS_3 153
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|
#define MPC2PM_GPCTPCA2_MUXED_BUS_4 154
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#define MPC2PM_GPCTPCA2_MUXED_BUS_5 155
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#define MPC2PM_GPCTPCA2_MUXED_BUS_6 156
|
|
#define MPC2PM_GPCTPCA2_MUXED_BUS_7 157
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#define MPC2PM_GPCTPCA2_MUXED_BUS_8 158
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|
#define MPC2PM_GPCTPCA2_MUXED_BUS_9 159
|
|
#define MPC2PM_GPCTPCA2_MUXED_BUS_10 160
|
|
#define MPC2PM_GPCTPCA2_MUXED_BUS_11 161
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#define MPC2PM_GPCTPCA2_SCG_MODE 162
|
|
#define MPC2PM_GPCTPCA2_SCG_MODE_SWITCH 163
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|
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_T_PULSE 3
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_PMMPRICONTROL0 4
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_PMMPRICONTROL1 5
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_PMMPRICONTROL2 6
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_PMMPRICONTROL3 7
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_VWTRIGGER0 8
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_VWTRIGGER1 9
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_VWTRIGGER2 10
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_VWTRIGGER3 11
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_VWTRIGGER7 15
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
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#define NV_PERF_PMMGPC_GPCTPCA1_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_0 22
|
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#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_1 23
|
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#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_2 24
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#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_3 25
|
|
#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_4 26
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|
#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_5 27
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|
#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_6 28
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#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_7 29
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#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_8 30
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#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_9 31
|
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#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_10 32
|
|
#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_11 33
|
|
#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_12 34
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|
#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_13 35
|
|
#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_14 36
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#define SMV_CORE2PM_GPCTPCA1_MUXED_BUS_15 37
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#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_0 38
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_1 39
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_2 40
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_3 41
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_4 42
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_5 43
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_6 44
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_7 45
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_8 46
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_9 47
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_10 48
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_11 49
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_12 50
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_13 51
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_14 52
|
|
#define SMV_CORE2PM_GPCTPCA1_SCTL_PM_MUX_AGGREGATED_15 53
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_0 54
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_1 55
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_2 56
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_3 57
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_4 58
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_5 59
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_6 60
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_7 61
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_8 62
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_9 63
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_10 64
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_11 65
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_12 66
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_13 67
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_14 68
|
|
#define SMV_SCTL02PM_GPCTPCA1_MUXED_BUS_15 69
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_0 70
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_1 71
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_2 72
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_3 73
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_4 74
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_5 75
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_6 76
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_7 77
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_8 78
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_9 79
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_10 80
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_11 81
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_12 82
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_13 83
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_14 84
|
|
#define SMV_SCTL12PM_GPCTPCA1_MUXED_BUS_15 85
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_0 86
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_1 87
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_2 88
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_3 89
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_4 90
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_5 91
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_6 92
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_7 93
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_8 94
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_9 95
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_10 96
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_11 97
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_12 98
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_13 99
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_14 100
|
|
#define SMV_SCTL22PM_GPCTPCA1_MUXED_BUS_15 101
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_0 102
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_1 103
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_2 104
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_3 105
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_4 106
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_5 107
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_6 108
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_7 109
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_8 110
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_9 111
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_10 112
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_11 113
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_12 114
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_13 115
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_14 116
|
|
#define SMV_SCTL32PM_GPCTPCA1_MUXED_BUS_15 117
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_0 118
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_1 119
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_2 120
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_3 121
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_4 122
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_5 123
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_6 124
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_7 125
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_8 126
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_9 127
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_10 128
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_11 129
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_12 130
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_13 131
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_14 132
|
|
#define SMV_MIO02PM_GPCTPCA1_MUXED_BUS_15 133
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_0 134
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_1 135
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_2 136
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_3 137
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_4 138
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_5 139
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_6 140
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_7 141
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_8 142
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_9 143
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_10 144
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_11 145
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_12 146
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_13 147
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_14 148
|
|
#define SMV_TEX02PM_GPCTPCA1_MUXED_BUS_15 149
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_0 150
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_1 151
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_2 152
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_3 153
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_4 154
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_5 155
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_6 156
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_7 157
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_8 158
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_9 159
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_10 160
|
|
#define MPC2PM_GPCTPCA1_MUXED_BUS_11 161
|
|
#define MPC2PM_GPCTPCA1_SCG_MODE 162
|
|
#define MPC2PM_GPCTPCA1_SCG_MODE_SWITCH 163
|
|
|
|
#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_ZERO 0
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_ONE 1
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMGPC_GPCTPCA0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_0 22
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_1 23
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_2 24
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_3 25
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_4 26
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_5 27
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_6 28
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_7 29
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_8 30
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_9 31
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_10 32
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_11 33
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_12 34
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_13 35
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_14 36
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#define SMV_CORE2PM_GPCTPCA0_MUXED_BUS_15 37
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_0 38
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_1 39
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_2 40
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_3 41
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_4 42
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_5 43
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_6 44
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_7 45
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_8 46
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_9 47
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_10 48
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_11 49
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_12 50
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_13 51
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_14 52
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#define SMV_CORE2PM_GPCTPCA0_SCTL_PM_MUX_AGGREGATED_15 53
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_0 54
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_1 55
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_2 56
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_3 57
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_4 58
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_5 59
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_6 60
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_7 61
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_8 62
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_9 63
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_10 64
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_11 65
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_12 66
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_13 67
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_14 68
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#define SMV_SCTL02PM_GPCTPCA0_MUXED_BUS_15 69
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_0 70
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_1 71
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_2 72
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_3 73
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_4 74
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_5 75
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_6 76
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_7 77
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_8 78
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_9 79
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_10 80
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_11 81
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_12 82
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_13 83
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_14 84
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#define SMV_SCTL12PM_GPCTPCA0_MUXED_BUS_15 85
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_0 86
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_1 87
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_2 88
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_3 89
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_4 90
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_5 91
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_6 92
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_7 93
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_8 94
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_9 95
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_10 96
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_11 97
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_12 98
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_13 99
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_14 100
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#define SMV_SCTL22PM_GPCTPCA0_MUXED_BUS_15 101
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_0 102
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_1 103
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_2 104
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_3 105
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_4 106
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_5 107
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_6 108
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_7 109
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_8 110
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_9 111
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_10 112
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_11 113
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_12 114
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_13 115
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_14 116
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#define SMV_SCTL32PM_GPCTPCA0_MUXED_BUS_15 117
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_0 118
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_1 119
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_2 120
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_3 121
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_4 122
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_5 123
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_6 124
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_7 125
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_8 126
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_9 127
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_10 128
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_11 129
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_12 130
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_13 131
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_14 132
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#define SMV_MIO02PM_GPCTPCA0_MUXED_BUS_15 133
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_0 134
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_1 135
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_2 136
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_3 137
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_4 138
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_5 139
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_6 140
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_7 141
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_8 142
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_9 143
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_10 144
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_11 145
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_12 146
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_13 147
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_14 148
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#define SMV_TEX02PM_GPCTPCA0_MUXED_BUS_15 149
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#define MPC2PM_GPCTPCA0_MUXED_BUS_0 150
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#define MPC2PM_GPCTPCA0_MUXED_BUS_1 151
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#define MPC2PM_GPCTPCA0_MUXED_BUS_2 152
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#define MPC2PM_GPCTPCA0_MUXED_BUS_3 153
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#define MPC2PM_GPCTPCA0_MUXED_BUS_4 154
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#define MPC2PM_GPCTPCA0_MUXED_BUS_5 155
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#define MPC2PM_GPCTPCA0_MUXED_BUS_6 156
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#define MPC2PM_GPCTPCA0_MUXED_BUS_7 157
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#define MPC2PM_GPCTPCA0_MUXED_BUS_8 158
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#define MPC2PM_GPCTPCA0_MUXED_BUS_9 159
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#define MPC2PM_GPCTPCA0_MUXED_BUS_10 160
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#define MPC2PM_GPCTPCA0_MUXED_BUS_11 161
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#define MPC2PM_GPCTPCA0_SCG_MODE 162
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#define MPC2PM_GPCTPCA0_SCG_MODE_SWITCH 163
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_ZERO 0
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_ONE 1
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMGPC_GPC1_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define WWDX2PM_PPC0_MUXED_BUS_0 22
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#define WWDX2PM_PPC0_MUXED_BUS_1 23
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#define WWDX2PM_PPC0_MUXED_BUS_2 24
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#define WWDX2PM_PPC0_MUXED_BUS_3 25
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#define WWDX2PM_PPC0_MUXED_BUS_4 26
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#define WWDX2PM_PPC0_MUXED_BUS_5 27
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#define WWDX2PM_PPC0_MUXED_BUS_6 28
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#define WWDX2PM_PPC0_MUXED_BUS_7 29
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#define WWDX2PM_PPC0_MUXED_BUS_8 30
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#define WWDX2PM_PPC0_MUXED_BUS_9 31
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#define WWDX2PM_PPC0_MUXED_BUS_10 32
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#define WWDX2PM_PPC0_MUXED_BUS_11 33
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#define WWDX2PM_PPC0_MUXED_BUS_12 34
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#define WWDX2PM_PPC0_MUXED_BUS_13 35
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#define WWDX2PM_PPC0_MUXED_BUS_14 36
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#define GPCCS2PM_GPC_MUXED_BUS_0 37
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#define GPCCS2PM_GPC_MUXED_BUS_1 38
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#define GPCCS2PM_GPC_MUXED_BUS_2 39
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#define GPCCS2PM_GPC_MUXED_BUS_3 40
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#define GPCCS2PM_GPC_MUXED_BUS_4 41
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#define GPCCS2PM_GPC_MUXED_BUS_5 42
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#define GPCCS2PM_GPC_MUXED_BUS_6 43
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#define GPCCS2PM_GPC_MUXED_BUS_7 44
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#define GPMREPORT2PM_GPC_MUXED_BUS_0 45
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#define GPMREPORT2PM_GPC_MUXED_BUS_1 46
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#define GPMREPORT2PM_GPC_MUXED_BUS_2 47
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#define GPMREPORT2PM_GPC_MUXED_BUS_3 48
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#define GPCCS2PM_FALCON_SOFTPM_OUT_BUS_0 49
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#define GPCCS2PM_FALCON_SOFTPM_OUT_BUS_1 50
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#define GPCCS_FALCON2PM_START_TRIGGER 51
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#define GPCCS_FALCON2PM_STOP_TRIGGER 52
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#define GPCCS2PM_FALCON_STALL_OUT_BUS 53
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#define WWDX2PM_PPC1_MUXED_BUS_0 54
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|
#define WWDX2PM_PPC1_MUXED_BUS_1 55
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#define WWDX2PM_PPC1_MUXED_BUS_2 56
|
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#define WWDX2PM_PPC1_MUXED_BUS_3 57
|
|
#define WWDX2PM_PPC1_MUXED_BUS_4 58
|
|
#define WWDX2PM_PPC1_MUXED_BUS_5 59
|
|
#define WWDX2PM_PPC1_MUXED_BUS_6 60
|
|
#define WWDX2PM_PPC1_MUXED_BUS_7 61
|
|
#define WWDX2PM_PPC1_MUXED_BUS_8 62
|
|
#define WWDX2PM_PPC1_MUXED_BUS_9 63
|
|
#define WWDX2PM_PPC1_MUXED_BUS_10 64
|
|
#define WWDX2PM_PPC1_MUXED_BUS_11 65
|
|
#define WWDX2PM_PPC1_MUXED_BUS_12 66
|
|
#define WWDX2PM_PPC1_MUXED_BUS_13 67
|
|
#define WWDX2PM_PPC1_MUXED_BUS_14 68
|
|
#define GPC_PRI_HUB2PM_GPC_MUXED_BUS_0 69
|
|
#define GPC_PRI_HUB2PM_GPC_MUXED_BUS_1 70
|
|
#define GPC_PRI_HUB2PM_GPC_MUXED_BUS_2 71
|
|
#define GPC_PRI_HUB2PM_GPC_MUXED_BUS_3 72
|
|
#define GPC_PRI_HUB2PM_GPC_MUXED_BUS_4 73
|
|
#define GPC_PRI_HUB2PM_GPC_MUXED_BUS_5 74
|
|
#define GPC_PRI_HUB2PM_GPC_MUXED_BUS_6 75
|
|
#define GPC_PRI_HUB2PM_GPC_MUXED_BUS_7 76
|
|
#define GPCCS2PM_FALCON_IDLE_OUT_BUS 77
|
|
#define GPMPD2PM_GPC_MUXED_BUS_0 78
|
|
#define GPMPD2PM_GPC_MUXED_BUS_1 79
|
|
#define GPMPD2PM_GPC_MUXED_BUS_2 80
|
|
#define GPMPD2PM_GPC_MUXED_BUS_3 81
|
|
#define GPMPD2PM_GPC_MUXED_BUS_4 82
|
|
#define GPMPD2PM_GPC_MUXED_BUS_5 83
|
|
#define GPMPD2PM_GPC_MUXED_BUS_6 84
|
|
#define GPMPD2PM_GPC_MUXED_BUS_7 85
|
|
#define WWDX2PM_PPC2_MUXED_BUS_0 86
|
|
#define WWDX2PM_PPC2_MUXED_BUS_1 87
|
|
#define WWDX2PM_PPC2_MUXED_BUS_2 88
|
|
#define WWDX2PM_PPC2_MUXED_BUS_3 89
|
|
#define WWDX2PM_PPC2_MUXED_BUS_4 90
|
|
#define WWDX2PM_PPC2_MUXED_BUS_5 91
|
|
#define WWDX2PM_PPC2_MUXED_BUS_6 92
|
|
#define WWDX2PM_PPC2_MUXED_BUS_7 93
|
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#define WWDX2PM_PPC2_MUXED_BUS_8 94
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#define WWDX2PM_PPC2_MUXED_BUS_9 95
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#define WWDX2PM_PPC2_MUXED_BUS_10 96
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#define WWDX2PM_PPC2_MUXED_BUS_11 97
|
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#define WWDX2PM_PPC2_MUXED_BUS_12 98
|
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#define WWDX2PM_PPC2_MUXED_BUS_13 99
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#define WWDX2PM_PPC2_MUXED_BUS_14 100
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#define WDXPS2PM_GPC_MUXED_BUS_0 101
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#define WDXPS2PM_GPC_MUXED_BUS_1 102
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#define WDXPS2PM_GPC_MUXED_BUS_2 103
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#define WDXPS2PM_GPC_MUXED_BUS_3 104
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#define WDXPS2PM_GPC_MUXED_BUS_4 105
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#define WDXPS2PM_GPC_MUXED_BUS_5 106
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#define WDXPS2PM_GPC_MUXED_BUS_6 107
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#define GPMSD2PM_GPC_MUXED_BUS_0 108
|
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#define GPMSD2PM_GPC_MUXED_BUS_1 109
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#define GPMSD2PM_GPC_MUXED_BUS_2 110
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#define GPMSD2PM_GPC_MUXED_BUS_3 111
|
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#define GPMSD2PM_GPC_MUXED_BUS_4 112
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#define GPMSD2PM_GPC_MUXED_BUS_5 113
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#define GCC2PM_GPC1_CLAMP_PERFMONOUT 114
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#define GPMREPORT2PM_GPC1_CLAMP_PERFMONOUT 115
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#define GPMSD2PM_GPC1_CLAMP_PERFMONOUT 116
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#define PPC0_PES2PM_GPC1_CLAMP_PERFMONOUT 117
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#define CBMGR2PM_PPC0_MUXED_BUS_0 118
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#define CBMGR2PM_PPC0_MUXED_BUS_1 119
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#define CBMGR2PM_PPC0_MUXED_BUS_2 120
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#define CBMGR2PM_PPC0_MUXED_BUS_3 121
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#define CBMGR2PM_PPC0_MUXED_BUS_4 122
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#define CBMGR2PM_PPC0_MUXED_BUS_5 123
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#define CBMGR2PM_PPC0_MUXED_BUS_6 124
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#define CBMGR2PM_PPC0_MUXED_BUS_7 125
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#define CBMGR2PM_PPC0_MUXED_BUS_8 126
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#define CBMGR2PM_PPC0_MUXED_BUS_9 127
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#define CBMGR2PM_PPC0_MUXED_BUS_10 128
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|
#define CBMGR2PM_PPC0_MUXED_BUS_11 129
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|
#define CBMGR2PM_PPC0_MUXED_BUS_12 130
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|
#define CBMGR2PM_PPC0_MUXED_BUS_13 131
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#define GPCMMU2PM_GPC_MUXED_BUS_0 132
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#define GPCMMU2PM_GPC_MUXED_BUS_1 133
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#define GPCMMU2PM_GPC_MUXED_BUS_2 134
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#define GPCMMU2PM_GPC_MUXED_BUS_3 135
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#define GPCMMU2PM_GPC_MUXED_BUS_4 136
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#define GPCMMU2PM_GPC_MUXED_BUS_5 137
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#define GCC2PM_GPC_MUXED_BUS_0 138
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#define GCC2PM_GPC_MUXED_BUS_1 139
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|
#define GCC2PM_GPC_MUXED_BUS_2 140
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#define GCC2PM_GPC_MUXED_BUS_3 141
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|
#define GCC2PM_GPC_MUXED_BUS_4 142
|
|
#define GCC2PM_GPC_MUXED_BUS_5 143
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|
#define GCC2PM_GPC_MUXED_BUS_6 144
|
|
#define GCC2PM_GPC_MUXED_BUS_7 145
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|
#define GCC2PM_GPC_MUXED_BUS_8 146
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|
#define GCC2PM_GPC_MUXED_BUS_9 147
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|
#define GCC2PM_GPC_MUXED_BUS_10 148
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|
#define GCC2PM_GPC_MUXED_BUS_11 149
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|
#define CBMGR2PM_PPC1_MUXED_BUS_0 150
|
|
#define CBMGR2PM_PPC1_MUXED_BUS_1 151
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|
#define CBMGR2PM_PPC1_MUXED_BUS_2 152
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|
#define CBMGR2PM_PPC1_MUXED_BUS_3 153
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|
#define CBMGR2PM_PPC1_MUXED_BUS_4 154
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|
#define CBMGR2PM_PPC1_MUXED_BUS_5 155
|
|
#define CBMGR2PM_PPC1_MUXED_BUS_6 156
|
|
#define CBMGR2PM_PPC1_MUXED_BUS_7 157
|
|
#define CBMGR2PM_PPC1_MUXED_BUS_8 158
|
|
#define CBMGR2PM_PPC1_MUXED_BUS_9 159
|
|
#define CBMGR2PM_PPC1_MUXED_BUS_10 160
|
|
#define CBMGR2PM_PPC1_MUXED_BUS_11 161
|
|
#define CBMGR2PM_PPC1_MUXED_BUS_12 162
|
|
#define CBMGR2PM_PPC1_MUXED_BUS_13 163
|
|
#define PPC1_PES2PM_GPC1_CLAMP_PERFMONOUT 164
|
|
#define PPC2_PES2PM_GPC1_CLAMP_PERFMONOUT 165
|
|
#define WDXPS2PM_GPC1_CLAMP_PERFMONOUT 166
|
|
#define PPC0_WWDX2PM_GPC1_CLAMP_PERFMONOUT 167
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_0 168
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_1 169
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_2 170
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_3 171
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_4 172
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_5 173
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_6 174
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_7 175
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_8 176
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_9 177
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_10 178
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_11 179
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_12 180
|
|
#define CBMGR2PM_PPC2_MUXED_BUS_13 181
|
|
#define PES2PM_PPC0_MUXED_BUS_0 182
|
|
#define PES2PM_PPC0_MUXED_BUS_1 183
|
|
#define PES2PM_PPC0_MUXED_BUS_2 184
|
|
#define PES2PM_PPC0_MUXED_BUS_3 185
|
|
#define PES2PM_PPC0_MUXED_BUS_4 186
|
|
#define PES2PM_PPC0_MUXED_BUS_5 187
|
|
#define PES2PM_PPC0_MUXED_BUS_6 188
|
|
#define PES2PM_PPC0_MUXED_BUS_7 189
|
|
#define PES2PM_PPC0_MUXED_BUS_8 190
|
|
#define PES2PM_PPC0_MUXED_BUS_9 191
|
|
#define PES2PM_PPC0_MUXED_BUS_10 192
|
|
#define PES2PM_PPC0_MUXED_BUS_11 193
|
|
#define PES2PM_PPC2_MUXED_BUS_0 194
|
|
#define PES2PM_PPC2_MUXED_BUS_1 195
|
|
#define PES2PM_PPC2_MUXED_BUS_2 196
|
|
#define PES2PM_PPC2_MUXED_BUS_3 197
|
|
#define PES2PM_PPC2_MUXED_BUS_4 198
|
|
#define PES2PM_PPC2_MUXED_BUS_5 199
|
|
#define PES2PM_PPC2_MUXED_BUS_6 200
|
|
#define PES2PM_PPC2_MUXED_BUS_7 201
|
|
#define PES2PM_PPC2_MUXED_BUS_8 202
|
|
#define PES2PM_PPC2_MUXED_BUS_9 203
|
|
#define PES2PM_PPC2_MUXED_BUS_10 204
|
|
#define PES2PM_PPC2_MUXED_BUS_11 205
|
|
#define PPC1_WWDX2PM_GPC1_CLAMP_PERFMONOUT 206
|
|
#define PPC2_WWDX2PM_GPC1_CLAMP_PERFMONOUT 207
|
|
#define PPC0_CBMGR2PM_GPC1_CLAMP_PERFMONOUT 208
|
|
#define PPC1_CBMGR2PM_GPC1_CLAMP_PERFMONOUT 209
|
|
#define PPC2_CBMGR2PM_GPC1_CLAMP_PERFMONOUT 210
|
|
#define GPCMMU_MUX02PM_GPC1_CLAMP_PERFMONOUT 211
|
|
#define GPMPD2PM_GPC1_CLAMP_PERFMONOUT 212
|
|
#define PES2PM_PPC1_MUXED_BUS_0 213
|
|
#define PES2PM_PPC1_MUXED_BUS_1 214
|
|
#define PES2PM_PPC1_MUXED_BUS_2 215
|
|
#define PES2PM_PPC1_MUXED_BUS_3 216
|
|
#define PES2PM_PPC1_MUXED_BUS_4 217
|
|
#define PES2PM_PPC1_MUXED_BUS_5 218
|
|
#define PES2PM_PPC1_MUXED_BUS_6 219
|
|
#define PES2PM_PPC1_MUXED_BUS_7 220
|
|
#define PES2PM_PPC1_MUXED_BUS_8 221
|
|
#define PES2PM_PPC1_MUXED_BUS_9 222
|
|
#define PES2PM_PPC1_MUXED_BUS_10 223
|
|
#define PES2PM_PPC1_MUXED_BUS_11 224
|
|
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMGPC_GPC0_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define SWDX2PM_GPC_MUXED_BUS_0 22
|
|
#define SWDX2PM_GPC_MUXED_BUS_1 23
|
|
#define SWDX2PM_GPC_MUXED_BUS_2 24
|
|
#define SWDX2PM_GPC_MUXED_BUS_3 25
|
|
#define SWDX2PM_GPC_MUXED_BUS_4 26
|
|
#define SWDX2PM_GPC_MUXED_BUS_5 27
|
|
#define SWDX2PM_GPC_MUXED_BUS_6 28
|
|
#define SWDX2PM_GPC_MUXED_BUS_7 29
|
|
#define SWDX2PM_GPC_MUXED_BUS_8 30
|
|
#define SWDX2PM_GPC_MUXED_BUS_9 31
|
|
#define GNIC_MUX02PM_GPC_MUXED_BUS_0 32
|
|
#define GNIC_MUX02PM_GPC_MUXED_BUS_1 33
|
|
#define GNIC_MUX02PM_GPC_MUXED_BUS_2 34
|
|
#define GNIC_MUX02PM_GPC_MUXED_BUS_3 35
|
|
#define GNIC_MUX02PM_GPC_MUXED_BUS_4 36
|
|
#define GNIC_MUX02PM_GPC_MUXED_BUS_5 37
|
|
#define GNIC_MUX02PM_GPC_MUXED_BUS_6 38
|
|
#define GNIC_MUX02PM_GPC_MUXED_BUS_7 39
|
|
#define PROP2PM_GPC_MUXED_BUS2_0 40
|
|
#define PROP2PM_GPC_MUXED_BUS2_1 41
|
|
#define PROP2PM_GPC_MUXED_BUS2_2 42
|
|
#define PROP2PM_GPC_MUXED_BUS2_3 43
|
|
#define PROP2PM_GPC_MUXED_BUS2_4 44
|
|
#define PROP2PM_GPC_MUXED_BUS2_5 45
|
|
#define PROP2PM_GPC_MUXED_BUS2_6 46
|
|
#define PROP2PM_GPC_MUXED_BUS2_7 47
|
|
#define GPCMMU2PM_GPC_MUXED_BUS_MUX1_0 48
|
|
#define GPCMMU2PM_GPC_MUXED_BUS_MUX1_1 49
|
|
#define GPCMMU2PM_GPC_MUXED_BUS_MUX1_2 50
|
|
#define GPCMMU2PM_GPC_MUXED_BUS_MUX1_3 51
|
|
#define GPCMMU2PM_GPC_MUXED_BUS_MUX1_4 52
|
|
#define GPCMMU2PM_GPC_MUXED_BUS_MUX1_5 53
|
|
#define GNIC_MUX12PM_GPC_MUXED_BUS_0 54
|
|
#define GNIC_MUX12PM_GPC_MUXED_BUS_1 55
|
|
#define GNIC_MUX12PM_GPC_MUXED_BUS_2 56
|
|
#define GNIC_MUX12PM_GPC_MUXED_BUS_3 57
|
|
#define GNIC_MUX12PM_GPC_MUXED_BUS_4 58
|
|
#define GNIC_MUX12PM_GPC_MUXED_BUS_5 59
|
|
#define GNIC_MUX12PM_GPC_MUXED_BUS_6 60
|
|
#define GNIC_MUX12PM_GPC_MUXED_BUS_7 61
|
|
#define PROP2PM_GPC_MUXED_BUS_0 62
|
|
#define PROP2PM_GPC_MUXED_BUS_1 63
|
|
#define PROP2PM_GPC_MUXED_BUS_2 64
|
|
#define PROP2PM_GPC_MUXED_BUS_3 65
|
|
#define PROP2PM_GPC_MUXED_BUS_4 66
|
|
#define PROP2PM_GPC_MUXED_BUS_5 67
|
|
#define PROP2PM_GPC_MUXED_BUS_6 68
|
|
#define PROP2PM_GPC_MUXED_BUS_7 69
|
|
#define ZCULL2PM_GPC_MUXED_BUS_0 70
|
|
#define ZCULL2PM_GPC_MUXED_BUS_1 71
|
|
#define ZCULL2PM_GPC_MUXED_BUS_2 72
|
|
#define ZCULL2PM_GPC_MUXED_BUS_3 73
|
|
#define ZCULL2PM_GPC_MUXED_BUS_4 74
|
|
#define ZCULL2PM_GPC_MUXED_BUS_5 75
|
|
#define SETUP2PM_GPC_MUXED_BUS_0 76
|
|
#define SETUP2PM_GPC_MUXED_BUS_1 77
|
|
#define SETUP2PM_GPC_MUXED_BUS_2 78
|
|
#define SETUP2PM_GPC_MUXED_BUS_3 79
|
|
#define SETUP2PM_GPC_MUXED_BUS_4 80
|
|
#define WIDCLIP2PM_GPC_MUXED_BUS_0 81
|
|
#define WIDCLIP2PM_GPC_MUXED_BUS_1 82
|
|
#define WIDCLIP2PM_GPC_MUXED_BUS_2 83
|
|
#define WIDCLIP2PM_GPC_MUXED_BUS_3 84
|
|
#define PMMGPC_ROUTER2PM_CS2PMM_PRI_VLD 85
|
|
#define CRSTR2PM_GPC_MUXED_BUS_0 86
|
|
#define CRSTR2PM_GPC_MUXED_BUS_1 87
|
|
#define CRSTR2PM_GPC_MUXED_BUS_2 88
|
|
#define CRSTR2PM_GPC_MUXED_BUS_3 89
|
|
#define FRSTR2PM_GPC_MUXED_BUS_0 90
|
|
#define FRSTR2PM_GPC_MUXED_BUS_1 91
|
|
#define FRSTR2PM_GPC_MUXED_BUS_2 92
|
|
#define FRSTR2PM_GPC_MUXED_BUS_3 93
|
|
#define CAU02PM_TPC0_MUXED_BUS_0 94
|
|
#define CAU02PM_TPC0_MUXED_BUS_1 95
|
|
#define CAU02PM_TPC0_MUXED_BUS_2 96
|
|
#define CAU02PM_TPC0_MUXED_BUS_3 97
|
|
#define CAU02PM_TPC1_MUXED_BUS_0 98
|
|
#define CAU02PM_TPC1_MUXED_BUS_1 99
|
|
#define CAU02PM_TPC1_MUXED_BUS_2 100
|
|
#define CAU02PM_TPC1_MUXED_BUS_3 101
|
|
#define CAU02PM_TPC2_MUXED_BUS_0 102
|
|
#define CAU02PM_TPC2_MUXED_BUS_1 103
|
|
#define CAU02PM_TPC2_MUXED_BUS_2 104
|
|
#define CAU02PM_TPC2_MUXED_BUS_3 105
|
|
#define CAU02PM_TPC3_MUXED_BUS_0 106
|
|
#define CAU02PM_TPC3_MUXED_BUS_1 107
|
|
#define CAU02PM_TPC3_MUXED_BUS_2 108
|
|
#define CAU02PM_TPC3_MUXED_BUS_3 109
|
|
#define CAU02PM_TPC4_MUXED_BUS_0 110
|
|
#define CAU02PM_TPC4_MUXED_BUS_1 111
|
|
#define CAU02PM_TPC4_MUXED_BUS_2 112
|
|
#define CAU02PM_TPC4_MUXED_BUS_3 113
|
|
#define CAU02PM_TPC5_MUXED_BUS_0 114
|
|
#define CAU02PM_TPC5_MUXED_BUS_1 115
|
|
#define CAU02PM_TPC5_MUXED_BUS_2 116
|
|
#define CAU02PM_TPC5_MUXED_BUS_3 117
|
|
#define RASTERARB2PM_GPC_MUXED_BUS_0 118
|
|
#define RASTERARB2PM_GPC_MUXED_BUS_1 119
|
|
#define RASTERARB2PM_GPC_MUXED_BUS_2 120
|
|
#define RASTERARB2PM_GPC_MUXED_BUS_3 121
|
|
#define TC2PM_GPC_MUXED_BUS_0 122
|
|
#define TC2PM_GPC_MUXED_BUS_1 123
|
|
#define TC2PM_GPC_MUXED_BUS_2 124
|
|
#define TC2PM_GPC_MUXED_BUS_3 125
|
|
#define PMMGPC_ROUTER2PM_PMM2CD_COUNT_PRI_PVLD 126
|
|
#define PMMGPC_ROUTER2PM_PMM2CD_COUNT_PRI_PRDY 127
|
|
#define PMMGPC_ROUTER2PM_PMM2PMA_REQUEST_SENT 128
|
|
#define PMMGPC_ROUTER2PM_PMM2PMA_GRANT_RECEIVED 129
|
|
#define PMMGPC_ROUTER2PM_ROUTER_FIFO_EMPTY 130
|
|
#define PMMGPC_ROUTER2PM_ROUTER_FIFO_BLOCKING 131
|
|
#define PMMGPC_ROUTER2PM_ROUTER_PRI_BACKPRESSURE 132
|
|
#define PMMGPC_ROUTER2PM_ROUTER_HS_RECORD_SENT 133
|
|
#define PMMGPC_ROUTER2PM_ROUTER_HS_CREDIT_RECEIVED 134
|
|
#define PMMGPC_ROUTER2PM_ROUTER_HS_NO_CREDITS_AVAILABLE 135
|
|
#define PMMGPC_ROUTER2PM_ROUTER_HS_BLOCKING_INTERFACE 136
|
|
#define PMMGPC_ROUTER2PM_ROUTER_HS_BLOCKING_PMA_CREDITS 137
|
|
#define PMMGPC_ROUTER2PM_ROUTER_HS_CREDITS_OUTSTANDING 138
|
|
#define PMMGPC_ROUTER2PM_ROUTER_RECORD_READY 139
|
|
#define GNIC_MUX02PM_GPC0_CLAMP_PERFMONOUT 140
|
|
#define GNIC_MUX12PM_GPC0_CLAMP_PERFMONOUT 141
|
|
#define GPCMMU_MUX12PM_GPC0_CLAMP_PERFMONOUT 142
|
|
#define CRSTR2PM_GPC0_CLAMP_PERFMONOUT 143
|
|
#define TPC0_CAU02PM_GPC0_CLAMP_PERFMONOUT 144
|
|
#define TPC1_CAU02PM_GPC0_CLAMP_PERFMONOUT 145
|
|
#define TPC2_CAU02PM_GPC0_CLAMP_PERFMONOUT 146
|
|
#define TPC3_CAU02PM_GPC0_CLAMP_PERFMONOUT 147
|
|
#define TPC4_CAU02PM_GPC0_CLAMP_PERFMONOUT 148
|
|
#define TPC5_CAU02PM_GPC0_CLAMP_PERFMONOUT 149
|
|
#define PROP2PM_GPC0_CLAMP_PERFMONOUT 150
|
|
#define RASTERARB2PM_GPC0_CLAMP_PERFMONOUT 151
|
|
#define SETUP2PM_GPC0_CLAMP_PERFMONOUT 152
|
|
#define FRSTR2PM_GPC0_CLAMP_PERFMONOUT 153
|
|
#define SWDX2PM_GPC0_CLAMP_PERFMONOUT 154
|
|
#define TC2PM_GPC0_CLAMP_PERFMONOUT 155
|
|
#define WIDCLIP2PM_GPC0_CLAMP_PERFMONOUT 156
|
|
#define ZCULL2PM_GPC0_CLAMP_PERFMONOUT 157
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_ZERO 0
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_ONE 1
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_XBAR0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define AFS2PMREQ_MUXED_BUS0_0 22
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#define AFS2PMREQ_MUXED_BUS0_1 23
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#define AFS2PMREQ_MUXED_BUS0_2 24
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#define AFS2PMREQ_MUXED_BUS0_3 25
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#define AFS2PMREQ_MUXED_BUS0_4 26
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#define AFS2PMREQ_MUXED_BUS0_5 27
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#define AFS2PMREQ_MUXED_BUS0_6 28
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#define AFS2PMREQ_MUXED_BUS0_7 29
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#define AFS2PMREQ_MUXED_BUS0_8 30
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#define AFS2PMREQ_MUXED_BUS0_9 31
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#define AFS2PMREQ_MUXED_BUS0_10 32
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#define AFS2PMREQ_MUXED_BUS0_11 33
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#define AFS2PMREQ_MUXED_BUS0_12 34
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#define AFS2PMREQ_MUXED_BUS0_13 35
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#define AFS2PMREQ_MUXED_BUS0_14 36
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#define AFS2PMREQ_MUXED_BUS0_15 37
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#define AFS2PMRSP_MUXED_BUS0_GPU_0 38
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#define AFS2PMRSP_MUXED_BUS0_GPU_1 39
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#define AFS2PMRSP_MUXED_BUS0_GPU_2 40
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#define AFS2PMRSP_MUXED_BUS0_GPU_3 41
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#define AFS2PMRSP_MUXED_BUS0_GPU_4 42
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#define AFS2PMRSP_MUXED_BUS0_GPU_5 43
|
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#define AFS2PMRSP_MUXED_BUS0_GPU_6 44
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#define AFS2PMRSP_MUXED_BUS0_GPU_7 45
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#define AFS2PMRSP_MUXED_BUS0_GPU_8 46
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#define AFS2PMRSP_MUXED_BUS0_GPU_9 47
|
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#define AFS2PMRSP_MUXED_BUS0_GPU_10 48
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#define AFS2PMRSP_MUXED_BUS0_GPU_11 49
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#define AFS2PMRSP_MUXED_BUS0_GPU_12 50
|
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#define AFS2PMRSP_MUXED_BUS0_GPU_13 51
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#define AFS2PMRSP_MUXED_BUS0_GPU_14 52
|
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#define AFS2PMRSP_MUXED_BUS0_GPU_15 53
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|
#define WXBAR_CSXXI_MUXED_BUS_0 54
|
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#define WXBAR_CSXXI_MUXED_BUS_1 55
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|
#define WXBAR_CSXXI_MUXED_BUS_2 56
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#define WXBAR_CSXXI_MUXED_BUS_3 57
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#define WXBAR_CSXXI_MUXED_BUS_4 58
|
|
#define WXBAR_CSXXI_MUXED_BUS_5 59
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|
#define WXBAR_CSXXI_MUXED_BUS_6 60
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|
#define WXBAR_CSXXI_MUXED_BUS_7 61
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|
#define WXBAR_CSXSU_MUXED_BUS_0 62
|
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#define WXBAR_CSXSU_MUXED_BUS_1 63
|
|
#define WXBAR_CSXSU_MUXED_BUS_2 64
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|
#define WXBAR_CSXSU_MUXED_BUS_3 65
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#define WXBAR_CSXSU_MUXED_BUS_4 66
|
|
#define WXBAR_CSXSU_MUXED_BUS_5 67
|
|
#define WXBAR_CSXSU_MUXED_BUS_6 68
|
|
#define WXBAR_CSXSU_MUXED_BUS_7 69
|
|
#define CXBAR_CQ_XXI_MUXED_BUS_0 70
|
|
#define CXBAR_CQ_XXI_MUXED_BUS_1 71
|
|
#define CXBAR_CQ_XXI_MUXED_BUS_2 72
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|
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_ZERO 0
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_ONE 1
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_PMA_TRIGGER 2
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_T_PULSE 3
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_PMMPRICONTROL0 4
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_PMMPRICONTROL1 5
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_PMMPRICONTROL2 6
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_PMMPRICONTROL3 7
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_VWTRIGGER1 9
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|
#define NV_PERF_PMMSYS_SYS2_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
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#define NV_PERF_PMMSYS_SYS2_SIGVAL_PMM_CONTEXT_FREEZE 21
|
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#define PMA2PM_MUXED_BUS_0 22
|
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#define PMA2PM_MUXED_BUS_1 23
|
|
#define PMA2PM_MUXED_BUS_2 24
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#define PMA2PM_MUXED_BUS_3 25
|
|
#define PMA2PM_MUXED_BUS_4 26
|
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#define PMA2PM_MUXED_BUS_5 27
|
|
#define PMA2PM_MUXED_BUS_6 28
|
|
#define PMA2PM_MUXED_BUS_7 29
|
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#define PMA2PM_MUXED_BUS_8 30
|
|
#define PMA2PM_MUXED_BUS_9 31
|
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#define SYS_PRI_HUB2PM_SYS_MUXED_BUS_0 32
|
|
#define SYS_PRI_HUB2PM_SYS_MUXED_BUS_1 33
|
|
#define SYS_PRI_HUB2PM_SYS_MUXED_BUS_2 34
|
|
#define SYS_PRI_HUB2PM_SYS_MUXED_BUS_3 35
|
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#define SYS_PRI_HUB2PM_SYS_MUXED_BUS_4 36
|
|
#define SYS_PRI_HUB2PM_SYS_MUXED_BUS_5 37
|
|
#define SYS_PRI_HUB2PM_SYS_MUXED_BUS_6 38
|
|
#define SYS_PRI_HUB2PM_SYS_MUXED_BUS_7 39
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS0_0 40
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS0_1 41
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS0_2 42
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|
#define HOST2PM_ESC0_PM_MUXED_BUS0_3 43
|
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#define HOST2PM_ESC0_PM_MUXED_BUS1_0 44
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS1_1 45
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS1_2 46
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS1_3 47
|
|
#define CE52PM_MUXED_BUS_0 48
|
|
#define CE52PM_MUXED_BUS_1 49
|
|
#define CE52PM_MUXED_BUS_2 50
|
|
#define CE52PM_MUXED_BUS_3 51
|
|
#define CESHIM2PM_START_TRIGGER 52
|
|
#define CESHIM2PM_STOP_TRIGGER 53
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS2_0 54
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS2_1 55
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS2_2 56
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|
#define HOST2PM_ESC0_PM_MUXED_BUS2_3 57
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS3_0 58
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS3_1 59
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS3_2 60
|
|
#define HOST2PM_ESC0_PM_MUXED_BUS3_3 61
|
|
#define HOST2PM_SYS_PM_MUXED_BUS_0 62
|
|
#define HOST2PM_SYS_PM_MUXED_BUS_1 63
|
|
#define HOST2PM_SYS_PM_MUXED_BUS_2 64
|
|
#define HOST2PM_SYS_PM_MUXED_BUS_3 65
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS0_0 66
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS0_1 67
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS0_2 68
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS0_3 69
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS1_0 70
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS1_1 71
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS1_2 72
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS1_3 73
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS2_0 74
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS2_1 75
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS2_2 76
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS2_3 77
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS3_0 78
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS3_1 79
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS3_2 80
|
|
#define HOST2PM_ESC1_PM_MUXED_BUS3_3 81
|
|
#define CESHIM2PM_MUXED_BUS_0 82
|
|
#define CESHIM2PM_MUXED_BUS_1 83
|
|
#define CESHIM2PM_MUXED_BUS_2 84
|
|
#define CESHIM2PM_MUXED_BUS_3 85
|
|
#define CE42PM_MUXED_BUS_0 86
|
|
#define CE42PM_MUXED_BUS_1 87
|
|
#define CE42PM_MUXED_BUS_2 88
|
|
#define CE42PM_MUXED_BUS_3 89
|
|
#define CE42PM_START_TRIGGER 90
|
|
#define CE42PM_STOP_TRIGGER 91
|
|
#define CE52PM_START_TRIGGER 92
|
|
#define CE52PM_STOP_TRIGGER 93
|
|
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMSYS_SYS1_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS0_0 22
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS0_1 23
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS0_2 24
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS0_3 25
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS0_4 26
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS0_5 27
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS0_6 28
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS0_7 29
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS1_0 30
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS1_1 31
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS1_2 32
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS1_3 33
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS1_4 34
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS1_5 35
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS1_6 36
|
|
#define HSHUB12PM_IG_PM_MUXED_BUS1_7 37
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS0_0 38
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS0_1 39
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS0_2 40
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS0_3 41
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS0_4 42
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS0_5 43
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS0_6 44
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS0_7 45
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS1_0 46
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS1_1 47
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS1_2 48
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS1_3 49
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS1_4 50
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS1_5 51
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS1_6 52
|
|
#define HSHUB12PM_EG_PM_MUXED_BUS1_7 53
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS0_0 54
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS0_1 55
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS0_2 56
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS0_3 57
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS0_4 58
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS0_5 59
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS0_6 60
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS0_7 61
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS1_0 62
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS1_1 63
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS1_2 64
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS1_3 65
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS1_4 66
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS1_5 67
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS1_6 68
|
|
#define HSHUB12PM_RR_PM_MUXED_BUS1_7 69
|
|
#define PD2PM_SYS_PD_PERF_0 70
|
|
#define PD2PM_SYS_PD_PERF_1 71
|
|
#define PD2PM_SYS_PD_PERF_2 72
|
|
#define PD2PM_SYS_PD_PERF_3 73
|
|
#define PD2PM_SYS_PD_PERF_4 74
|
|
#define PD2PM_SYS_PD_PERF_5 75
|
|
#define PD2PM_SYS_PD_PERF_6 76
|
|
#define PD2PM_SYS_PD_PERF_7 77
|
|
#define RSTR2D2PM_GPC_MUXED_BUS_0 78
|
|
#define RSTR2D2PM_GPC_MUXED_BUS_1 79
|
|
#define RSTR2D2PM_GPC_MUXED_BUS_2 80
|
|
#define RSTR2D2PM_GPC_MUXED_BUS_3 81
|
|
#define PDB2PM_SYS_MUXED_BUS_0 82
|
|
#define PDB2PM_SYS_MUXED_BUS_1 83
|
|
#define PDB2PM_SYS_MUXED_BUS_2 84
|
|
#define PDB2PM_SYS_MUXED_BUS_3 85
|
|
#define HUBMMU2PM_HUB_MUXED_BUS0_0 86
|
|
#define HUBMMU2PM_HUB_MUXED_BUS0_1 87
|
|
#define HUBMMU2PM_HUB_MUXED_BUS0_2 88
|
|
#define HUBMMU2PM_HUB_MUXED_BUS0_3 89
|
|
#define HUBMMU2PM_HUB_MUXED_BUS0_4 90
|
|
#define HUBMMU2PM_HUB_MUXED_BUS0_5 91
|
|
#define HUBMMU2PM_HUB_MUXED_BUS1_0 92
|
|
#define HUBMMU2PM_HUB_MUXED_BUS1_1 93
|
|
#define HUBMMU2PM_HUB_MUXED_BUS1_2 94
|
|
#define HUBMMU2PM_HUB_MUXED_BUS1_3 95
|
|
#define HUBMMU2PM_HUB_MUXED_BUS1_4 96
|
|
#define HUBMMU2PM_HUB_MUXED_BUS1_5 97
|
|
#define CE02PM_MUXED_BUS_0 98
|
|
#define CE02PM_MUXED_BUS_1 99
|
|
#define CE02PM_MUXED_BUS_2 100
|
|
#define CE02PM_MUXED_BUS_3 101
|
|
#define CE12PM_MUXED_BUS_0 102
|
|
#define CE12PM_MUXED_BUS_1 103
|
|
#define CE12PM_MUXED_BUS_2 104
|
|
#define CE12PM_MUXED_BUS_3 105
|
|
#define CE02PM_START_TRIGGER 106
|
|
#define CE02PM_STOP_TRIGGER 107
|
|
#define CE12PM_START_TRIGGER 108
|
|
#define CE12PM_STOP_TRIGGER 109
|
|
#define PDB2PM_SYS1_CLAMP_PERFMONOUT 110
|
|
#define HUBMMU2PM_SYS1_CLAMP_PERFMONOUT 111
|
|
#define RSTR2D2PM_SYS1_CLAMP_PERFMONOUT 112
|
|
#define PD2PM_SYS1_CLAMP_PERFMONOUT 113
|
|
|
|
#define NV_PERF_PMMSYS_SYS0_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMSYS_SYS0_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMSYS_SYS0_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMSYS_SYS0_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMSYS_SYS0_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMSYS_SYS0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_SYS0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define SCC2PM_SYS_MUXED_BUS_0 22
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#define SCC2PM_SYS_MUXED_BUS_1 23
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#define SCC2PM_SYS_MUXED_BUS_2 24
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#define SCC2PM_SYS_MUXED_BUS_3 25
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#define SCC2PM_SYS_MUXED_BUS_4 26
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#define SCC2PM_SYS_MUXED_BUS_5 27
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#define SCC2PM_SYS_MUXED_BUS_6 28
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#define SCC2PM_SYS_MUXED_BUS_7 29
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#define SCC2PM_SYS_MUXED_BUS_8 30
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#define SCC2PM_SYS_MUXED_BUS_9 31
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#define SCC2PM_SYS_MUXED_BUS_10 32
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#define SCC2PM_SYS_MUXED_BUS_11 33
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#define SCC2PM_SYS_MUXED_BUS_12 34
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#define SCC2PM_SYS_MUXED_BUS_13 35
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#define SCC2PM_SYS_MUXED_BUS_14 36
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#define HSHUB02PM_IG_PM_MUXED_BUS0_0 37
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#define HSHUB02PM_IG_PM_MUXED_BUS0_1 38
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#define HSHUB02PM_IG_PM_MUXED_BUS0_2 39
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#define HSHUB02PM_IG_PM_MUXED_BUS0_3 40
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#define HSHUB02PM_IG_PM_MUXED_BUS0_4 41
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#define HSHUB02PM_IG_PM_MUXED_BUS0_5 42
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#define HSHUB02PM_IG_PM_MUXED_BUS0_6 43
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#define HSHUB02PM_IG_PM_MUXED_BUS0_7 44
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#define SSYNC2PM_SYS_MUXED_BUS_0 45
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#define SSYNC2PM_SYS_MUXED_BUS_1 46
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#define SSYNC2PM_SYS_MUXED_BUS_2 47
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#define SSYNC2PM_SYS_MUXED_BUS_3 48
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#define SSYNC2PM_SYS_MUXED_BUS_4 49
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#define HSHUBMMU2PM_MUXED_BUS0_0 50
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#define HSHUBMMU2PM_MUXED_BUS0_1 51
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#define HSHUBMMU2PM_MUXED_BUS0_2 52
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#define HSHUBMMU2PM_MUXED_BUS0_3 53
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#define HSHUB02PM_IG_PM_MUXED_BUS1_0 54
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#define HSHUB02PM_IG_PM_MUXED_BUS1_1 55
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#define HSHUB02PM_IG_PM_MUXED_BUS1_2 56
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#define HSHUB02PM_IG_PM_MUXED_BUS1_3 57
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#define HSHUB02PM_IG_PM_MUXED_BUS1_4 58
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#define HSHUB02PM_IG_PM_MUXED_BUS1_5 59
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#define HSHUB02PM_IG_PM_MUXED_BUS1_6 60
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#define HSHUB02PM_IG_PM_MUXED_BUS1_7 61
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#define HSHUB02PM_EG_PM_MUXED_BUS0_0 62
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#define HSHUB02PM_EG_PM_MUXED_BUS0_1 63
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#define HSHUB02PM_EG_PM_MUXED_BUS0_2 64
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#define HSHUB02PM_EG_PM_MUXED_BUS0_3 65
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#define HSHUB02PM_EG_PM_MUXED_BUS0_4 66
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#define HSHUB02PM_EG_PM_MUXED_BUS0_5 67
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#define HSHUB02PM_EG_PM_MUXED_BUS0_6 68
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#define HSHUB02PM_EG_PM_MUXED_BUS0_7 69
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#define HSHUB02PM_EG_PM_MUXED_BUS1_0 70
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#define HSHUB02PM_EG_PM_MUXED_BUS1_1 71
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#define HSHUB02PM_EG_PM_MUXED_BUS1_2 72
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#define HSHUB02PM_EG_PM_MUXED_BUS1_3 73
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#define HSHUB02PM_EG_PM_MUXED_BUS1_4 74
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#define HSHUB02PM_EG_PM_MUXED_BUS1_5 75
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#define HSHUB02PM_EG_PM_MUXED_BUS1_6 76
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#define HSHUB02PM_EG_PM_MUXED_BUS1_7 77
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#define HSHUB02PM_RR_PM_MUXED_BUS0_0 78
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#define HSHUB02PM_RR_PM_MUXED_BUS0_1 79
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#define HSHUB02PM_RR_PM_MUXED_BUS0_2 80
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#define HSHUB02PM_RR_PM_MUXED_BUS0_3 81
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#define HSHUB02PM_RR_PM_MUXED_BUS0_4 82
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#define HSHUB02PM_RR_PM_MUXED_BUS0_5 83
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#define HSHUB02PM_RR_PM_MUXED_BUS0_6 84
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#define HSHUB02PM_RR_PM_MUXED_BUS0_7 85
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#define HSHUB02PM_RR_PM_MUXED_BUS1_0 86
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#define HSHUB02PM_RR_PM_MUXED_BUS1_1 87
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#define HSHUB02PM_RR_PM_MUXED_BUS1_2 88
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#define HSHUB02PM_RR_PM_MUXED_BUS1_3 89
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#define HSHUB02PM_RR_PM_MUXED_BUS1_4 90
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#define HSHUB02PM_RR_PM_MUXED_BUS1_5 91
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#define HSHUB02PM_RR_PM_MUXED_BUS1_6 92
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#define HSHUB02PM_RR_PM_MUXED_BUS1_7 93
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#define SMCARB2PM_PM_MUXED_BUS_0 94
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#define SMCARB2PM_PM_MUXED_BUS_1 95
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#define SMCARB2PM_PM_MUXED_BUS_2 96
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#define SMCARB2PM_PM_MUXED_BUS_3 97
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#define SMCARB2PM_PM_MUXED_BUS_4 98
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#define SMCARB2PM_PM_MUXED_BUS_5 99
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#define SMCARB2PM_PM_MUXED_BUS_6 100
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#define SMCARB2PM_PM_MUXED_BUS_7 101
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#define FBHUB2PM_HUB_MUXED_BUS_0 102
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#define FBHUB2PM_HUB_MUXED_BUS_1 103
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#define FBHUB2PM_HUB_MUXED_BUS_2 104
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#define FBHUB2PM_HUB_MUXED_BUS_3 105
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#define FBHUB2PM_HUB_MUXED_BUS_4 106
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#define HSHUBMMU2PM_MUXED_BUS1_0 107
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#define HSHUBMMU2PM_MUXED_BUS1_1 108
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#define HSHUBMMU2PM_MUXED_BUS1_2 109
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#define HSHUBMMU2PM_MUXED_BUS1_3 110
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#define CE32PM_MUXED_BUS_0 111
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|
#define CE32PM_MUXED_BUS_1 112
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#define CE32PM_MUXED_BUS_2 113
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#define CE32PM_MUXED_BUS_3 114
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#define PWR2PM_STALL_OUT_BUS_0 115
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#define PWR2PM_STALL_OUT_BUS_1 116
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#define PWR2PM_STALL_OUT_BUS_2 117
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#define DS2PM_SYS_DS_PERF_0 118
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#define DS2PM_SYS_DS_PERF_1 119
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#define DS2PM_SYS_DS_PERF_2 120
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#define DS2PM_SYS_DS_PERF_3 121
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#define CE22PM_MUXED_BUS_0 122
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#define CE22PM_MUXED_BUS_1 123
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|
#define CE22PM_MUXED_BUS_2 124
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|
#define CE22PM_MUXED_BUS_3 125
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#define FBHUB2PM_HUB_CLIENT_SEL_MUXED_BUS_0 126
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#define FBHUB2PM_HUB_CLIENT_SEL_MUXED_BUS_1 127
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|
#define FBHUB2PM_HUB_FIFO_FULL_LATENCY_THRESHOLD_0 128
|
|
#define FBHUB2PM_HUB_FIFO_FULL_LATENCY_THRESHOLD_1 129
|
|
#define FBHUB2PM_HUB_INTFC_SEL_MUXED_BUS_0 130
|
|
#define FBHUB2PM_HUB_INTFC_SEL_MUXED_BUS_1 131
|
|
#define FBHUB2PM_HUB_HNIC_INTFC_MUXED_BUS_0 132
|
|
#define FBHUB2PM_HUB_HNIC_INTFC_MUXED_BUS_1 133
|
|
#define PMMSYS_ROUTER2PM_CS2PMM_PRI_VLD 134
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|
#define PMMSYS_ROUTER2PM_PMM2CD_COUNT_PRI_PVLD 135
|
|
#define PMMSYS_ROUTER2PM_PMM2CD_COUNT_PRI_PRDY 136
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|
#define PMMSYS_ROUTER2PM_PMM2PMA_REQUEST_SENT 137
|
|
#define PMMSYS_ROUTER2PM_PMM2PMA_GRANT_RECEIVED 138
|
|
#define PMMSYS_ROUTER2PM_ROUTER_FIFO_EMPTY 139
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|
#define PMMSYS_ROUTER2PM_ROUTER_FIFO_BLOCKING 140
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|
#define PMMSYS_ROUTER2PM_ROUTER_PRI_BACKPRESSURE 141
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|
#define PMMSYS_ROUTER2PM_ROUTER_HS_RECORD_SENT 142
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|
#define PMMSYS_ROUTER2PM_ROUTER_HS_CREDIT_RECEIVED 143
|
|
#define PMMSYS_ROUTER2PM_ROUTER_HS_NO_CREDITS_AVAILABLE 144
|
|
#define PMMSYS_ROUTER2PM_ROUTER_HS_BLOCKING_INTERFACE 145
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|
#define PMMSYS_ROUTER2PM_ROUTER_HS_BLOCKING_PMA_CREDITS 146
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|
#define PMMSYS_ROUTER2PM_ROUTER_HS_CREDITS_OUTSTANDING 147
|
|
#define PMMSYS_ROUTER2PM_ROUTER_RECORD_READY 148
|
|
#define CE22PM_START_TRIGGER 149
|
|
#define CE22PM_STOP_TRIGGER 150
|
|
#define CE32PM_START_TRIGGER 151
|
|
#define CE32PM_STOP_TRIGGER 152
|
|
#define PWR2PM_PM_TRIGGER_START 153
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|
#define PWR2PM_PM_TRIGGER_START_SC 154
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|
#define PWR2PM_PM_TRIGGER_END 155
|
|
#define PWR2PM_PM_TRIGGER_END_SC 156
|
|
#define PWR2PM_DSTAT_OUT_BUS 157
|
|
#define PWR2PM_FB_CLK2SYSCLK_SYS0_ASYNCFIFO_VALID 158
|
|
#define HSHUBMMU2PM_SYS0_CLAMP_PERFMONOUT 159
|
|
#define SCC2PM_SYS0_CLAMP_PERFMONOUT 160
|
|
#define DS2PM_SYS0_CLAMP_PERFMONOUT 161
|
|
#define SSYNC2PM_SYS0_CLAMP_PERFMONOUT 162
|
|
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMSYS_SMCB0_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define FE2PM_ZSYS_SYS2A_MUXED_BUS_0 22
|
|
#define FE2PM_ZSYS_SYS2A_MUXED_BUS_1 23
|
|
#define FE2PM_ZSYS_SYS2A_MUXED_BUS_2 24
|
|
#define FE2PM_ZSYS_SYS2A_MUXED_BUS_3 25
|
|
#define FE2PM_ZSYS_SYS2A_MUXED_BUS_4 26
|
|
#define FE2PM_ZSYS_SYS2A_MUXED_BUS_5 27
|
|
#define FE2PM_ZSYS_SYS2A_MUXED_BUS_6 28
|
|
#define FE2PM_ZSYS_SYS2A_MUXED_BUS_7 29
|
|
#define FE2PM_ZSYS_SYS2B_MUXED_BUS_0 30
|
|
#define FE2PM_ZSYS_SYS2B_MUXED_BUS_1 31
|
|
#define FE2PM_ZSYS_SYS2B_MUXED_BUS_2 32
|
|
#define FE2PM_ZSYS_SYS2B_MUXED_BUS_3 33
|
|
#define FE2PM_ZSYS_SYS2B_MUXED_BUS_4 34
|
|
#define FE2PM_ZSYS_SYS2B_MUXED_BUS_5 35
|
|
#define FE2PM_ZSYS_SYS2B_MUXED_BUS_6 36
|
|
#define FE2PM_ZSYS_SYS2B_MUXED_BUS_7 37
|
|
#define FECS2PM_SYS0_MUXED_BUS_0 38
|
|
#define FECS2PM_SYS0_MUXED_BUS_1 39
|
|
#define FECS2PM_SYS0_MUXED_BUS_2 40
|
|
#define FECS2PM_SYS0_MUXED_BUS_3 41
|
|
#define FECS2PM_SYS0_MUXED_BUS_4 42
|
|
#define FECS2PM_SYS0_MUXED_BUS_5 43
|
|
#define FECS2PM_SYS0_MUXED_BUS_6 44
|
|
#define FECS2PM_SYS0_MUXED_BUS_7 45
|
|
#define CWD2PM_SYS0_CWD0_MUXED_BUS_0 46
|
|
#define CWD2PM_SYS0_CWD0_MUXED_BUS_1 47
|
|
#define CWD2PM_SYS0_CWD0_MUXED_BUS_2 48
|
|
#define CWD2PM_SYS0_CWD0_MUXED_BUS_3 49
|
|
#define CWD2PM_SYS0_CWD0_MUXED_BUS_4 50
|
|
#define CWD2PM_SYS0_CWD0_MUXED_BUS_5 51
|
|
#define CWD2PM_SYS0_CWD0_MUXED_BUS_6 52
|
|
#define CWD2PM_SYS0_CWD0_MUXED_BUS_7 53
|
|
#define FECS02PM_FALCON_SOFTPM_OUT_BUS_0 54
|
|
#define FECS02PM_FALCON_SOFTPM_OUT_BUS_1 55
|
|
#define FE2PM_SMCB_START_TRIGGER 56
|
|
#define FE2PM_SMCB_STOP_TRIGGER 57
|
|
#define FECS0_FALCON2PM_START_TRIGGER 58
|
|
#define FECS0_FALCON2PM_STOP_TRIGGER 59
|
|
#define FECS02PM_FALCON_STALL_OUT_BUS 60
|
|
#define FECS02PM_FALCON_IDLE_OUT_BUS 61
|
|
#define FE2PM_SMCB0_CLAMP_PERFMONOUT 62
|
|
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMSYS_SMCA0_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define FE2PM_ZSYS_MUXED_BUS_0 22
|
|
#define FE2PM_ZSYS_MUXED_BUS_1 23
|
|
#define FE2PM_ZSYS_MUXED_BUS_2 24
|
|
#define FE2PM_ZSYS_MUXED_BUS_3 25
|
|
#define FE2PM_ZSYS_MUXED_BUS_4 26
|
|
#define FE2PM_ZSYS_MUXED_BUS_5 27
|
|
#define FE2PM_ZSYS_MUXED_BUS_6 28
|
|
#define FE2PM_ZSYS_MUXED_BUS_7 29
|
|
#define SKED2PM_SYS0_SKED_PERF_0 30
|
|
#define SKED2PM_SYS0_SKED_PERF_1 31
|
|
#define SKED2PM_SYS0_SKED_PERF_2 32
|
|
#define SKED2PM_SYS0_SKED_PERF_3 33
|
|
#define SKED2PM_SYS0_SKED_PERF_4 34
|
|
#define SKED2PM_SYS0_SKED_PERF_5 35
|
|
#define SKED2PM_SYS0_SKED_PERF_6 36
|
|
#define SKED2PM_SYS0_SKED_PERF_7 37
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS0_0 38
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS0_1 39
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS0_2 40
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS0_3 41
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS1_0 42
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS1_1 43
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS1_2 44
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS1_3 45
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS2_0 46
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS2_1 47
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS2_2 48
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS2_3 49
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS3_0 50
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS3_1 51
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS3_2 52
|
|
#define HOST2PM_SMC0_PM_MUXED_BUS3_3 53
|
|
#define FE2PM_SMCA_START_TRIGGER 54
|
|
#define FE2PM_SMCA_STOP_TRIGGER 55
|
|
#define FE2PM_SMCA0_CLAMP_PERFMONOUT 56
|
|
#define SKED02PM_SMCA0_CLAMP_PERFMONOUT 57
|
|
|
|
#define NV_PERF_PMMSYS_PWR0_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMSYS_PWR0_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMSYS_PWR0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_PWR0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define PWR2PM_MUXED_BUS_0 22
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#define PWR2PM_MUXED_BUS_1 23
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#define PWR2PM_MUXED_BUS_2 24
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#define PWR2PM_MUXED_BUS_3 25
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#define PWR2PM_MUXED_BUS_4 26
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#define PWR2PM_MUXED_BUS_5 27
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#define PWR2PM_MUXED_BUS_6 28
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#define PWR2PM_MUXED_BUS_7 29
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#define PWR2PM_MUXED_BUS_8 30
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#define PWR2PM_MUXED_BUS_9 31
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#define PWR2PM_MUXED_BUS_10 32
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#define PWR2PM_MUXED_BUS_11 33
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#define PWR2PM_MUXED_BUS_12 34
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#define PWR2PM_MUXED_BUS_13 35
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#define PWR2PM_MUXED_BUS_14 36
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#define PWR2PM_MUXED_BUS_15 37
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#define PWR2PM_MUXED_BUS_16 38
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#define PWR2PM_MUXED_BUS_17 39
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#define PWR2PM_MUXED_BUS_18 40
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#define PWR2PM_MUXED_BUS_19 41
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#define PWR2PM_MUXED_BUS_20 42
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#define PWR2PM_MUXED_BUS_21 43
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#define PWR2PM_MUXED_BUS_22 44
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#define PWR2PM_MUXED_BUS_23 45
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#define PWR2PM_MUXED_BUS_24 46
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#define PWR2PM_MUXED_BUS_25 47
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#define PWR2PM_MUXED_BUS_26 48
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#define PWR2PM_MUXED_BUS_27 49
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#define PWR2PM_MUXED_BUS_28 50
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#define PWR2PM_MUXED_BUS_29 51
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#define PWR2PM_MUXED_BUS_30 52
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#define PWR2PM_MUXED_BUS_31 53
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#define PWR2PM_FALCON_SOFTPM_OUT_BUS_0 54
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#define PWR2PM_FALCON_SOFTPM_OUT_BUS_1 55
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#define PWR_FALCON2PM_START_TRIGGER 56
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#define PWR_FALCON2PM_START_TRIGGER_SC 57
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#define PWR_FALCON2PM_STOP_TRIGGER 58
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#define PWR_FALCON2PM_STOP_TRIGGER_SC 59
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#define PWR2PM_FALCON_STALL_OUT_BUS 60
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#define PWR2PM_FALCON_IDLE_OUT_BUS 61
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#define PWR2PM_PWR_CLK2PWRCLK_PWR0_ASYNCFIFO_VALID 62
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#define PWR2PM_UTILSCLK2PWRCLK_PWR0_ASYNCFIFO_VALID 63
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_ZERO 0
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_ONE 1
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_PCIE0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_0 22
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_1 23
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_2 24
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_3 25
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_4 26
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_5 27
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_6 28
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_7 29
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_8 30
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_9 31
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_10 32
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_11 33
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#define XVE3G02PM_XCLK_XVE_MUXED_BUS_12 34
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#define XP2PM_PCIE_XP0_MUXED_BUS_0 35
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#define XP2PM_PCIE_XP0_MUXED_BUS_1 36
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#define XP2PM_PCIE_XP0_MUXED_BUS_2 37
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#define XP2PM_PCIE_XP0_MUXED_BUS_3 38
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#define XP2PM_PCIE_XP0_MUXED_BUS_4 39
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#define XP2PM_PCIE_XP0_MUXED_BUS_5 40
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#define XP2PM_PCIE_XP0_MUXED_BUS_6 41
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#define XP2PM_PCIE_XP0_MUXED_BUS_7 42
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#define XP2PM_PCIE_XP1_MUXED_BUS_0 43
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#define XP2PM_PCIE_XP1_MUXED_BUS_1 44
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#define XP2PM_PCIE_XP1_MUXED_BUS_2 45
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#define XP2PM_PCIE_XP1_MUXED_BUS_3 46
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#define XP2PM_PCIE_XP1_MUXED_BUS_4 47
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#define XP2PM_PCIE_XP1_MUXED_BUS_5 48
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#define XP2PM_PCIE_XP1_MUXED_BUS_6 49
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#define XP2PM_PCIE_XP1_MUXED_BUS_7 50
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_0 51
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_1 52
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_2 53
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_3 54
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_4 55
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_5 56
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_6 57
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_7 58
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_8 59
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_9 60
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_10 61
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_11 62
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#define XVE3G12PM_XCLK_XVE_MUXED_BUS_12 63
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_ZERO 0
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_ONE 1
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_NVLTX3_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define NVLDLTX32PM_MUXED_BUS_0 22
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#define NVLDLTX32PM_MUXED_BUS_1 23
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#define NVLDLTX32PM_MUXED_BUS_2 24
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#define NVLDLTX32PM_MUXED_BUS_3 25
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#define NVLDLTX32PM_MUXED_BUS_4 26
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#define NVLDLTX32PM_MUXED_BUS_5 27
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#define NVLDLTX32PM_MUXED_BUS_6 28
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#define NVLDLTX32PM_MUXED_BUS_7 29
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#define NVLDLTX32PM_MUXED_BUS0_0 30
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#define NVLDLTX32PM_MUXED_BUS0_1 31
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#define NVLDLTX32PM_MUXED_BUS0_2 32
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#define NVLDLTX32PM_MUXED_BUS0_3 33
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#define NVLDLTX32PM_MUXED_BUS0_4 34
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#define NVLDLTX32PM_MUXED_BUS0_5 35
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#define NVLDLTX32PM_MUXED_BUS0_6 36
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#define NVLDLTX32PM_MUXED_BUS0_7 37
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#define TLC_TX32PM_MUXED_BUS0_0 38
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#define TLC_TX32PM_MUXED_BUS0_1 39
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#define TLC_TX32PM_MUXED_BUS0_2 40
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#define TLC_TX32PM_MUXED_BUS0_3 41
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#define TLC_TX32PM_MUXED_BUS1_0 42
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#define TLC_TX32PM_MUXED_BUS1_1 43
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#define TLC_TX32PM_MUXED_BUS1_2 44
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#define TLC_TX32PM_MUXED_BUS1_3 45
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#define TLC_TX32PM_MUXED_BUS2_0 46
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#define TLC_TX32PM_MUXED_BUS2_1 47
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#define TLC_TX32PM_MUXED_BUS2_2 48
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#define TLC_TX32PM_MUXED_BUS2_3 49
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#define TLC_TX32PM_MUXED_BUS3_0 50
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#define TLC_TX32PM_MUXED_BUS3_1 51
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#define TLC_TX32PM_MUXED_BUS3_2 52
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#define TLC_TX32PM_MUXED_BUS3_3 53
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_ZERO 0
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_ONE 1
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_NVLTX2_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define NVLDLTX22PM_MUXED_BUS_0 22
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#define NVLDLTX22PM_MUXED_BUS_1 23
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#define NVLDLTX22PM_MUXED_BUS_2 24
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#define NVLDLTX22PM_MUXED_BUS_3 25
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#define NVLDLTX22PM_MUXED_BUS_4 26
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#define NVLDLTX22PM_MUXED_BUS_5 27
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#define NVLDLTX22PM_MUXED_BUS_6 28
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#define NVLDLTX22PM_MUXED_BUS_7 29
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#define NVLDLTX22PM_MUXED_BUS0_0 30
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#define NVLDLTX22PM_MUXED_BUS0_1 31
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#define NVLDLTX22PM_MUXED_BUS0_2 32
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#define NVLDLTX22PM_MUXED_BUS0_3 33
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#define NVLDLTX22PM_MUXED_BUS0_4 34
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#define NVLDLTX22PM_MUXED_BUS0_5 35
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#define NVLDLTX22PM_MUXED_BUS0_6 36
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#define NVLDLTX22PM_MUXED_BUS0_7 37
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#define TLC_TX22PM_MUXED_BUS0_0 38
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#define TLC_TX22PM_MUXED_BUS0_1 39
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#define TLC_TX22PM_MUXED_BUS0_2 40
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#define TLC_TX22PM_MUXED_BUS0_3 41
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#define TLC_TX22PM_MUXED_BUS1_0 42
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#define TLC_TX22PM_MUXED_BUS1_1 43
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#define TLC_TX22PM_MUXED_BUS1_2 44
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#define TLC_TX22PM_MUXED_BUS1_3 45
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#define TLC_TX22PM_MUXED_BUS2_0 46
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#define TLC_TX22PM_MUXED_BUS2_1 47
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#define TLC_TX22PM_MUXED_BUS2_2 48
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#define TLC_TX22PM_MUXED_BUS2_3 49
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#define TLC_TX22PM_MUXED_BUS3_0 50
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#define TLC_TX22PM_MUXED_BUS3_1 51
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#define TLC_TX22PM_MUXED_BUS3_2 52
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#define TLC_TX22PM_MUXED_BUS3_3 53
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_ZERO 0
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_ONE 1
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_NVLTX1_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define NVLDLTX12PM_MUXED_BUS_0 22
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#define NVLDLTX12PM_MUXED_BUS_1 23
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#define NVLDLTX12PM_MUXED_BUS_2 24
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#define NVLDLTX12PM_MUXED_BUS_3 25
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#define NVLDLTX12PM_MUXED_BUS_4 26
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#define NVLDLTX12PM_MUXED_BUS_5 27
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#define NVLDLTX12PM_MUXED_BUS_6 28
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#define NVLDLTX12PM_MUXED_BUS_7 29
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#define NVLDLTX12PM_MUXED_BUS0_0 30
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#define NVLDLTX12PM_MUXED_BUS0_1 31
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#define NVLDLTX12PM_MUXED_BUS0_2 32
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#define NVLDLTX12PM_MUXED_BUS0_3 33
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#define NVLDLTX12PM_MUXED_BUS0_4 34
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#define NVLDLTX12PM_MUXED_BUS0_5 35
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#define NVLDLTX12PM_MUXED_BUS0_6 36
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#define NVLDLTX12PM_MUXED_BUS0_7 37
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#define TLC_TX12PM_MUXED_BUS0_0 38
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#define TLC_TX12PM_MUXED_BUS0_1 39
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#define TLC_TX12PM_MUXED_BUS0_2 40
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#define TLC_TX12PM_MUXED_BUS0_3 41
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#define TLC_TX12PM_MUXED_BUS1_0 42
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#define TLC_TX12PM_MUXED_BUS1_1 43
|
|
#define TLC_TX12PM_MUXED_BUS1_2 44
|
|
#define TLC_TX12PM_MUXED_BUS1_3 45
|
|
#define TLC_TX12PM_MUXED_BUS2_0 46
|
|
#define TLC_TX12PM_MUXED_BUS2_1 47
|
|
#define TLC_TX12PM_MUXED_BUS2_2 48
|
|
#define TLC_TX12PM_MUXED_BUS2_3 49
|
|
#define TLC_TX12PM_MUXED_BUS3_0 50
|
|
#define TLC_TX12PM_MUXED_BUS3_1 51
|
|
#define TLC_TX12PM_MUXED_BUS3_2 52
|
|
#define TLC_TX12PM_MUXED_BUS3_3 53
|
|
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMSYS_NVLTX0_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define NVLDLTX02PM_MUXED_BUS_0 22
|
|
#define NVLDLTX02PM_MUXED_BUS_1 23
|
|
#define NVLDLTX02PM_MUXED_BUS_2 24
|
|
#define NVLDLTX02PM_MUXED_BUS_3 25
|
|
#define NVLDLTX02PM_MUXED_BUS_4 26
|
|
#define NVLDLTX02PM_MUXED_BUS_5 27
|
|
#define NVLDLTX02PM_MUXED_BUS_6 28
|
|
#define NVLDLTX02PM_MUXED_BUS_7 29
|
|
#define NVLDLTX02PM_MUXED_BUS0_0 30
|
|
#define NVLDLTX02PM_MUXED_BUS0_1 31
|
|
#define NVLDLTX02PM_MUXED_BUS0_2 32
|
|
#define NVLDLTX02PM_MUXED_BUS0_3 33
|
|
#define NVLDLTX02PM_MUXED_BUS0_4 34
|
|
#define NVLDLTX02PM_MUXED_BUS0_5 35
|
|
#define NVLDLTX02PM_MUXED_BUS0_6 36
|
|
#define NVLDLTX02PM_MUXED_BUS0_7 37
|
|
#define TLC_TX02PM_MUXED_BUS0_0 38
|
|
#define TLC_TX02PM_MUXED_BUS0_1 39
|
|
#define TLC_TX02PM_MUXED_BUS0_2 40
|
|
#define TLC_TX02PM_MUXED_BUS0_3 41
|
|
#define TLC_TX02PM_MUXED_BUS1_0 42
|
|
#define TLC_TX02PM_MUXED_BUS1_1 43
|
|
#define TLC_TX02PM_MUXED_BUS1_2 44
|
|
#define TLC_TX02PM_MUXED_BUS1_3 45
|
|
#define TLC_TX02PM_MUXED_BUS2_0 46
|
|
#define TLC_TX02PM_MUXED_BUS2_1 47
|
|
#define TLC_TX02PM_MUXED_BUS2_2 48
|
|
#define TLC_TX02PM_MUXED_BUS2_3 49
|
|
#define TLC_TX02PM_MUXED_BUS3_0 50
|
|
#define TLC_TX02PM_MUXED_BUS3_1 51
|
|
#define TLC_TX02PM_MUXED_BUS3_2 52
|
|
#define TLC_TX02PM_MUXED_BUS3_3 53
|
|
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMSYS_NVLSYS0_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define TLC_SYS02PM_MUXED_BUS0_0 22
|
|
#define TLC_SYS02PM_MUXED_BUS0_1 23
|
|
#define TLC_SYS02PM_MUXED_BUS0_2 24
|
|
#define TLC_SYS02PM_MUXED_BUS0_3 25
|
|
#define TLC_SYS02PM_MUXED_BUS1_0 26
|
|
#define TLC_SYS02PM_MUXED_BUS1_1 27
|
|
#define TLC_SYS02PM_MUXED_BUS1_2 28
|
|
#define TLC_SYS02PM_MUXED_BUS1_3 29
|
|
#define TLC_SYS02PM_MUXED_BUS2_0 30
|
|
#define TLC_SYS02PM_MUXED_BUS2_1 31
|
|
#define TLC_SYS02PM_MUXED_BUS2_2 32
|
|
#define TLC_SYS02PM_MUXED_BUS2_3 33
|
|
#define TLC_SYS02PM_MUXED_BUS3_0 34
|
|
#define TLC_SYS02PM_MUXED_BUS3_1 35
|
|
#define TLC_SYS02PM_MUXED_BUS3_2 36
|
|
#define TLC_SYS02PM_MUXED_BUS3_3 37
|
|
#define TLC_SYS12PM_MUXED_BUS0_0 38
|
|
#define TLC_SYS12PM_MUXED_BUS0_1 39
|
|
#define TLC_SYS12PM_MUXED_BUS0_2 40
|
|
#define TLC_SYS12PM_MUXED_BUS0_3 41
|
|
#define TLC_SYS12PM_MUXED_BUS1_0 42
|
|
#define TLC_SYS12PM_MUXED_BUS1_1 43
|
|
#define TLC_SYS12PM_MUXED_BUS1_2 44
|
|
#define TLC_SYS12PM_MUXED_BUS1_3 45
|
|
#define TLC_SYS12PM_MUXED_BUS2_0 46
|
|
#define TLC_SYS12PM_MUXED_BUS2_1 47
|
|
#define TLC_SYS12PM_MUXED_BUS2_2 48
|
|
#define TLC_SYS12PM_MUXED_BUS2_3 49
|
|
#define TLC_SYS12PM_MUXED_BUS3_0 50
|
|
#define TLC_SYS12PM_MUXED_BUS3_1 51
|
|
#define TLC_SYS12PM_MUXED_BUS3_2 52
|
|
#define TLC_SYS12PM_MUXED_BUS3_3 53
|
|
#define TLC_SYS22PM_MUXED_BUS0_0 54
|
|
#define TLC_SYS22PM_MUXED_BUS0_1 55
|
|
#define TLC_SYS22PM_MUXED_BUS0_2 56
|
|
#define TLC_SYS22PM_MUXED_BUS0_3 57
|
|
#define TLC_SYS22PM_MUXED_BUS1_0 58
|
|
#define TLC_SYS22PM_MUXED_BUS1_1 59
|
|
#define TLC_SYS22PM_MUXED_BUS1_2 60
|
|
#define TLC_SYS22PM_MUXED_BUS1_3 61
|
|
#define TLC_SYS22PM_MUXED_BUS2_0 62
|
|
#define TLC_SYS22PM_MUXED_BUS2_1 63
|
|
#define TLC_SYS22PM_MUXED_BUS2_2 64
|
|
#define TLC_SYS22PM_MUXED_BUS2_3 65
|
|
#define TLC_SYS22PM_MUXED_BUS3_0 66
|
|
#define TLC_SYS22PM_MUXED_BUS3_1 67
|
|
#define TLC_SYS22PM_MUXED_BUS3_2 68
|
|
#define TLC_SYS22PM_MUXED_BUS3_3 69
|
|
#define TLC_SYS32PM_MUXED_BUS0_0 70
|
|
#define TLC_SYS32PM_MUXED_BUS0_1 71
|
|
#define TLC_SYS32PM_MUXED_BUS0_2 72
|
|
#define TLC_SYS32PM_MUXED_BUS0_3 73
|
|
#define TLC_SYS32PM_MUXED_BUS1_0 74
|
|
#define TLC_SYS32PM_MUXED_BUS1_1 75
|
|
#define TLC_SYS32PM_MUXED_BUS1_2 76
|
|
#define TLC_SYS32PM_MUXED_BUS1_3 77
|
|
#define TLC_SYS32PM_MUXED_BUS2_0 78
|
|
#define TLC_SYS32PM_MUXED_BUS2_1 79
|
|
#define TLC_SYS32PM_MUXED_BUS2_2 80
|
|
#define TLC_SYS32PM_MUXED_BUS2_3 81
|
|
#define TLC_SYS32PM_MUXED_BUS3_0 82
|
|
#define TLC_SYS32PM_MUXED_BUS3_1 83
|
|
#define TLC_SYS32PM_MUXED_BUS3_2 84
|
|
#define TLC_SYS32PM_MUXED_BUS3_3 85
|
|
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMSYS_NVLRX3_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define NVLDL32PM_MUXED_BUS0_0 22
|
|
#define NVLDL32PM_MUXED_BUS0_1 23
|
|
#define NVLDL32PM_MUXED_BUS0_2 24
|
|
#define NVLDL32PM_MUXED_BUS0_3 25
|
|
#define NVLDL32PM_MUXED_BUS0_4 26
|
|
#define NVLDL32PM_MUXED_BUS0_5 27
|
|
#define NVLDL32PM_MUXED_BUS0_6 28
|
|
#define NVLDL32PM_MUXED_BUS0_7 29
|
|
#define NVLDLRX32PM_MUXED_BUS_0 30
|
|
#define NVLDLRX32PM_MUXED_BUS_1 31
|
|
#define NVLDLRX32PM_MUXED_BUS_2 32
|
|
#define NVLDLRX32PM_MUXED_BUS_3 33
|
|
#define NVLDLRX32PM_MUXED_BUS_4 34
|
|
#define NVLDLRX32PM_MUXED_BUS_5 35
|
|
#define NVLDLRX32PM_MUXED_BUS_6 36
|
|
#define NVLDLRX32PM_MUXED_BUS_7 37
|
|
#define TLC_RX32PM_MUXED_BUS0_0 38
|
|
#define TLC_RX32PM_MUXED_BUS0_1 39
|
|
#define TLC_RX32PM_MUXED_BUS0_2 40
|
|
#define TLC_RX32PM_MUXED_BUS0_3 41
|
|
#define TLC_RX32PM_MUXED_BUS1_0 42
|
|
#define TLC_RX32PM_MUXED_BUS1_1 43
|
|
#define TLC_RX32PM_MUXED_BUS1_2 44
|
|
#define TLC_RX32PM_MUXED_BUS1_3 45
|
|
#define TLC_RX32PM_MUXED_BUS2_0 46
|
|
#define TLC_RX32PM_MUXED_BUS2_1 47
|
|
#define TLC_RX32PM_MUXED_BUS2_2 48
|
|
#define TLC_RX32PM_MUXED_BUS2_3 49
|
|
#define TLC_RX32PM_MUXED_BUS3_0 50
|
|
#define TLC_RX32PM_MUXED_BUS3_1 51
|
|
#define TLC_RX32PM_MUXED_BUS3_2 52
|
|
#define TLC_RX32PM_MUXED_BUS3_3 53
|
|
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
|
#define NV_PERF_PMMSYS_NVLRX2_SIGVAL_PMM_CONTEXT_FREEZE 21
|
|
#define NVLDL22PM_MUXED_BUS0_0 22
|
|
#define NVLDL22PM_MUXED_BUS0_1 23
|
|
#define NVLDL22PM_MUXED_BUS0_2 24
|
|
#define NVLDL22PM_MUXED_BUS0_3 25
|
|
#define NVLDL22PM_MUXED_BUS0_4 26
|
|
#define NVLDL22PM_MUXED_BUS0_5 27
|
|
#define NVLDL22PM_MUXED_BUS0_6 28
|
|
#define NVLDL22PM_MUXED_BUS0_7 29
|
|
#define NVLDLRX22PM_MUXED_BUS_0 30
|
|
#define NVLDLRX22PM_MUXED_BUS_1 31
|
|
#define NVLDLRX22PM_MUXED_BUS_2 32
|
|
#define NVLDLRX22PM_MUXED_BUS_3 33
|
|
#define NVLDLRX22PM_MUXED_BUS_4 34
|
|
#define NVLDLRX22PM_MUXED_BUS_5 35
|
|
#define NVLDLRX22PM_MUXED_BUS_6 36
|
|
#define NVLDLRX22PM_MUXED_BUS_7 37
|
|
#define TLC_RX22PM_MUXED_BUS0_0 38
|
|
#define TLC_RX22PM_MUXED_BUS0_1 39
|
|
#define TLC_RX22PM_MUXED_BUS0_2 40
|
|
#define TLC_RX22PM_MUXED_BUS0_3 41
|
|
#define TLC_RX22PM_MUXED_BUS1_0 42
|
|
#define TLC_RX22PM_MUXED_BUS1_1 43
|
|
#define TLC_RX22PM_MUXED_BUS1_2 44
|
|
#define TLC_RX22PM_MUXED_BUS1_3 45
|
|
#define TLC_RX22PM_MUXED_BUS2_0 46
|
|
#define TLC_RX22PM_MUXED_BUS2_1 47
|
|
#define TLC_RX22PM_MUXED_BUS2_2 48
|
|
#define TLC_RX22PM_MUXED_BUS2_3 49
|
|
#define TLC_RX22PM_MUXED_BUS3_0 50
|
|
#define TLC_RX22PM_MUXED_BUS3_1 51
|
|
#define TLC_RX22PM_MUXED_BUS3_2 52
|
|
#define TLC_RX22PM_MUXED_BUS3_3 53
|
|
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_ZERO 0
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_ONE 1
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_PMA_TRIGGER 2
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_T_PULSE 3
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_PMMPRICONTROL0 4
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_PMMPRICONTROL1 5
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_PMMPRICONTROL2 6
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_PMMPRICONTROL3 7
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_VWTRIGGER0 8
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_VWTRIGGER1 9
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_VWTRIGGER2 10
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_VWTRIGGER3 11
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_VWTRIGGER4 12
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_VWTRIGGER5 13
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_VWTRIGGER6 14
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_VWTRIGGER7 15
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
|
|
#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_GLOBAL_ILA_TRIGGER 20
|
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#define NV_PERF_PMMSYS_NVLRX1_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define NVLDL12PM_MUXED_BUS0_0 22
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#define NVLDL12PM_MUXED_BUS0_1 23
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#define NVLDL12PM_MUXED_BUS0_2 24
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#define NVLDL12PM_MUXED_BUS0_3 25
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#define NVLDL12PM_MUXED_BUS0_4 26
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#define NVLDL12PM_MUXED_BUS0_5 27
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#define NVLDL12PM_MUXED_BUS0_6 28
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#define NVLDL12PM_MUXED_BUS0_7 29
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#define NVLDLRX12PM_MUXED_BUS_0 30
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#define NVLDLRX12PM_MUXED_BUS_1 31
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#define NVLDLRX12PM_MUXED_BUS_2 32
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#define NVLDLRX12PM_MUXED_BUS_3 33
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#define NVLDLRX12PM_MUXED_BUS_4 34
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#define NVLDLRX12PM_MUXED_BUS_5 35
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#define NVLDLRX12PM_MUXED_BUS_6 36
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#define NVLDLRX12PM_MUXED_BUS_7 37
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#define TLC_RX12PM_MUXED_BUS0_0 38
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#define TLC_RX12PM_MUXED_BUS0_1 39
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#define TLC_RX12PM_MUXED_BUS0_2 40
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#define TLC_RX12PM_MUXED_BUS0_3 41
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#define TLC_RX12PM_MUXED_BUS1_0 42
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#define TLC_RX12PM_MUXED_BUS1_1 43
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#define TLC_RX12PM_MUXED_BUS1_2 44
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#define TLC_RX12PM_MUXED_BUS1_3 45
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#define TLC_RX12PM_MUXED_BUS2_0 46
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#define TLC_RX12PM_MUXED_BUS2_1 47
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#define TLC_RX12PM_MUXED_BUS2_2 48
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#define TLC_RX12PM_MUXED_BUS2_3 49
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#define TLC_RX12PM_MUXED_BUS3_0 50
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#define TLC_RX12PM_MUXED_BUS3_1 51
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#define TLC_RX12PM_MUXED_BUS3_2 52
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#define TLC_RX12PM_MUXED_BUS3_3 53
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_ZERO 0
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_ONE 1
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_NVLRX0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define NVLDL02PM_MUXED_BUS0_0 22
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#define NVLDL02PM_MUXED_BUS0_1 23
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#define NVLDL02PM_MUXED_BUS0_2 24
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#define NVLDL02PM_MUXED_BUS0_3 25
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#define NVLDL02PM_MUXED_BUS0_4 26
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#define NVLDL02PM_MUXED_BUS0_5 27
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#define NVLDL02PM_MUXED_BUS0_6 28
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#define NVLDL02PM_MUXED_BUS0_7 29
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#define NVLDLRX02PM_MUXED_BUS_0 30
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#define NVLDLRX02PM_MUXED_BUS_1 31
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#define NVLDLRX02PM_MUXED_BUS_2 32
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#define NVLDLRX02PM_MUXED_BUS_3 33
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#define NVLDLRX02PM_MUXED_BUS_4 34
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#define NVLDLRX02PM_MUXED_BUS_5 35
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#define NVLDLRX02PM_MUXED_BUS_6 36
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#define NVLDLRX02PM_MUXED_BUS_7 37
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#define TLC_RX02PM_MUXED_BUS0_0 38
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#define TLC_RX02PM_MUXED_BUS0_1 39
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#define TLC_RX02PM_MUXED_BUS0_2 40
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#define TLC_RX02PM_MUXED_BUS0_3 41
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#define TLC_RX02PM_MUXED_BUS1_0 42
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#define TLC_RX02PM_MUXED_BUS1_1 43
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#define TLC_RX02PM_MUXED_BUS1_2 44
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#define TLC_RX02PM_MUXED_BUS1_3 45
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#define TLC_RX02PM_MUXED_BUS2_0 46
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#define TLC_RX02PM_MUXED_BUS2_1 47
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#define TLC_RX02PM_MUXED_BUS2_2 48
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#define TLC_RX02PM_MUXED_BUS2_3 49
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#define TLC_RX02PM_MUXED_BUS3_0 50
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#define TLC_RX02PM_MUXED_BUS3_1 51
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#define TLC_RX02PM_MUXED_BUS3_2 52
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#define TLC_RX02PM_MUXED_BUS3_3 53
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_ZERO 0
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_ONE 1
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_NVLCTRL0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define NVLIPT02PM_MUXED_BUS0_0 22
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#define NVLIPT02PM_MUXED_BUS0_1 23
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#define NVLIPT02PM_MUXED_BUS0_2 24
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#define NVLIPT02PM_MUXED_BUS0_3 25
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#define NVLIPT02PM_MUXED_BUS1_0 26
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#define NVLIPT02PM_MUXED_BUS1_1 27
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#define NVLIPT02PM_MUXED_BUS1_2 28
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#define NVLIPT02PM_MUXED_BUS1_3 29
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#define NVLIPT02PM_MUXED_BUS2_0 30
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#define NVLIPT02PM_MUXED_BUS2_1 31
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#define NVLIPT02PM_MUXED_BUS2_2 32
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#define NVLIPT02PM_MUXED_BUS2_3 33
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#define NVLIPT02PM_MUXED_BUS3_0 34
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#define NVLIPT02PM_MUXED_BUS3_1 35
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#define NVLIPT02PM_MUXED_BUS3_2 36
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#define NVLIPT02PM_MUXED_BUS3_3 37
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#define IOCTRL02PM_MUXED_BUS0_0 38
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#define IOCTRL02PM_MUXED_BUS0_1 39
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#define IOCTRL02PM_MUXED_BUS0_2 40
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#define IOCTRL02PM_MUXED_BUS0_3 41
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#define IOCTRL02PM_MUXED_BUS1_0 42
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#define IOCTRL02PM_MUXED_BUS1_1 43
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#define IOCTRL02PM_MUXED_BUS1_2 44
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#define IOCTRL02PM_MUXED_BUS1_3 45
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#define IOCTRL02PM_MUXED_BUS2_0 46
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#define IOCTRL02PM_MUXED_BUS2_1 47
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#define IOCTRL02PM_MUXED_BUS2_2 48
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#define IOCTRL02PM_MUXED_BUS2_3 49
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#define IOCTRL02PM_MUXED_BUS3_0 50
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#define IOCTRL02PM_MUXED_BUS3_1 51
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#define IOCTRL02PM_MUXED_BUS3_2 52
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#define IOCTRL02PM_MUXED_BUS3_3 53
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_ZERO 0
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_ONE 1
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_MSD1_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define NVDEC12PM_MUXED_BUS_0 22
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#define NVDEC12PM_MUXED_BUS_1 23
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#define NVDEC12PM_MUXED_BUS_2 24
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#define NVDEC12PM_MUXED_BUS_3 25
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#define NVDEC12PM_MUXED_BUS_4 26
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#define NVDEC12PM_MUXED_BUS_5 27
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#define NVDEC12PM_MUXED_BUS_6 28
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#define NVDEC12PM_MUXED_BUS_7 29
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#define NVDEC12PM_MUXED_BUS_8 30
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#define NVDEC12PM_MUXED_BUS_9 31
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#define NVDEC12PM_MUXED_BUS_10 32
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#define NVDEC12PM_MUXED_BUS_11 33
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#define MSE2PM_MUXED_BUS_NVENC0_0 34
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#define MSE2PM_MUXED_BUS_NVENC0_1 35
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#define MSE2PM_MUXED_BUS_NVENC0_2 36
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#define MSE2PM_MUXED_BUS_NVENC0_3 37
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#define MSE2PM_MUXED_BUS_NVENC0_4 38
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#define MSE2PM_MUXED_BUS_NVENC0_5 39
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#define MSE2PM_MUXED_BUS_NVENC0_6 40
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#define MSE2PM_MUXED_BUS_NVENC0_7 41
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#define MSE2PM_MUXED_BUS_NVENC0_8 42
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#define MSE2PM_MUXED_BUS_NVENC0_9 43
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#define MSE2PM_MUXED_BUS_NVENC0_10 44
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#define MSE2PM_MUXED_BUS_NVENC0_11 45
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#define NVDEC12PM_STALL_OUT_BUS_0 46
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#define NVDEC12PM_STALL_OUT_BUS_1 47
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#define NVDEC12PM_STALL_OUT_BUS_2 48
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#define NVENC02PM_STALL_OUT_BUS_0 49
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#define NVENC02PM_STALL_OUT_BUS_1 50
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#define NVENC02PM_STALL_OUT_BUS_2 51
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#define NVDEC12PM_FALCON_SOFTPM_OUT_BUS_0 52
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#define NVDEC12PM_FALCON_SOFTPM_OUT_BUS_1 53
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#define NVENC02PM_FALCON_SOFTPM_OUT_BUS_0 54
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#define NVENC02PM_FALCON_SOFTPM_OUT_BUS_1 55
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#define NVDEC1_FALCON2PM_START_TRIGGER 56
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#define NVDEC1_FALCON2PM_START_TRIGGER_SC 57
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#define NVDEC1_FALCON2PM_STOP_TRIGGER 58
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#define NVDEC1_FALCON2PM_STOP_TRIGGER_SC 59
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#define NVDEC12PM_FALCON_STALL_OUT_BUS 60
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#define NVDEC12PM_FALCON_IDLE_OUT_BUS 61
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#define NVDEC12PM_PM_TRIGGER_START 62
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#define NVDEC12PM_PM_TRIGGER_START_SC 63
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#define NVDEC12PM_PM_TRIGGER_END 64
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#define NVDEC12PM_PM_TRIGGER_END_SC 65
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#define NVDEC12PM_DSTAT_OUT_BUS 66
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#define NVENC0_FALCON2PM_START_TRIGGER 67
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#define NVENC0_FALCON2PM_START_TRIGGER_SC 68
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#define NVENC0_FALCON2PM_STOP_TRIGGER 69
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#define NVENC0_FALCON2PM_STOP_TRIGGER_SC 70
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#define NVENC02PM_FALCON_STALL_OUT_BUS 71
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#define NVENC02PM_FALCON_IDLE_OUT_BUS 72
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#define NVENC02PM_PM_TRIGGER_START 73
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#define NVENC02PM_PM_TRIGGER_START_SC 74
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#define NVENC02PM_PM_TRIGGER_END 75
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#define NVENC02PM_PM_TRIGGER_END_SC 76
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#define NVENC02PM_DSTAT_OUT_BUS 77
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#define NVDEC12PM_FB_CLK2MSDCLK_MSD1_ASYNCFIFO_VALID 78
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#define NVDEC12PM_MSD_CLK2MSDCLK_MSD1_ASYNCFIFO_VALID 79
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#define NVENC02PM_FB_CLK2MSDCLK_MSD1_ASYNCFIFO_VALID 80
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#define NVENC02PM_MSD_CLK2MSDCLK_MSD1_ASYNCFIFO_VALID 81
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_ZERO 0
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_ONE 1
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_MSD0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define NVDEC02PM_MUXED_BUS_0 22
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#define NVDEC02PM_MUXED_BUS_1 23
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#define NVDEC02PM_MUXED_BUS_2 24
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#define NVDEC02PM_MUXED_BUS_3 25
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#define NVDEC02PM_MUXED_BUS_4 26
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#define NVDEC02PM_MUXED_BUS_5 27
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#define NVDEC02PM_MUXED_BUS_6 28
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#define NVDEC02PM_MUXED_BUS_7 29
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#define NVDEC02PM_MUXED_BUS_8 30
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#define NVDEC02PM_MUXED_BUS_9 31
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#define NVDEC02PM_MUXED_BUS_10 32
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#define NVDEC02PM_MUXED_BUS_11 33
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#define OFA2PM_MUXED_BUS_0 34
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#define OFA2PM_MUXED_BUS_1 35
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#define OFA2PM_MUXED_BUS_2 36
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#define OFA2PM_MUXED_BUS_3 37
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#define OFA2PM_MUXED_BUS_4 38
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#define OFA2PM_MUXED_BUS_5 39
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#define OFA2PM_MUXED_BUS_6 40
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#define OFA2PM_MUXED_BUS_7 41
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#define OFA2PM_MUXED_BUS_8 42
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#define OFA2PM_MUXED_BUS_9 43
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#define OFA2PM_MUXED_BUS_10 44
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#define OFA2PM_MUXED_BUS_11 45
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#define GSP2PM_STALL_OUT_BUS_0 46
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#define GSP2PM_STALL_OUT_BUS_1 47
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#define GSP2PM_STALL_OUT_BUS_2 48
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#define OFA2PM_STALL_OUT_BUS_0 49
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#define OFA2PM_STALL_OUT_BUS_1 50
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#define OFA2PM_STALL_OUT_BUS_2 51
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#define GSP2PM_FALCON_SOFTPM_OUT_BUS_0 52
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#define GSP2PM_FALCON_SOFTPM_OUT_BUS_1 53
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#define NVDEC02PM_STALL_OUT_BUS_0 54
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#define NVDEC02PM_STALL_OUT_BUS_1 55
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#define NVDEC02PM_STALL_OUT_BUS_2 56
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#define SEC2PM_STALL_OUT_BUS_0 57
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#define SEC2PM_STALL_OUT_BUS_1 58
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#define SEC2PM_STALL_OUT_BUS_2 59
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#define NVDEC02PM_FALCON_SOFTPM_OUT_BUS_0 60
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#define NVDEC02PM_FALCON_SOFTPM_OUT_BUS_1 61
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#define SEC2PM_FALCON_SOFTPM_OUT_BUS_0 62
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#define SEC2PM_FALCON_SOFTPM_OUT_BUS_1 63
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#define OFA2PM_FALCON_SOFTPM_OUT_BUS_0 64
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#define OFA2PM_FALCON_SOFTPM_OUT_BUS_1 65
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#define GSP_FALCON2PM_START_TRIGGER 66
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#define GSP_FALCON2PM_START_TRIGGER_SC 67
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#define GSP_FALCON2PM_STOP_TRIGGER 68
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#define GSP_FALCON2PM_STOP_TRIGGER_SC 69
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#define GSP2PM_FALCON_STALL_OUT_BUS 70
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#define GSP2PM_FALCON_IDLE_OUT_BUS 71
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#define GSP2PM_PM_TRIGGER_START 72
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#define GSP2PM_PM_TRIGGER_START_SC 73
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#define GSP2PM_PM_TRIGGER_END 74
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#define GSP2PM_PM_TRIGGER_END_SC 75
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#define GSP2PM_DSTAT_OUT_BUS 76
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#define GSP2PM_SCP_HAZARD_STALL 77
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#define GSP2PM_SCP_PUSH_STALL 78
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#define GSP2PM_SCP_FETCH_STALL 79
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#define GSP2PM_SCP_RNG_STALL 80
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#define GSP2PM_SCP_WB_STALL 81
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#define GSP2PM_SCP_AES_STALL 82
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#define GSP2PM_SCP_ANY_STALL 83
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#define GSP2PM_SCP_IDLE 84
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#define GSP2PM_SCP_CMD_ACTIVE 85
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#define GSP2PM_SCP_PUSH_ACTIVE 86
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#define GSP2PM_SCP_SEQ_ACTIVE 87
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#define GSP2PM_SCP_CTL_ACTIVE 88
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#define GSP2PM_SCP_FETCH_ACTIVE 89
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#define GSP2PM_SCP_RNG_ACTIVE 90
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#define NVDEC0_FALCON2PM_START_TRIGGER 91
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#define NVDEC0_FALCON2PM_START_TRIGGER_SC 92
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#define NVDEC0_FALCON2PM_STOP_TRIGGER 93
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#define NVDEC0_FALCON2PM_STOP_TRIGGER_SC 94
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#define NVDEC02PM_FALCON_STALL_OUT_BUS 95
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#define NVDEC02PM_FALCON_IDLE_OUT_BUS 96
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#define NVDEC02PM_PM_TRIGGER_START 97
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#define NVDEC02PM_PM_TRIGGER_START_SC 98
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#define NVDEC02PM_PM_TRIGGER_END 99
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#define NVDEC02PM_PM_TRIGGER_END_SC 100
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#define NVDEC02PM_DSTAT_OUT_BUS 101
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#define SEC_FALCON2PM_START_TRIGGER 102
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#define SEC_FALCON2PM_START_TRIGGER_SC 103
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#define SEC_FALCON2PM_STOP_TRIGGER 104
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#define SEC_FALCON2PM_STOP_TRIGGER_SC 105
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#define SEC2PM_FALCON_STALL_OUT_BUS 106
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#define SEC2PM_FALCON_IDLE_OUT_BUS 107
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#define SEC2PM_PM_TRIGGER_START 108
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#define SEC2PM_PM_TRIGGER_START_SC 109
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#define SEC2PM_PM_TRIGGER_END 110
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#define SEC2PM_PM_TRIGGER_END_SC 111
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#define SEC2PM_DSTAT_OUT_BUS 112
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#define SEC2PM_SCP_HAZARD_STALL 113
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#define SEC2PM_SCP_PUSH_STALL 114
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#define SEC2PM_SCP_FETCH_STALL 115
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#define SEC2PM_SCP_RNG_STALL 116
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#define SEC2PM_SCP_WB_STALL 117
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#define SEC2PM_SCP_AES_STALL 118
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#define SEC2PM_SCP_ANY_STALL 119
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#define SEC2PM_SCP_IDLE 120
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#define SEC2PM_SCP_CMD_ACTIVE 121
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#define SEC2PM_SCP_PUSH_ACTIVE 122
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#define SEC2PM_SCP_SEQ_ACTIVE 123
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#define SEC2PM_SCP_CTL_ACTIVE 124
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#define SEC2PM_SCP_FETCH_ACTIVE 125
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#define SEC2PM_SCP_RNG_ACTIVE 126
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#define OFA_FALCON2PM_START_TRIGGER 127
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#define OFA_FALCON2PM_START_TRIGGER_SC 128
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#define OFA_FALCON2PM_STOP_TRIGGER 129
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#define OFA_FALCON2PM_STOP_TRIGGER_SC 130
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#define OFA2PM_FALCON_STALL_OUT_BUS 131
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#define OFA2PM_FALCON_IDLE_OUT_BUS 132
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#define OFA2PM_PM_TRIGGER_START 133
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#define OFA2PM_PM_TRIGGER_START_SC 134
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#define OFA2PM_PM_TRIGGER_END 135
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#define OFA2PM_PM_TRIGGER_END_SC 136
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#define OFA2PM_DSTAT_OUT_BUS 137
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#define GSP2PM_FB_CLK2MSDCLK_MSD0_ASYNCFIFO_VALID 138
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#define GSP2PM_MSD_CLK2MSDCLK_MSD0_ASYNCFIFO_VALID 139
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#define NVDEC02PM_FB_CLK2MSDCLK_MSD0_ASYNCFIFO_VALID 140
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#define NVDEC02PM_MSD_CLK2MSDCLK_MSD0_ASYNCFIFO_VALID 141
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#define OFA2PM_FB_CLK2MSDCLK_MSD0_ASYNCFIFO_VALID 142
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#define OFA2PM_MSD_CLK2MSDCLK_MSD0_ASYNCFIFO_VALID 143
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#define SEC2PM_FB_CLK2MSDCLK_MSD0_ASYNCFIFO_VALID 144
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#define SEC2PM_MSD_CLK2MSDCLK_MSD0_ASYNCFIFO_VALID 145
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_ZERO 0
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_ONE 1
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_PMA_TRIGGER 2
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_T_PULSE 3
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_PMMPRICONTROL0 4
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_PMMPRICONTROL1 5
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_PMMPRICONTROL2 6
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_PMMPRICONTROL3 7
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_VWTRIGGER0 8
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_VWTRIGGER1 9
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_VWTRIGGER2 10
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_VWTRIGGER3 11
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_VWTRIGGER4 12
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_VWTRIGGER5 13
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_VWTRIGGER6 14
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_VWTRIGGER7 15
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_OTHER_PERFMON_EVENT_STROBE 16
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_LOCAL_PERFMON_EVENT_STROBE 17
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_OTHER_PERFMON_FLAG_BIT 18
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_LOCAL_PERFMON_FLAG_BIT 19
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_GLOBAL_ILA_TRIGGER 20
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#define NV_PERF_PMMSYS_HOST0_SIGVAL_PMM_CONTEXT_FREEZE 21
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_0 22
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_1 23
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_2 24
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_3 25
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_4 26
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_5 27
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_6 28
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_7 29
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_8 30
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_9 31
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_10 32
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_11 33
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#define XVE3G02PM_HOST_XVE_MUXED_BUS_12 34
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_0 35
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_1 36
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_2 37
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_3 38
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_4 39
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_5 40
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_6 41
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_7 42
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_8 43
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_9 44
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_10 45
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_11 46
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#define XVE3G12PM_HOST_XVE_MUXED_BUS_12 47
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#define HOST2PM_EXT_PM_MUXED_BUS_0 48
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#define HOST2PM_EXT_PM_MUXED_BUS_1 49
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#define HOST2PM_EXT_PM_MUXED_BUS_2 50
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#define HOST2PM_EXT_PM_MUXED_BUS_3 51
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