403 lines
51 KiB
C
403 lines
51 KiB
C
|
|
|
|
|
|
#ifndef ACCESS_MAP_REGISTER_RANGE
|
|
#define ACCESS_MAP_REGISTER_RANGE(start, end)
|
|
#endif
|
|
#ifdef CAU_OUTER_UNICAST_FULL
|
|
ACCESS_MAP_REGISTER_RANGE(0x504180, 0x5041b8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5041c0, 0x5041e8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5041f0, 0x5041f8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x504980, 0x5049b8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5049c0, 0x5049e8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5049f0, 0x5049f8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x505180, 0x5051b8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5051c0, 0x5051e8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5051f0, 0x5051f8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x505980, 0x5059b8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5059c0, 0x5059e8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5059f0, 0x5059f8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x506180, 0x5061b8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5061c0, 0x5061e8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5061f0, 0x5061f8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x506980, 0x5069b8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5069c0, 0x5069e8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5069f0, 0x5069f8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c180, 0x50c1b8) // (NV_PGRAPH_PRI_GPC1_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c1c0, 0x50c1e8) // (NV_PGRAPH_PRI_GPC1_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c1f0, 0x50c1f8) // (NV_PGRAPH_PRI_GPC1_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c980, 0x50c9b8) // (NV_PGRAPH_PRI_GPC1_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c9c0, 0x50c9e8) // (NV_PGRAPH_PRI_GPC1_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c9f0, 0x50c9f8) // (NV_PGRAPH_PRI_GPC1_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d180, 0x50d1b8) // (NV_PGRAPH_PRI_GPC1_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d1c0, 0x50d1e8) // (NV_PGRAPH_PRI_GPC1_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d1f0, 0x50d1f8) // (NV_PGRAPH_PRI_GPC1_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d980, 0x50d9b8) // (NV_PGRAPH_PRI_GPC1_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d9c0, 0x50d9e8) // (NV_PGRAPH_PRI_GPC1_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d9f0, 0x50d9f8) // (NV_PGRAPH_PRI_GPC1_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e180, 0x50e1b8) // (NV_PGRAPH_PRI_GPC1_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e1c0, 0x50e1e8) // (NV_PGRAPH_PRI_GPC1_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e1f0, 0x50e1f8) // (NV_PGRAPH_PRI_GPC1_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e980, 0x50e9b8) // (NV_PGRAPH_PRI_GPC1_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e9c0, 0x50e9e8) // (NV_PGRAPH_PRI_GPC1_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e9f0, 0x50e9f8) // (NV_PGRAPH_PRI_GPC1_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x514180, 0x5141b8) // (NV_PGRAPH_PRI_GPC2_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5141c0, 0x5141e8) // (NV_PGRAPH_PRI_GPC2_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5141f0, 0x5141f8) // (NV_PGRAPH_PRI_GPC2_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x514980, 0x5149b8) // (NV_PGRAPH_PRI_GPC2_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5149c0, 0x5149e8) // (NV_PGRAPH_PRI_GPC2_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5149f0, 0x5149f8) // (NV_PGRAPH_PRI_GPC2_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x515180, 0x5151b8) // (NV_PGRAPH_PRI_GPC2_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5151c0, 0x5151e8) // (NV_PGRAPH_PRI_GPC2_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5151f0, 0x5151f8) // (NV_PGRAPH_PRI_GPC2_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x515980, 0x5159b8) // (NV_PGRAPH_PRI_GPC2_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5159c0, 0x5159e8) // (NV_PGRAPH_PRI_GPC2_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5159f0, 0x5159f8) // (NV_PGRAPH_PRI_GPC2_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x516180, 0x5161b8) // (NV_PGRAPH_PRI_GPC2_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5161c0, 0x5161e8) // (NV_PGRAPH_PRI_GPC2_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5161f0, 0x5161f8) // (NV_PGRAPH_PRI_GPC2_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x516980, 0x5169b8) // (NV_PGRAPH_PRI_GPC2_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5169c0, 0x5169e8) // (NV_PGRAPH_PRI_GPC2_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5169f0, 0x5169f8) // (NV_PGRAPH_PRI_GPC2_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c180, 0x51c1b8) // (NV_PGRAPH_PRI_GPC3_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c1c0, 0x51c1e8) // (NV_PGRAPH_PRI_GPC3_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c1f0, 0x51c1f8) // (NV_PGRAPH_PRI_GPC3_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c980, 0x51c9b8) // (NV_PGRAPH_PRI_GPC3_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c9c0, 0x51c9e8) // (NV_PGRAPH_PRI_GPC3_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c9f0, 0x51c9f8) // (NV_PGRAPH_PRI_GPC3_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d180, 0x51d1b8) // (NV_PGRAPH_PRI_GPC3_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d1c0, 0x51d1e8) // (NV_PGRAPH_PRI_GPC3_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d1f0, 0x51d1f8) // (NV_PGRAPH_PRI_GPC3_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d980, 0x51d9b8) // (NV_PGRAPH_PRI_GPC3_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d9c0, 0x51d9e8) // (NV_PGRAPH_PRI_GPC3_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d9f0, 0x51d9f8) // (NV_PGRAPH_PRI_GPC3_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e180, 0x51e1b8) // (NV_PGRAPH_PRI_GPC3_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e1c0, 0x51e1e8) // (NV_PGRAPH_PRI_GPC3_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e1f0, 0x51e1f8) // (NV_PGRAPH_PRI_GPC3_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e980, 0x51e9b8) // (NV_PGRAPH_PRI_GPC3_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e9c0, 0x51e9e8) // (NV_PGRAPH_PRI_GPC3_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e9f0, 0x51e9f8) // (NV_PGRAPH_PRI_GPC3_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x524180, 0x5241b8) // (NV_PGRAPH_PRI_GPC4_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC4_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5241c0, 0x5241e8) // (NV_PGRAPH_PRI_GPC4_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC4_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5241f0, 0x5241f8) // (NV_PGRAPH_PRI_GPC4_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC4_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x524980, 0x5249b8) // (NV_PGRAPH_PRI_GPC4_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC4_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5249c0, 0x5249e8) // (NV_PGRAPH_PRI_GPC4_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC4_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5249f0, 0x5249f8) // (NV_PGRAPH_PRI_GPC4_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC4_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x525180, 0x5251b8) // (NV_PGRAPH_PRI_GPC4_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC4_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5251c0, 0x5251e8) // (NV_PGRAPH_PRI_GPC4_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC4_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5251f0, 0x5251f8) // (NV_PGRAPH_PRI_GPC4_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC4_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x525980, 0x5259b8) // (NV_PGRAPH_PRI_GPC4_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC4_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5259c0, 0x5259e8) // (NV_PGRAPH_PRI_GPC4_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC4_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5259f0, 0x5259f8) // (NV_PGRAPH_PRI_GPC4_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC4_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x526180, 0x5261b8) // (NV_PGRAPH_PRI_GPC4_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC4_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5261c0, 0x5261e8) // (NV_PGRAPH_PRI_GPC4_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC4_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5261f0, 0x5261f8) // (NV_PGRAPH_PRI_GPC4_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC4_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x526980, 0x5269b8) // (NV_PGRAPH_PRI_GPC4_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC4_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5269c0, 0x5269e8) // (NV_PGRAPH_PRI_GPC4_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC4_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5269f0, 0x5269f8) // (NV_PGRAPH_PRI_GPC4_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC4_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52c180, 0x52c1b8) // (NV_PGRAPH_PRI_GPC5_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC5_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52c1c0, 0x52c1e8) // (NV_PGRAPH_PRI_GPC5_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC5_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52c1f0, 0x52c1f8) // (NV_PGRAPH_PRI_GPC5_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC5_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52c980, 0x52c9b8) // (NV_PGRAPH_PRI_GPC5_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC5_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52c9c0, 0x52c9e8) // (NV_PGRAPH_PRI_GPC5_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC5_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52c9f0, 0x52c9f8) // (NV_PGRAPH_PRI_GPC5_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC5_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52d180, 0x52d1b8) // (NV_PGRAPH_PRI_GPC5_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC5_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52d1c0, 0x52d1e8) // (NV_PGRAPH_PRI_GPC5_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC5_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52d1f0, 0x52d1f8) // (NV_PGRAPH_PRI_GPC5_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC5_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52d980, 0x52d9b8) // (NV_PGRAPH_PRI_GPC5_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC5_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52d9c0, 0x52d9e8) // (NV_PGRAPH_PRI_GPC5_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC5_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52d9f0, 0x52d9f8) // (NV_PGRAPH_PRI_GPC5_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC5_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52e180, 0x52e1b8) // (NV_PGRAPH_PRI_GPC5_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC5_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52e1c0, 0x52e1e8) // (NV_PGRAPH_PRI_GPC5_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC5_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52e1f0, 0x52e1f8) // (NV_PGRAPH_PRI_GPC5_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC5_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52e980, 0x52e9b8) // (NV_PGRAPH_PRI_GPC5_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC5_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52e9c0, 0x52e9e8) // (NV_PGRAPH_PRI_GPC5_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC5_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x52e9f0, 0x52e9f8) // (NV_PGRAPH_PRI_GPC5_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC5_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x534180, 0x5341b8) // (NV_PGRAPH_PRI_GPC6_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC6_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5341c0, 0x5341e8) // (NV_PGRAPH_PRI_GPC6_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC6_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5341f0, 0x5341f8) // (NV_PGRAPH_PRI_GPC6_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC6_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x534980, 0x5349b8) // (NV_PGRAPH_PRI_GPC6_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC6_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5349c0, 0x5349e8) // (NV_PGRAPH_PRI_GPC6_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC6_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5349f0, 0x5349f8) // (NV_PGRAPH_PRI_GPC6_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC6_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x535180, 0x5351b8) // (NV_PGRAPH_PRI_GPC6_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC6_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5351c0, 0x5351e8) // (NV_PGRAPH_PRI_GPC6_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC6_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5351f0, 0x5351f8) // (NV_PGRAPH_PRI_GPC6_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC6_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x535980, 0x5359b8) // (NV_PGRAPH_PRI_GPC6_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC6_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5359c0, 0x5359e8) // (NV_PGRAPH_PRI_GPC6_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC6_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5359f0, 0x5359f8) // (NV_PGRAPH_PRI_GPC6_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC6_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x536180, 0x5361b8) // (NV_PGRAPH_PRI_GPC6_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC6_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5361c0, 0x5361e8) // (NV_PGRAPH_PRI_GPC6_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC6_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5361f0, 0x5361f8) // (NV_PGRAPH_PRI_GPC6_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC6_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x536980, 0x5369b8) // (NV_PGRAPH_PRI_GPC6_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC6_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5369c0, 0x5369e8) // (NV_PGRAPH_PRI_GPC6_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC6_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5369f0, 0x5369f8) // (NV_PGRAPH_PRI_GPC6_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC6_TPC5_CAU_TRIG_STATE(1))
|
|
#endif
|
|
#ifdef CAU_OUTER_UNICAST_HALF
|
|
ACCESS_MAP_REGISTER_RANGE(0x504180, 0x5041b8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5041c0, 0x5041e8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5041f0, 0x5041f8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x504980, 0x5049b8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5049c0, 0x5049e8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5049f0, 0x5049f8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x505180, 0x5051b8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5051c0, 0x5051e8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5051f0, 0x5051f8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x505980, 0x5059b8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5059c0, 0x5059e8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5059f0, 0x5059f8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x506180, 0x5061b8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5061c0, 0x5061e8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5061f0, 0x5061f8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x506980, 0x5069b8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5069c0, 0x5069e8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5069f0, 0x5069f8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c180, 0x50c1b8) // (NV_PGRAPH_PRI_GPC1_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c1c0, 0x50c1e8) // (NV_PGRAPH_PRI_GPC1_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c1f0, 0x50c1f8) // (NV_PGRAPH_PRI_GPC1_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c980, 0x50c9b8) // (NV_PGRAPH_PRI_GPC1_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c9c0, 0x50c9e8) // (NV_PGRAPH_PRI_GPC1_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c9f0, 0x50c9f8) // (NV_PGRAPH_PRI_GPC1_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d180, 0x50d1b8) // (NV_PGRAPH_PRI_GPC1_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d1c0, 0x50d1e8) // (NV_PGRAPH_PRI_GPC1_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d1f0, 0x50d1f8) // (NV_PGRAPH_PRI_GPC1_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d980, 0x50d9b8) // (NV_PGRAPH_PRI_GPC1_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d9c0, 0x50d9e8) // (NV_PGRAPH_PRI_GPC1_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d9f0, 0x50d9f8) // (NV_PGRAPH_PRI_GPC1_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e180, 0x50e1b8) // (NV_PGRAPH_PRI_GPC1_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e1c0, 0x50e1e8) // (NV_PGRAPH_PRI_GPC1_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e1f0, 0x50e1f8) // (NV_PGRAPH_PRI_GPC1_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e980, 0x50e9b8) // (NV_PGRAPH_PRI_GPC1_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e9c0, 0x50e9e8) // (NV_PGRAPH_PRI_GPC1_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e9f0, 0x50e9f8) // (NV_PGRAPH_PRI_GPC1_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x514180, 0x5141b8) // (NV_PGRAPH_PRI_GPC2_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5141c0, 0x5141e8) // (NV_PGRAPH_PRI_GPC2_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5141f0, 0x5141f8) // (NV_PGRAPH_PRI_GPC2_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x514980, 0x5149b8) // (NV_PGRAPH_PRI_GPC2_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5149c0, 0x5149e8) // (NV_PGRAPH_PRI_GPC2_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5149f0, 0x5149f8) // (NV_PGRAPH_PRI_GPC2_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x515180, 0x5151b8) // (NV_PGRAPH_PRI_GPC2_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5151c0, 0x5151e8) // (NV_PGRAPH_PRI_GPC2_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5151f0, 0x5151f8) // (NV_PGRAPH_PRI_GPC2_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x515980, 0x5159b8) // (NV_PGRAPH_PRI_GPC2_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5159c0, 0x5159e8) // (NV_PGRAPH_PRI_GPC2_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5159f0, 0x5159f8) // (NV_PGRAPH_PRI_GPC2_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x516180, 0x5161b8) // (NV_PGRAPH_PRI_GPC2_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5161c0, 0x5161e8) // (NV_PGRAPH_PRI_GPC2_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5161f0, 0x5161f8) // (NV_PGRAPH_PRI_GPC2_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x516980, 0x5169b8) // (NV_PGRAPH_PRI_GPC2_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5169c0, 0x5169e8) // (NV_PGRAPH_PRI_GPC2_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5169f0, 0x5169f8) // (NV_PGRAPH_PRI_GPC2_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c180, 0x51c1b8) // (NV_PGRAPH_PRI_GPC3_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c1c0, 0x51c1e8) // (NV_PGRAPH_PRI_GPC3_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c1f0, 0x51c1f8) // (NV_PGRAPH_PRI_GPC3_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c980, 0x51c9b8) // (NV_PGRAPH_PRI_GPC3_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c9c0, 0x51c9e8) // (NV_PGRAPH_PRI_GPC3_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51c9f0, 0x51c9f8) // (NV_PGRAPH_PRI_GPC3_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d180, 0x51d1b8) // (NV_PGRAPH_PRI_GPC3_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d1c0, 0x51d1e8) // (NV_PGRAPH_PRI_GPC3_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d1f0, 0x51d1f8) // (NV_PGRAPH_PRI_GPC3_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d980, 0x51d9b8) // (NV_PGRAPH_PRI_GPC3_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d9c0, 0x51d9e8) // (NV_PGRAPH_PRI_GPC3_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51d9f0, 0x51d9f8) // (NV_PGRAPH_PRI_GPC3_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e180, 0x51e1b8) // (NV_PGRAPH_PRI_GPC3_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e1c0, 0x51e1e8) // (NV_PGRAPH_PRI_GPC3_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e1f0, 0x51e1f8) // (NV_PGRAPH_PRI_GPC3_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e980, 0x51e9b8) // (NV_PGRAPH_PRI_GPC3_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e9c0, 0x51e9e8) // (NV_PGRAPH_PRI_GPC3_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x51e9f0, 0x51e9f8) // (NV_PGRAPH_PRI_GPC3_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPC5_CAU_TRIG_STATE(1))
|
|
#endif
|
|
#ifdef CAU_OUTER_UNICAST_QUARTER
|
|
ACCESS_MAP_REGISTER_RANGE(0x504180, 0x5041b8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5041c0, 0x5041e8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5041f0, 0x5041f8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x504980, 0x5049b8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5049c0, 0x5049e8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5049f0, 0x5049f8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x505180, 0x5051b8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5051c0, 0x5051e8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5051f0, 0x5051f8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x505980, 0x5059b8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5059c0, 0x5059e8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5059f0, 0x5059f8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x506180, 0x5061b8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5061c0, 0x5061e8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5061f0, 0x5061f8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x506980, 0x5069b8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5069c0, 0x5069e8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5069f0, 0x5069f8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c180, 0x50c1b8) // (NV_PGRAPH_PRI_GPC1_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c1c0, 0x50c1e8) // (NV_PGRAPH_PRI_GPC1_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c1f0, 0x50c1f8) // (NV_PGRAPH_PRI_GPC1_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c980, 0x50c9b8) // (NV_PGRAPH_PRI_GPC1_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c9c0, 0x50c9e8) // (NV_PGRAPH_PRI_GPC1_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50c9f0, 0x50c9f8) // (NV_PGRAPH_PRI_GPC1_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d180, 0x50d1b8) // (NV_PGRAPH_PRI_GPC1_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d1c0, 0x50d1e8) // (NV_PGRAPH_PRI_GPC1_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d1f0, 0x50d1f8) // (NV_PGRAPH_PRI_GPC1_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d980, 0x50d9b8) // (NV_PGRAPH_PRI_GPC1_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d9c0, 0x50d9e8) // (NV_PGRAPH_PRI_GPC1_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50d9f0, 0x50d9f8) // (NV_PGRAPH_PRI_GPC1_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e180, 0x50e1b8) // (NV_PGRAPH_PRI_GPC1_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e1c0, 0x50e1e8) // (NV_PGRAPH_PRI_GPC1_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e1f0, 0x50e1f8) // (NV_PGRAPH_PRI_GPC1_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e980, 0x50e9b8) // (NV_PGRAPH_PRI_GPC1_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e9c0, 0x50e9e8) // (NV_PGRAPH_PRI_GPC1_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x50e9f0, 0x50e9f8) // (NV_PGRAPH_PRI_GPC1_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPC5_CAU_TRIG_STATE(1))
|
|
#endif
|
|
#ifdef CAU_OUTER_UNICAST_EIGHTH
|
|
ACCESS_MAP_REGISTER_RANGE(0x504180, 0x5041b8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5041c0, 0x5041e8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5041f0, 0x5041f8) // (NV_PGRAPH_PRI_GPC0_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x504980, 0x5049b8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5049c0, 0x5049e8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5049f0, 0x5049f8) // (NV_PGRAPH_PRI_GPC0_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x505180, 0x5051b8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5051c0, 0x5051e8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5051f0, 0x5051f8) // (NV_PGRAPH_PRI_GPC0_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x505980, 0x5059b8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5059c0, 0x5059e8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5059f0, 0x5059f8) // (NV_PGRAPH_PRI_GPC0_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x506180, 0x5061b8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5061c0, 0x5061e8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5061f0, 0x5061f8) // (NV_PGRAPH_PRI_GPC0_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x506980, 0x5069b8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5069c0, 0x5069e8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5069f0, 0x5069f8) // (NV_PGRAPH_PRI_GPC0_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPC5_CAU_TRIG_STATE(1))
|
|
#endif
|
|
|
|
#ifdef CAU_OUTER_BROADCAST_FULL
|
|
ACCESS_MAP_REGISTER_RANGE(0x419980, 0x4199b8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x4199c0, 0x4199e8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x4199f0, 0x4199f8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c180, 0x41c1b8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c1c0, 0x41c1e8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c1f0, 0x41c1f8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c980, 0x41c9b8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c9c0, 0x41c9e8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c9f0, 0x41c9f8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d180, 0x41d1b8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d1c0, 0x41d1e8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d1f0, 0x41d1f8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d980, 0x41d9b8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d9c0, 0x41d9e8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d9f0, 0x41d9f8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e180, 0x41e1b8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e1c0, 0x41e1e8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e1f0, 0x41e1f8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e980, 0x41e9b8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e9c0, 0x41e9e8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e9f0, 0x41e9f8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x501980, 0x5019b8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5019c0, 0x5019e8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5019f0, 0x5019f8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x509980, 0x5099b8) // (NV_PGRAPH_PRI_GPC1_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5099c0, 0x5099e8) // (NV_PGRAPH_PRI_GPC1_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5099f0, 0x5099f8) // (NV_PGRAPH_PRI_GPC1_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x511980, 0x5119b8) // (NV_PGRAPH_PRI_GPC2_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5119c0, 0x5119e8) // (NV_PGRAPH_PRI_GPC2_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5119f0, 0x5119f8) // (NV_PGRAPH_PRI_GPC2_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x519980, 0x5199b8) // (NV_PGRAPH_PRI_GPC3_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5199c0, 0x5199e8) // (NV_PGRAPH_PRI_GPC3_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5199f0, 0x5199f8) // (NV_PGRAPH_PRI_GPC3_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x521980, 0x5219b8) // (NV_PGRAPH_PRI_GPC4_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC4_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5219c0, 0x5219e8) // (NV_PGRAPH_PRI_GPC4_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC4_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5219f0, 0x5219f8) // (NV_PGRAPH_PRI_GPC4_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC4_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x529980, 0x5299b8) // (NV_PGRAPH_PRI_GPC5_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC5_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5299c0, 0x5299e8) // (NV_PGRAPH_PRI_GPC5_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC5_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5299f0, 0x5299f8) // (NV_PGRAPH_PRI_GPC5_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC5_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x531980, 0x5319b8) // (NV_PGRAPH_PRI_GPC6_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC6_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5319c0, 0x5319e8) // (NV_PGRAPH_PRI_GPC6_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC6_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5319f0, 0x5319f8) // (NV_PGRAPH_PRI_GPC6_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC6_TPCS_CAU_TRIG_STATE(1))
|
|
#endif
|
|
#ifdef CAU_OUTER_BROADCAST_HALF
|
|
ACCESS_MAP_REGISTER_RANGE(0x419980, 0x4199b8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x4199c0, 0x4199e8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x4199f0, 0x4199f8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c180, 0x41c1b8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c1c0, 0x41c1e8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c1f0, 0x41c1f8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c980, 0x41c9b8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c9c0, 0x41c9e8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c9f0, 0x41c9f8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d180, 0x41d1b8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d1c0, 0x41d1e8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d1f0, 0x41d1f8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d980, 0x41d9b8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d9c0, 0x41d9e8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d9f0, 0x41d9f8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e180, 0x41e1b8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e1c0, 0x41e1e8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e1f0, 0x41e1f8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e980, 0x41e9b8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e9c0, 0x41e9e8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e9f0, 0x41e9f8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x501980, 0x5019b8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5019c0, 0x5019e8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5019f0, 0x5019f8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x509980, 0x5099b8) // (NV_PGRAPH_PRI_GPC1_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5099c0, 0x5099e8) // (NV_PGRAPH_PRI_GPC1_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5099f0, 0x5099f8) // (NV_PGRAPH_PRI_GPC1_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x511980, 0x5119b8) // (NV_PGRAPH_PRI_GPC2_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC2_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5119c0, 0x5119e8) // (NV_PGRAPH_PRI_GPC2_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC2_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5119f0, 0x5119f8) // (NV_PGRAPH_PRI_GPC2_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC2_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x519980, 0x5199b8) // (NV_PGRAPH_PRI_GPC3_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC3_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5199c0, 0x5199e8) // (NV_PGRAPH_PRI_GPC3_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC3_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5199f0, 0x5199f8) // (NV_PGRAPH_PRI_GPC3_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC3_TPCS_CAU_TRIG_STATE(1))
|
|
#endif
|
|
#ifdef CAU_OUTER_BROADCAST_QUARTER
|
|
ACCESS_MAP_REGISTER_RANGE(0x419980, 0x4199b8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x4199c0, 0x4199e8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x4199f0, 0x4199f8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c180, 0x41c1b8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c1c0, 0x41c1e8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c1f0, 0x41c1f8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c980, 0x41c9b8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c9c0, 0x41c9e8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c9f0, 0x41c9f8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d180, 0x41d1b8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d1c0, 0x41d1e8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d1f0, 0x41d1f8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d980, 0x41d9b8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d9c0, 0x41d9e8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d9f0, 0x41d9f8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e180, 0x41e1b8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e1c0, 0x41e1e8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e1f0, 0x41e1f8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e980, 0x41e9b8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e9c0, 0x41e9e8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e9f0, 0x41e9f8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x501980, 0x5019b8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5019c0, 0x5019e8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5019f0, 0x5019f8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x509980, 0x5099b8) // (NV_PGRAPH_PRI_GPC1_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC1_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5099c0, 0x5099e8) // (NV_PGRAPH_PRI_GPC1_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC1_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5099f0, 0x5099f8) // (NV_PGRAPH_PRI_GPC1_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC1_TPCS_CAU_TRIG_STATE(1))
|
|
#endif
|
|
#ifdef CAU_OUTER_BROADCAST_EIGHTH
|
|
ACCESS_MAP_REGISTER_RANGE(0x419980, 0x4199b8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x4199c0, 0x4199e8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x4199f0, 0x4199f8) // (NV_PGRAPH_PRI_GPCS_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPCS_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c180, 0x41c1b8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC0_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c1c0, 0x41c1e8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC0_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c1f0, 0x41c1f8) // (NV_PGRAPH_PRI_GPCS_TPC0_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC0_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c980, 0x41c9b8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC1_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c9c0, 0x41c9e8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC1_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41c9f0, 0x41c9f8) // (NV_PGRAPH_PRI_GPCS_TPC1_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC1_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d180, 0x41d1b8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC2_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d1c0, 0x41d1e8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC2_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d1f0, 0x41d1f8) // (NV_PGRAPH_PRI_GPCS_TPC2_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC2_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d980, 0x41d9b8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC3_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d9c0, 0x41d9e8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC3_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41d9f0, 0x41d9f8) // (NV_PGRAPH_PRI_GPCS_TPC3_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC3_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e180, 0x41e1b8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC4_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e1c0, 0x41e1e8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC4_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e1f0, 0x41e1f8) // (NV_PGRAPH_PRI_GPCS_TPC4_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC4_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e980, 0x41e9b8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_CONTROL(0), NV_PGRAPH_PRI_GPCS_TPC5_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e9c0, 0x41e9e8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_CONTROL(1), NV_PGRAPH_PRI_GPCS_TPC5_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x41e9f0, 0x41e9f8) // (NV_PGRAPH_PRI_GPCS_TPC5_CAU_DEBUG(1), NV_PGRAPH_PRI_GPCS_TPC5_CAU_TRIG_STATE(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x501980, 0x5019b8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_CONTROL(0), NV_PGRAPH_PRI_GPC0_TPCS_CAU_TRIG_STATE(0))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5019c0, 0x5019e8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_CONTROL(1), NV_PGRAPH_PRI_GPC0_TPCS_CAU_DATA_GEN(1))
|
|
ACCESS_MAP_REGISTER_RANGE(0x5019f0, 0x5019f8) // (NV_PGRAPH_PRI_GPC0_TPCS_CAU_DEBUG(1), NV_PGRAPH_PRI_GPC0_TPCS_CAU_TRIG_STATE(1))
|
|
#endif
|
|
|