/* _NVRM_COPYRIGHT_BEGIN_ * * Copyright 2003-2016 by NVIDIA Corporation. All rights reserved. All * information contained herein is proprietary and confidential to NVIDIA * Corporation. Any use, reproduction, or disclosure without the written * permission of NVIDIA Corporation is prohibited. * * _NVRM_COPYRIGHT_END_ */ #ifndef __ga102_dev_host_h__ #define __ga102_dev_host_h__ /* This file is autogenerated. Do not edit */ #define NV_PJTAG 0x0000CBFF:0x0000C800 /* RW--D */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK 0x0000C840 /* RWI4R */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWIUF */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_DEFAULT_PRIV_LEVEL 0x0000000F /* RWI-V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RW--V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWIUF */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "pjtag_access" /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F/* RWI-V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLED_FUSE1 0x00000008/* RW--V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RW--V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWIUF */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWI-V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWIUF */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWI-V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWIUF */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWI-V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWIUF */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWI-V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWIUF */ #define NV_PJTAG_ACCESS_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWI-V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK 0x0000C848 /* RWI4R */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWIUF */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_DEFAULT_PRIV_LEVEL 0x0000000F /* RWI-V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RW--V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWIUF */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_DEFAULT_PRIV_LEVEL 0x00000008 /* RWI-V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RW--V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWIUF */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWI-V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWIUF */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWI-V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWIUF */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWI-V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWIUF */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWI-V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWIUF */ #define NV_PJTAG_ACCESS_SEC_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWI-V */ #define NV_PJTAG_ACCESS_CTRL 0x0000C800 /* RW-4R */ #define NV_PJTAG_ACCESS_CTRL_INSTR_ID 7:0 /* RW-UF */ #define NV_PJTAG_ACCESS_CTRL_REG_LENGTH 18:8 /* RW-UF */ #define NV_PJTAG_ACCESS_CTRL_DWORD_EN 24:19 /* RW-UF */ #define NV_PJTAG_ACCESS_CTRL_CLUSTER_SEL 29:25 /* RW-UF */ #define NV_PJTAG_ACCESS_CTRL_CTRL_STATUS 30:30 /* RW-UF */ #define NV_PJTAG_ACCESS_CTRL_REQ_CTRL 31:31 /* RW-UF */ #define NV_PJTAG_ACCESS_DATA 0x0000C804 /* RW-4R */ #define NV_PJTAG_ACCESS_DATA_VALUE 31:0 /* RW-UF */ #define NV_PJTAG_ACCESS_MASK 0x0000C80C /* RW-4R */ #define NV_PJTAG_ACCESS_MASK_VALUE 31:0 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG 0x0000C808 /* RW-4R */ #define NV_PJTAG_ACCESS_CONFIG_REG_LENGTH 7:0 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_DWORD_EN 15:8 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_BURST 16:16 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_READ_WRITE 17:17 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_LAST_CLUSTER_INV 18:18 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_SPARE 19:19 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_UPDT_DIS 20:20 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_CAPT_DIS 21:21 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_CLUSTER_SEL 24:22 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_SHFT_DIS 25:25 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_AUTO_DWORD_INCR 26:26 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_BURST_WRITE 27:27 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG_SPARE_BITS 31:28 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG2 0x0000C810 /* RW-4R */ #define NV_PJTAG_ACCESS_CONFIG2_PIPELINE_SHFT_DIS 0:0 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG2_FLIP_BITS 1:1 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG2_PAUSE_CYCLES 4:2 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG2_SPARE_BITS 28:5 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG2_HOST_CONTROL_ERROR 29:29 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG2_BURST_READ_WARNING 30:30 /* RW-UF */ #define NV_PJTAG_ACCESS_CONFIG2_BURST_READ_ERROR 31:31 /* RW-UF */ #define NV_PJTAG_ACCESS_CTRL__PRIV_LEVEL_MASK 0x0000C840 /* */ #define NV_PJTAG_ACCESS_DATA__PRIV_LEVEL_MASK 0x0000C840 /* */ #define NV_PJTAG_ACCESS_MASK__PRIV_LEVEL_MASK 0x0000C840 /* */ #define NV_PJTAG_ACCESS_CONFIG__PRIV_LEVEL_MASK 0x0000C840 /* */ #define NV_PJTAG_ACCESS_CONFIG2__PRIV_LEVEL_MASK 0x0000C840 /* */ #define NV_PJTAG_ACCESS_SEC 0x0000C844 /* RWI4R */ #define NV_PJTAG_ACCESS_SEC__PRIV_LEVEL_MASK 0x0000C848 /* */ #define NV_PJTAG_ACCESS_SEC_SHA2_EN 0:0 /* RWIUF */ #define NV_PJTAG_ACCESS_SEC_SHA2_EN_DISABLED 0x0 /* RWI-V */ #define NV_PJTAG_ACCESS_SEC_SHA2_EN_ENABLED 0x1 /* RW--V */ #define NV_PJTAG_ACCESS_SEC_MODE 4:4 /* R-IUF */ #define NV_PJTAG_ACCESS_SEC_MODE_ISM_ONLY 0x1 /* R-I-V */ #define NV_PJTAG_ACCESS_SEC_MODE_STANDARD 0x0 /* R---V */ #define NV_PJTAG_ACCESS_SEC_SWITCH_TO_ISM_ONLY 5:5 /* RWIUF */ #define NV_PJTAG_ACCESS_SEC_SWITCH_TO_ISM_ONLY_REQ 0x1 /* -W--T */ #define NV_PJTAG_ACCESS_SEC_SWITCH_TO_ISM_ONLY_IDLE 0x0 /* RWI-V */ #define NV_PJTAG_ACCESS_SEC_SWITCH_TO_STANDARD 6:6 /* RWIUF */ #define NV_PJTAG_ACCESS_SEC_SWITCH_TO_STANDARD_REQ 0x1 /* -W--T */ #define NV_PJTAG_ACCESS_SEC_SWITCH_TO_STANDARD_IDLE 0x0 /* RWI-V */ #endif // __ga102_dev_host_h__