/* _NVRM_COPYRIGHT_BEGIN_ * * Copyright 2003-2016 by NVIDIA Corporation. All rights reserved. All * information contained herein is proprietary and confidential to NVIDIA * Corporation. Any use, reproduction, or disclosure without the written * permission of NVIDIA Corporation is prohibited. * * _NVRM_COPYRIGHT_END_ */ #ifndef __ga102_dev_xbar_h__ #define __ga102_dev_xbar_h__ /* This file is autogenerated. Do not edit */ #define NV_XBAR 0x13EFFF:0x13B000 /* RW--D */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0 0x0013C87F:0x0013C800 /* RW--D */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG 0x0013C820 /* RWE4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_IDLE_CG_DLY_CNT 5:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_IDLE_CG_DLY_CNT__PROD 0x0000000A /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_IDLE_CG_EN 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STALL_CG_EN 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_WAKEUP_DLY_CNT 19:16 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_WAKEUP_DLY_CNT__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_SLEEP_DLY_CNT 23:20 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_SLEEP_DLY_CNT_HWINIT 0x00000000 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_SLEEP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG1 0x0013C824 /* RWE4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG1_MONITOR_CG_EN 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG1_SLCG 30:1 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG1_SLCG_DISABLED 0x3FFFFFFF /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK 0x0013C844 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "ba" /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED_FUSE1 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BLK_ACTIVITY_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK 0x0013C848 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_pm" /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK 0x0013C83C /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_cya" /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED_FUSE1 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_DBI_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK 0x0013C84C /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_cya" /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_REQ_BUS 0x0013C800 /* R--4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_REQ_BUS__PRIV_LEVEL_MASK 0x0013C848 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_REQ_BUS_DATA 15:0 /* R-EVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_REQ_BUS_DATA_INIT 0x0 /* R-E-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_RSP_BUS 0x0013C804 /* R--4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_RSP_BUS__PRIV_LEVEL_MASK 0x0013C848 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_RSP_BUS_DATA 15:0 /* R-EVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_PM_RSP_BUS_DATA_INIT 0x0 /* R-E-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL 0x0013C808 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL__PRIV_LEVEL_MASK 0x0013C848 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_ENABLE 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_ENABLE_OFF 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2 18:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_STATIC_PATTERN_AAAA_16_GROUP_0 0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1 1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_2 2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_3 3 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_4 4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_5 5 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_6 6 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_7 7 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_8 8 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_9 9 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_10 10 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_11 11 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_12 12 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_13 13 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_14 14 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_15 15 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_16 16 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_17 17 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_18 18 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_19 19 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_20 20 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_21 21 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_22 22 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_23 23 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_24 24 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_25 25 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_26 26 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_27 27 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_28 28 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_29 29 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_30 30 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_31 31 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_32 32 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_33 33 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_34 34 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_35 35 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_36 36 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_37 37 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_38 38 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_39 39 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_40 40 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_41 41 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_42 42 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_43 43 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_44 44 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_45 45 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_46 46 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_47 47 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_48 48 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_49 49 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_50 50 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_51 51 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_52 52 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_53 53 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_54 54 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_55 55 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_56 56 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_57 57 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_58 58 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_59 59 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_60 60 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_61 61 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_62 62 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_63 63 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_64 64 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_65 65 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_66 66 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_67 67 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_68 68 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_69 69 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_70 70 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_71 71 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_72 72 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_73 73 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_74 74 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_75 75 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_76 76 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_77 77 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_78 78 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_79 79 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_80 80 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_81 81 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_82 82 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_83 83 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_84 84 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_85 85 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_86 86 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_87 87 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_88 88 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_89 89 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_90 90 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_91 91 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_92 92 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_93 93 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_94 94 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_95 95 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_96 96 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_97 97 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_98 98 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_99 99 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_100 100 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_101 101 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_102 102 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_103 103 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_104 104 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_105 105 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_106 106 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_107 107 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_108 108 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_109 109 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_110 110 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_111 111 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_112 112 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_113 113 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_114 114 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_115 115 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_116 116 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_117 117 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_118 118 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_119 119 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_120 120 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_121 121 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_122 122 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_123 123 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_124 124 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_125 125 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_126 126 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_127 127 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_128 128 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_129 129 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_130 130 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_131 131 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_132 132 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_133 133 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_134 134 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_135 135 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_136 136 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_137 137 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_138 138 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_139 139 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_140 140 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_141 141 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_142 142 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_143 143 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_144 144 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_145 145 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_146 146 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_147 147 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_148 148 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_149 149 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_150 150 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_151 151 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_152 152 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_153 153 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_154 154 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_155 155 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_156 156 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_157 157 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_158 158 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_159 159 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_160 160 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_161 161 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_162 162 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_163 163 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_164 164 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_165 165 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_166 166 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_167 167 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_168 168 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_169 169 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_170 170 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_171 171 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_172 172 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_173 173 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_174 174 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_175 175 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_176 176 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_177 177 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_178 178 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_179 179 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_180 180 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_181 181 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_182 182 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_183 183 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_184 184 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_185 185 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_186 186 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_187 187 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_188 188 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_189 189 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_190 190 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_191 191 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_192 192 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_193 193 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_194 194 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_195 195 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_196 196 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_197 197 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_198 198 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_199 199 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_200 200 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_201 201 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_202 202 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_203 203 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_204 204 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_205 205 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_206 206 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_207 207 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_208 208 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_209 209 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_210 210 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_211 211 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_212 212 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_213 213 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_214 214 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_215 215 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_216 216 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_217 217 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_218 218 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_219 219 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_220 220 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_221 221 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_222 222 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_223 223 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_224 224 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_225 225 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_226 226 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_227 227 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_228 228 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_229 229 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_230 230 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_231 231 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_232 232 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_233 233 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_234 234 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_235 235 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_236 236 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_237 237 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_238 238 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_239 239 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_240 240 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_241 241 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_242 242 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_243 243 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_244 244 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_245 245 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_246 246 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_247 247 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_248 248 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_249 249 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_250 250 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_251 251 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_252 252 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_253 253 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_254 254 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_255 255 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_256 256 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_257 257 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_258 258 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_259 259 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_260 260 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_261 261 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_262 262 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_263 263 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_264 264 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_265 265 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_266 266 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_267 267 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_268 268 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_269 269 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_270 270 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_271 271 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_272 272 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_273 273 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_274 274 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_275 275 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_276 276 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_277 277 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_278 278 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_279 279 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_280 280 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_281 281 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_282 282 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_283 283 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_284 284 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_285 285 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_286 286 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_287 287 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_288 288 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_289 289 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_290 290 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_291 291 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_292 292 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_293 293 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_294 294 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_295 295 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_296 296 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_297 297 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_298 298 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_299 299 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_300 300 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_301 301 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_302 302 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_303 303 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_304 304 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_305 305 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_306 306 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_307 307 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_308 308 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_309 309 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_310 310 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_311 311 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_312 312 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_313 313 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_314 314 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_315 315 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_316 316 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_317 317 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_318 318 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_319 319 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_320 320 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_321 321 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_322 322 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_323 323 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_324 324 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_325 325 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_326 326 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_327 327 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_328 328 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_329 329 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_330 330 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_331 331 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_332 332 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_333 333 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_334 334 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_335 335 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_336 336 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_337 337 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_338 338 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_339 339 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_340 340 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_341 341 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_342 342 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_343 343 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_344 344 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_345 345 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_346 346 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_347 347 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_348 348 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_349 349 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_350 350 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_351 351 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_352 352 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_353 353 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_354 354 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_355 355 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_356 356 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_357 357 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_358 358 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_359 359 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_360 360 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_361 361 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_362 362 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_363 363 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_364 364 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_365 365 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_366 366 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_367 367 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_368 368 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_369 369 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_370 370 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_371 371 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_372 372 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_373 373 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_374 374 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_375 375 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_376 376 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_377 377 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_378 378 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_379 379 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_380 380 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_381 381 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_382 382 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_383 383 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_384 384 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_385 385 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_386 386 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_387 387 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_388 388 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_389 389 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_390 390 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_391 391 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_392 392 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_393 393 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_394 394 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_395 395 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_396 396 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_397 397 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_398 398 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_399 399 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_400 400 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_401 401 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_402 402 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_403 403 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_404 404 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_405 405 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_406 406 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_407 407 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_408 408 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_409 409 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_410 410 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_411 411 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_412 412 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_413 413 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_414 414 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_415 415 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_416 416 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_417 417 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_418 418 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_419 419 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_420 420 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_421 421 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_422 422 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_423 423 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_424 424 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_425 425 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_426 426 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_427 427 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_428 428 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_429 429 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_430 430 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_431 431 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_432 432 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_433 433 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_434 434 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_435 435 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_436 436 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_437 437 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_438 438 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_439 439 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_440 440 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_441 441 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_442 442 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_443 443 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_444 444 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_445 445 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_446 446 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_447 447 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_448 448 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_449 449 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_450 450 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_451 451 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_452 452 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_453 453 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_454 454 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_455 455 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_456 456 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_457 457 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_458 458 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_459 459 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_460 460 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_461 461 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_462 462 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_463 463 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_464 464 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_465 465 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_466 466 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_467 467 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_468 468 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_469 469 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_470 470 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_471 471 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_472 472 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_473 473 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_474 474 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_475 475 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_476 476 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_477 477 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_478 478 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_479 479 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_480 480 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_481 481 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_482 482 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_483 483 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_484 484 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_485 485 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_486 486 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_487 487 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_488 488 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_489 489 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_490 490 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_491 491 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_492 492 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_493 493 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_494 494 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_495 495 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_496 496 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_497 497 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_498 498 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_499 499 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_500 500 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_501 501 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_502 502 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_503 503 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_504 504 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_505 505 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_506 506 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_507 507 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_508 508 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_509 509 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_510 510 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_511 511 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_512 512 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_513 513 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_514 514 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_515 515 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_516 516 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_517 517 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_518 518 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_519 519 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_520 520 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_521 521 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_522 522 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_523 523 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_524 524 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_525 525 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_526 526 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_527 527 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_528 528 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_529 529 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_530 530 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_531 531 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_532 532 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_533 533 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_534 534 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_535 535 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_536 536 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_537 537 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_538 538 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_539 539 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_540 540 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_541 541 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_542 542 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_543 543 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_544 544 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_545 545 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_546 546 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_547 547 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_548 548 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_549 549 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_550 550 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_551 551 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_552 552 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_553 553 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_554 554 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_555 555 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_556 556 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_557 557 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_558 558 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_559 559 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_560 560 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_561 561 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_562 562 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_563 563 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_564 564 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_565 565 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_566 566 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_567 567 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_568 568 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_569 569 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_570 570 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_571 571 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_572 572 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_573 573 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_574 574 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_575 575 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_576 576 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_577 577 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_578 578 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_579 579 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_580 580 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_581 581 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_582 582 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_583 583 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_584 584 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_585 585 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_586 586 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_587 587 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_588 588 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_589 589 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_590 590 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_591 591 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_592 592 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_593 593 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_594 594 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_595 595 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_596 596 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_597 597 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_598 598 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_599 599 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_600 600 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_601 601 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_602 602 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_603 603 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_604 604 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_605 605 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_606 606 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_607 607 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_608 608 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_609 609 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_610 610 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_611 611 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_612 612 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_613 613 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_614 614 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_615 615 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_616 616 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_617 617 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_618 618 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_619 619 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_620 620 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_621 621 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_622 622 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_623 623 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_624 624 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_625 625 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_626 626 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_627 627 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_628 628 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_629 629 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_630 630 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_631 631 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_632 632 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_633 633 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_634 634 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_635 635 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_636 636 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_637 637 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_638 638 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_639 639 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_640 640 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_641 641 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_642 642 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_643 643 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_644 644 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_645 645 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_646 646 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_647 647 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_648 648 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_649 649 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_650 650 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_651 651 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_652 652 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_653 653 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_654 654 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_655 655 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_656 656 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_657 657 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_658 658 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_659 659 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_660 660 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_661 661 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_662 662 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_663 663 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_664 664 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_665 665 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_666 666 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_667 667 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_668 668 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_669 669 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_670 670 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_671 671 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_672 672 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_673 673 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_674 674 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_675 675 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_676 676 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_677 677 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_678 678 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_679 679 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_680 680 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_681 681 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_682 682 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_683 683 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_684 684 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_685 685 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_686 686 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_687 687 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_688 688 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_689 689 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_690 690 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_691 691 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_692 692 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_693 693 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_694 694 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_695 695 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_696 696 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_697 697 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_698 698 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_699 699 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_700 700 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_701 701 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_702 702 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_703 703 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_704 704 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_705 705 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_706 706 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_707 707 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_708 708 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_709 709 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_710 710 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_711 711 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_712 712 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_713 713 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_714 714 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_715 715 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_716 716 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_717 717 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_718 718 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_719 719 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_720 720 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_721 721 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_722 722 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_723 723 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_724 724 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_725 725 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_726 726 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_727 727 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_728 728 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_729 729 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_730 730 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_731 731 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_732 732 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_733 733 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_734 734 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_735 735 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_736 736 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_737 737 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_738 738 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_739 739 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_740 740 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_741 741 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_742 742 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_743 743 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_744 744 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_745 745 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_746 746 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_747 747 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_748 748 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_749 749 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_750 750 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_751 751 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_752 752 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_753 753 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_754 754 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_755 755 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_756 756 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_757 757 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_758 758 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_759 759 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_760 760 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_761 761 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_762 762 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_763 763 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_764 764 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_765 765 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_766 766 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_767 767 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_768 768 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_769 769 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_770 770 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_771 771 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_772 772 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_773 773 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_774 774 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_775 775 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_776 776 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_777 777 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_778 778 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_779 779 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_780 780 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_781 781 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_782 782 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_783 783 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_784 784 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_785 785 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_786 786 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_787 787 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_788 788 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_789 789 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_790 790 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_791 791 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_792 792 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_793 793 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_794 794 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_795 795 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_796 796 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_797 797 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_798 798 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_799 799 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_800 800 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_801 801 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_802 802 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_803 803 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_804 804 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_805 805 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_806 806 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_807 807 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_808 808 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_809 809 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_810 810 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_811 811 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_812 812 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_813 813 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_814 814 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_815 815 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_816 816 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_817 817 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_818 818 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_819 819 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_820 820 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_821 821 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_822 822 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_823 823 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_824 824 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_825 825 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_826 826 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_827 827 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_828 828 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_829 829 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_830 830 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_831 831 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_832 832 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_833 833 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_834 834 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_835 835 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_836 836 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_837 837 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_838 838 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_839 839 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_840 840 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_841 841 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_842 842 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_843 843 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_844 844 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_845 845 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_846 846 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_847 847 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_848 848 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_849 849 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_850 850 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_851 851 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_852 852 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_853 853 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_854 854 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_855 855 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_856 856 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_857 857 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_858 858 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_859 859 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_860 860 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_861 861 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_862 862 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_863 863 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_864 864 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_865 865 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_866 866 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_867 867 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_868 868 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_869 869 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_870 870 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_871 871 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_872 872 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_873 873 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_874 874 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_875 875 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_876 876 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_877 877 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_878 878 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_879 879 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_880 880 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_881 881 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_882 882 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_883 883 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_884 884 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_885 885 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_886 886 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_887 887 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_888 888 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_889 889 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_890 890 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_891 891 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_892 892 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_893 893 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_894 894 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_895 895 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_896 896 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_897 897 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_898 898 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_899 899 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_900 900 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_901 901 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_902 902 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_903 903 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_904 904 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_905 905 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_906 906 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_907 907 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_908 908 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_909 909 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_910 910 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_911 911 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_912 912 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_913 913 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_914 914 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_915 915 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_916 916 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_917 917 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_918 918 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_919 919 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_920 920 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_921 921 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_922 922 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_923 923 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_924 924 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_925 925 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_926 926 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_927 927 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_928 928 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_929 929 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_930 930 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_931 931 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_932 932 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_933 933 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_934 934 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_935 935 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_936 936 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_937 937 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_938 938 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_939 939 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_940 940 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_941 941 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_942 942 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_943 943 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_944 944 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_945 945 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_946 946 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_947 947 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_948 948 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_949 949 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_950 950 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_951 951 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_952 952 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_953 953 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_954 954 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_955 955 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_956 956 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_957 957 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_958 958 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_959 959 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_960 960 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_961 961 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_962 962 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_963 963 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_964 964 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_965 965 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_966 966 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_967 967 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_968 968 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_969 969 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_970 970 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_971 971 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_972 972 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_973 973 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_974 974 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_975 975 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_976 976 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_977 977 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_978 978 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_979 979 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_980 980 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_981 981 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_982 982 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_983 983 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_984 984 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_985 985 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_986 986 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_987 987 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_988 988 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_989 989 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_990 990 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_991 991 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_992 992 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_993 993 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_994 994 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_995 995 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_996 996 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_997 997 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_998 998 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_999 999 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1000 1000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1001 1001 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1002 1002 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1003 1003 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1004 1004 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1005 1005 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1006 1006 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1007 1007 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1008 1008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1009 1009 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1010 1010 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1011 1011 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1012 1012 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1013 1013 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1014 1014 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1015 1015 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1016 1016 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1017 1017 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1018 1018 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1019 1019 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1020 1020 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1021 1021 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1022 1022 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1023 1023 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1 24:20 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_0 0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_1 1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_2 2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_3 3 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_4 4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_5 5 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_6 6 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_7 7 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_8 8 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_9 9 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_10 10 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_11 11 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_12 12 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_13 13 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_14 14 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_15 15 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_16 16 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_17 17 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_18 18 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_19 19 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE0_PM_CTRL_SEL1_NODE_20 20 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL 0x0013C80C /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL__PRIV_LEVEL_MASK 0x0013C848 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_ENABLE 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_ENABLE_OFF 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2 18:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_STATIC_PATTERN_AAAA_16_GROUP_0 0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1 1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_2 2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_3 3 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_4 4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_5 5 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_6 6 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_7 7 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_8 8 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_9 9 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_10 10 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_11 11 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_12 12 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_13 13 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_14 14 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_15 15 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_16 16 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_17 17 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_18 18 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_19 19 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_20 20 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_21 21 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_22 22 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_23 23 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_24 24 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_25 25 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_26 26 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_27 27 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_28 28 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_29 29 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_30 30 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_31 31 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_32 32 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_33 33 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_34 34 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_35 35 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_36 36 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_37 37 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_38 38 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_39 39 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_40 40 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_41 41 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_42 42 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_43 43 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_44 44 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_45 45 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_46 46 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_47 47 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_48 48 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_49 49 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_50 50 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_51 51 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_52 52 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_53 53 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_54 54 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_55 55 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_56 56 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_57 57 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_58 58 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_59 59 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_60 60 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_61 61 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_62 62 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_63 63 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_64 64 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_65 65 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_66 66 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_67 67 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_68 68 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_69 69 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_70 70 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_71 71 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_72 72 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_73 73 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_74 74 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_75 75 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_76 76 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_77 77 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_78 78 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_79 79 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_80 80 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_81 81 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_82 82 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_83 83 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_84 84 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_85 85 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_86 86 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_87 87 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_88 88 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_89 89 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_90 90 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_91 91 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_92 92 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_93 93 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_94 94 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_95 95 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_96 96 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_97 97 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_98 98 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_99 99 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_100 100 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_101 101 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_102 102 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_103 103 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_104 104 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_105 105 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_106 106 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_107 107 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_108 108 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_109 109 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_110 110 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_111 111 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_112 112 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_113 113 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_114 114 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_115 115 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_116 116 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_117 117 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_118 118 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_119 119 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_120 120 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_121 121 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_122 122 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_123 123 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_124 124 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_125 125 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_126 126 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_127 127 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_128 128 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_129 129 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_130 130 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_131 131 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_132 132 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_133 133 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_134 134 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_135 135 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_136 136 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_137 137 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_138 138 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_139 139 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_140 140 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_141 141 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_142 142 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_143 143 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_144 144 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_145 145 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_146 146 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_147 147 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_148 148 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_149 149 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_150 150 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_151 151 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_152 152 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_153 153 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_154 154 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_155 155 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_156 156 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_157 157 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_158 158 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_159 159 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_160 160 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_161 161 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_162 162 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_163 163 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_164 164 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_165 165 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_166 166 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_167 167 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_168 168 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_169 169 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_170 170 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_171 171 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_172 172 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_173 173 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_174 174 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_175 175 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_176 176 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_177 177 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_178 178 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_179 179 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_180 180 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_181 181 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_182 182 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_183 183 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_184 184 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_185 185 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_186 186 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_187 187 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_188 188 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_189 189 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_190 190 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_191 191 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_192 192 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_193 193 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_194 194 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_195 195 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_196 196 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_197 197 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_198 198 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_199 199 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_200 200 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_201 201 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_202 202 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_203 203 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_204 204 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_205 205 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_206 206 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_207 207 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_208 208 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_209 209 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_210 210 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_211 211 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_212 212 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_213 213 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_214 214 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_215 215 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_216 216 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_217 217 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_218 218 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_219 219 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_220 220 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_221 221 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_222 222 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_223 223 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_224 224 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_225 225 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_226 226 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_227 227 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_228 228 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_229 229 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_230 230 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_231 231 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_232 232 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_233 233 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_234 234 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_235 235 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_236 236 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_237 237 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_238 238 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_239 239 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_240 240 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_241 241 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_242 242 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_243 243 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_244 244 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_245 245 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_246 246 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_247 247 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_248 248 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_249 249 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_250 250 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_251 251 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_252 252 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_253 253 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_254 254 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_255 255 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_256 256 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_257 257 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_258 258 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_259 259 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_260 260 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_261 261 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_262 262 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_263 263 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_264 264 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_265 265 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_266 266 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_267 267 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_268 268 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_269 269 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_270 270 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_271 271 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_272 272 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_273 273 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_274 274 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_275 275 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_276 276 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_277 277 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_278 278 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_279 279 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_280 280 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_281 281 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_282 282 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_283 283 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_284 284 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_285 285 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_286 286 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_287 287 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_288 288 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_289 289 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_290 290 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_291 291 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_292 292 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_293 293 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_294 294 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_295 295 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_296 296 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_297 297 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_298 298 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_299 299 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_300 300 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_301 301 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_302 302 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_303 303 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_304 304 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_305 305 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_306 306 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_307 307 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_308 308 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_309 309 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_310 310 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_311 311 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_312 312 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_313 313 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_314 314 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_315 315 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_316 316 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_317 317 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_318 318 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_319 319 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_320 320 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_321 321 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_322 322 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_323 323 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_324 324 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_325 325 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_326 326 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_327 327 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_328 328 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_329 329 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_330 330 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_331 331 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_332 332 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_333 333 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_334 334 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_335 335 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_336 336 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_337 337 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_338 338 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_339 339 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_340 340 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_341 341 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_342 342 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_343 343 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_344 344 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_345 345 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_346 346 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_347 347 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_348 348 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_349 349 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_350 350 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_351 351 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_352 352 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_353 353 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_354 354 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_355 355 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_356 356 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_357 357 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_358 358 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_359 359 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_360 360 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_361 361 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_362 362 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_363 363 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_364 364 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_365 365 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_366 366 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_367 367 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_368 368 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_369 369 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_370 370 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_371 371 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_372 372 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_373 373 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_374 374 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_375 375 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_376 376 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_377 377 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_378 378 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_379 379 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_380 380 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_381 381 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_382 382 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_383 383 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_384 384 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_385 385 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_386 386 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_387 387 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_388 388 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_389 389 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_390 390 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_391 391 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_392 392 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_393 393 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_394 394 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_395 395 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_396 396 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_397 397 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_398 398 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_399 399 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_400 400 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_401 401 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_402 402 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_403 403 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_404 404 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_405 405 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_406 406 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_407 407 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_408 408 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_409 409 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_410 410 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_411 411 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_412 412 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_413 413 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_414 414 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_415 415 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_416 416 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_417 417 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_418 418 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_419 419 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_420 420 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_421 421 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_422 422 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_423 423 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_424 424 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_425 425 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_426 426 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_427 427 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_428 428 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_429 429 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_430 430 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_431 431 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_432 432 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_433 433 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_434 434 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_435 435 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_436 436 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_437 437 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_438 438 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_439 439 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_440 440 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_441 441 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_442 442 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_443 443 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_444 444 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_445 445 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_446 446 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_447 447 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_448 448 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_449 449 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_450 450 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_451 451 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_452 452 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_453 453 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_454 454 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_455 455 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_456 456 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_457 457 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_458 458 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_459 459 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_460 460 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_461 461 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_462 462 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_463 463 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_464 464 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_465 465 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_466 466 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_467 467 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_468 468 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_469 469 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_470 470 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_471 471 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_472 472 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_473 473 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_474 474 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_475 475 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_476 476 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_477 477 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_478 478 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_479 479 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_480 480 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_481 481 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_482 482 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_483 483 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_484 484 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_485 485 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_486 486 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_487 487 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_488 488 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_489 489 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_490 490 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_491 491 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_492 492 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_493 493 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_494 494 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_495 495 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_496 496 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_497 497 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_498 498 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_499 499 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_500 500 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_501 501 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_502 502 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_503 503 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_504 504 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_505 505 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_506 506 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_507 507 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_508 508 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_509 509 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_510 510 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_511 511 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_512 512 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_513 513 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_514 514 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_515 515 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_516 516 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_517 517 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_518 518 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_519 519 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_520 520 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_521 521 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_522 522 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_523 523 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_524 524 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_525 525 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_526 526 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_527 527 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_528 528 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_529 529 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_530 530 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_531 531 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_532 532 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_533 533 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_534 534 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_535 535 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_536 536 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_537 537 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_538 538 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_539 539 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_540 540 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_541 541 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_542 542 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_543 543 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_544 544 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_545 545 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_546 546 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_547 547 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_548 548 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_549 549 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_550 550 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_551 551 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_552 552 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_553 553 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_554 554 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_555 555 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_556 556 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_557 557 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_558 558 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_559 559 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_560 560 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_561 561 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_562 562 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_563 563 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_564 564 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_565 565 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_566 566 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_567 567 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_568 568 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_569 569 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_570 570 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_571 571 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_572 572 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_573 573 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_574 574 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_575 575 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_576 576 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_577 577 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_578 578 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_579 579 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_580 580 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_581 581 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_582 582 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_583 583 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_584 584 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_585 585 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_586 586 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_587 587 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_588 588 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_589 589 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_590 590 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_591 591 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_592 592 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_593 593 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_594 594 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_595 595 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_596 596 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_597 597 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_598 598 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_599 599 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_600 600 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_601 601 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_602 602 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_603 603 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_604 604 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_605 605 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_606 606 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_607 607 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_608 608 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_609 609 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_610 610 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_611 611 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_612 612 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_613 613 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_614 614 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_615 615 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_616 616 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_617 617 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_618 618 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_619 619 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_620 620 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_621 621 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_622 622 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_623 623 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_624 624 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_625 625 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_626 626 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_627 627 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_628 628 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_629 629 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_630 630 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_631 631 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_632 632 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_633 633 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_634 634 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_635 635 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_636 636 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_637 637 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_638 638 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_639 639 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_640 640 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_641 641 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_642 642 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_643 643 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_644 644 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_645 645 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_646 646 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_647 647 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_648 648 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_649 649 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_650 650 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_651 651 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_652 652 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_653 653 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_654 654 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_655 655 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_656 656 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_657 657 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_658 658 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_659 659 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_660 660 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_661 661 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_662 662 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_663 663 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_664 664 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_665 665 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_666 666 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_667 667 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_668 668 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_669 669 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_670 670 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_671 671 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_672 672 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_673 673 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_674 674 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_675 675 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_676 676 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_677 677 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_678 678 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_679 679 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_680 680 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_681 681 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_682 682 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_683 683 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_684 684 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_685 685 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_686 686 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_687 687 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_688 688 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_689 689 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_690 690 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_691 691 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_692 692 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_693 693 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_694 694 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_695 695 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_696 696 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_697 697 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_698 698 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_699 699 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_700 700 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_701 701 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_702 702 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_703 703 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_704 704 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_705 705 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_706 706 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_707 707 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_708 708 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_709 709 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_710 710 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_711 711 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_712 712 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_713 713 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_714 714 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_715 715 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_716 716 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_717 717 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_718 718 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_719 719 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_720 720 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_721 721 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_722 722 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_723 723 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_724 724 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_725 725 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_726 726 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_727 727 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_728 728 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_729 729 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_730 730 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_731 731 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_732 732 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_733 733 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_734 734 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_735 735 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_736 736 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_737 737 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_738 738 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_739 739 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_740 740 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_741 741 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_742 742 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_743 743 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_744 744 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_745 745 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_746 746 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_747 747 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_748 748 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_749 749 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_750 750 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_751 751 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_752 752 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_753 753 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_754 754 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_755 755 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_756 756 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_757 757 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_758 758 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_759 759 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_760 760 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_761 761 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_762 762 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_763 763 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_764 764 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_765 765 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_766 766 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_767 767 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_768 768 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_769 769 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_770 770 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_771 771 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_772 772 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_773 773 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_774 774 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_775 775 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_776 776 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_777 777 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_778 778 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_779 779 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_780 780 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_781 781 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_782 782 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_783 783 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_784 784 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_785 785 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_786 786 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_787 787 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_788 788 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_789 789 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_790 790 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_791 791 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_792 792 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_793 793 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_794 794 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_795 795 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_796 796 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_797 797 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_798 798 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_799 799 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_800 800 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_801 801 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_802 802 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_803 803 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_804 804 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_805 805 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_806 806 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_807 807 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_808 808 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_809 809 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_810 810 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_811 811 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_812 812 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_813 813 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_814 814 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_815 815 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_816 816 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_817 817 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_818 818 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_819 819 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_820 820 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_821 821 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_822 822 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_823 823 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_824 824 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_825 825 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_826 826 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_827 827 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_828 828 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_829 829 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_830 830 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_831 831 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_832 832 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_833 833 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_834 834 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_835 835 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_836 836 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_837 837 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_838 838 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_839 839 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_840 840 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_841 841 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_842 842 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_843 843 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_844 844 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_845 845 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_846 846 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_847 847 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_848 848 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_849 849 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_850 850 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_851 851 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_852 852 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_853 853 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_854 854 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_855 855 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_856 856 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_857 857 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_858 858 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_859 859 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_860 860 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_861 861 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_862 862 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_863 863 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_864 864 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_865 865 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_866 866 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_867 867 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_868 868 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_869 869 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_870 870 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_871 871 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_872 872 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_873 873 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_874 874 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_875 875 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_876 876 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_877 877 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_878 878 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_879 879 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_880 880 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_881 881 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_882 882 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_883 883 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_884 884 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_885 885 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_886 886 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_887 887 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_888 888 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_889 889 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_890 890 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_891 891 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_892 892 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_893 893 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_894 894 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_895 895 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_896 896 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_897 897 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_898 898 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_899 899 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_900 900 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_901 901 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_902 902 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_903 903 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_904 904 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_905 905 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_906 906 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_907 907 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_908 908 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_909 909 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_910 910 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_911 911 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_912 912 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_913 913 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_914 914 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_915 915 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_916 916 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_917 917 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_918 918 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_919 919 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_920 920 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_921 921 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_922 922 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_923 923 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_924 924 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_925 925 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_926 926 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_927 927 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_928 928 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_929 929 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_930 930 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_931 931 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_932 932 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_933 933 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_934 934 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_935 935 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_936 936 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_937 937 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_938 938 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_939 939 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_940 940 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_941 941 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_942 942 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_943 943 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_944 944 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_945 945 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_946 946 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_947 947 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_948 948 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_949 949 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_950 950 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_951 951 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_952 952 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_953 953 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_954 954 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_955 955 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_956 956 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_957 957 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_958 958 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_959 959 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_960 960 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_961 961 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_962 962 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_963 963 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_964 964 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_965 965 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_966 966 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_967 967 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_968 968 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_969 969 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_970 970 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_971 971 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_972 972 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_973 973 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_974 974 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_975 975 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_976 976 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_977 977 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_978 978 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_979 979 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_980 980 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_981 981 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_982 982 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_983 983 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_984 984 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_985 985 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_986 986 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_987 987 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_988 988 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_989 989 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_990 990 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_991 991 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_992 992 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_993 993 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_994 994 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_995 995 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_996 996 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_997 997 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_998 998 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_999 999 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1000 1000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1001 1001 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1002 1002 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1003 1003 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1004 1004 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1005 1005 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1006 1006 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1007 1007 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1008 1008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1009 1009 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1010 1010 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1011 1011 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1012 1012 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1013 1013 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1014 1014 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1015 1015 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1016 1016 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1017 1017 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1018 1018 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1019 1019 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1020 1020 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1021 1021 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1022 1022 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL2_GRP_NEW_1023 1023 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1 24:20 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_0 0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_1 1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_2 2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_3 3 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_4 4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_5 5 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_6 6 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_7 7 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_8 8 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_9 9 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_10 10 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_11 11 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_12 12 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_13 13 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_14 14 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_15 15 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_16 16 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_17 17 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_18 18 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_19 19 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_NODE1_PM_CTRL_SEL1_NODE_20 20 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER 0x0013C814 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER__PRIV_LEVEL_MASK 0x0013C848 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_NB 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_NB_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_NB_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_NB_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_B 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_B_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_B_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_B_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_CREQ 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_CREQ_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_CREQ_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_CREQ_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_RESP 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_RESP_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_RESP_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_RESP_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_ISO 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_ISO_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_ISO_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_ISO_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_NINB 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_NINB_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_NINB_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_NINB_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_LL 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_LL_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_LL_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_LL_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_BG 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_BG_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_BG_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_BG_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_BF 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_BF_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_BF_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_VC_BF_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_SRC_HXB_IN0 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_SRC_HXB_IN0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_SRC_HXB_IN0_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_SRC_HXB_IN0_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_SRC_HXB_IN1 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_SRC_HXB_IN1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_SRC_HXB_IN1_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_SRC_HXB_IN1_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_DST_HXB_OUT0 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_DST_HXB_OUT0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_DST_HXB_OUT0_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_DST_HXB_OUT0_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_DST_HXB_OUT1 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_DST_HXB_OUT1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_DST_HXB_OUT1_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_DST_HXB_OUT1_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_BFA 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_BFA_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_BFA_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_BFA_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_FFA 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_FFA_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_FFA_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_FFA_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_PFA 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_PFA_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_PFA_ENABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_OUT_ARB_PFA_DISABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL 20:16 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_NEW_STATIC_PATTERN_AAAA_16_GROUP_0 0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_1 1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_2 2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_3 3 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_4 4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_5 5 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_6 6 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_7 7 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_8 8 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_9 9 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_10 10 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_11 11 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_12 12 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_13 13 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_14 14 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_15 15 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_16 16 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_17 17 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_HXBAR_STATUS_FILTER_PM_CTRL_SEL_GRP_18 18 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT0 0x0013C854 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT0__PRIV_LEVEL_MASK 0x0013C844 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT0_INTERCEPT 11:0 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT0_INTERCEPT_INIT 0x00000000 /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT0_2 27:16 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT0_2_INIT 0x00000000 /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT1 0x0013C858 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT1__PRIV_LEVEL_MASK 0x0013C844 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT1_3 11:0 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT1_3_INIT 0x00000000 /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT1_4 27:16 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT1_4_INIT 0x00000000 /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT2 0x0013C85C /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT2__PRIV_LEVEL_MASK 0x0013C844 /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT2_5 11:0 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT2_5_INIT 0x00000000 /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT2_6 27:16 /* RWBVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_BA_WT2_6_INIT 0x00000000 /* RWB-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG 0x0013C830 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG__PRIV_LEVEL_MASK 0x0013C83C /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_SYSCHN_DBI_AC_ENABLE 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_SYSCHN_DBI_AC_ENABLE_INIT 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_SYSCHN_DBI_AC_ENABLE_OFF 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_SYSCHN_DBI_AC_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_SYSCHN_DBI_DC_ENABLE 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_SYSCHN_DBI_DC_ENABLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_SYSCHN_DBI_DC_ENABLE_OFF 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_SYSCHN_DBI_DC_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_XBARCHN_DBI_AC_ENABLE 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_XBARCHN_DBI_AC_ENABLE_INIT 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_XBARCHN_DBI_AC_ENABLE_OFF 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_XBARCHN_DBI_AC_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_XBARCHN_DBI_DC_ENABLE 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_XBARCHN_DBI_DC_ENABLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_XBARCHN_DBI_DC_ENABLE_OFF 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_CHN_CONFIG_XBARCHN_DBI_DC_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_STALL_CONFIG 0x0013C818 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_STALL_CONFIG__PRIV_LEVEL_MASK 0x0013C84C /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_STALL_CONFIG_GXC_FIFO_STALL_CNT 2:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_STALL_CONFIG_GXC_FIFO_STALL_CNT_INT 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_STALL_CONFIG_HXC_FIFO_STALL_CNT 5:3 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_STALL_CONFIG_HXC_FIFO_STALL_CNT_INT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_STALL_CONFIG_MERGER_FIFO_STALL_CNT 8:6 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_STALL_CONFIG_MERGER_FIFO_STALL_CNT_INT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG 0x0013C834 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG__PRIV_LEVEL_MASK 0x0013C83C /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXBAR_TO_AFS 6:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXBAR_TO_AFS_INIT 0x4 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXBAR_TO_AFS_DBI_AC_ENABLE 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXBAR_TO_AFS_DBI_DC_ENABLE 0x2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXBAR_TO_AFS_DBI_BYPASS_ENABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXBAR_TO_AFS_DBI_NOP 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXBAR 9:7 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXBAR_INIT 0x4 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXBAR_DBI_AC_ENABLE 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXBAR_DBI_DC_ENABLE 0x2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXBAR_DBI_BYPASS_ENABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXBAR_DBI_NOP 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_GXC_TO_AFS 12:10 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_GXC_TO_AFS_INIT 0x4 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_GXC_TO_AFS_DBI_AC_ENABLE 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_GXC_TO_AFS_DBI_DC_ENABLE 0x2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_GXC_TO_AFS_DBI_BYPASS_ENABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_GXC_TO_AFS_DBI_NOP 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_GXC 15:13 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_GXC_INIT 0x4 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_GXC_DBI_AC_ENABLE 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_GXC_DBI_DC_ENABLE 0x2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_GXC_DBI_BYPASS_ENABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_GXC_DBI_NOP 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXC_TO_AFS 18:16 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXC_TO_AFS_INIT 0x4 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXC_TO_AFS_DBI_AC_ENABLE 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXC_TO_AFS_DBI_DC_ENABLE 0x2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXC_TO_AFS_DBI_BYPASS_ENABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_HXC_TO_AFS_DBI_NOP 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXC 21:19 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXC_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXC_DBI_AC_ENABLE 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXC_DBI_DC_ENABLE 0x2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXC_DBI_BYPASS_ENABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_HXC_DBI_NOP 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_FNIC 24:22 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_FNIC_INIT 0x4 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_FNIC_DBI_AC_ENABLE 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_FNIC_DBI_DC_ENABLE 0x2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_FNIC_DBI_BYPASS_ENABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_AFS_TO_FNIC_DBI_NOP 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_MLR_TO_AFS 27:25 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_MLR_TO_AFS_INIT 0x4 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_MLR_TO_AFS_DBI_AC_ENABLE 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_MLR_TO_AFS_DBI_DC_ENABLE 0x2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_MLR_TO_AFS_DBI_BYPASS_ENABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_MLR_TO_AFS_DBI_NOP 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_FNIC_TO_L2 30:28 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_FNIC_TO_L2_INIT 0x4 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_FNIC_TO_L2_DBI_AC_ENABLE 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_FNIC_TO_L2_DBI_DC_ENABLE 0x2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_FNIC_TO_L2_DBI_BYPASS_ENABLE 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_XXI_CONFIG_DBI_MODE_FNIC_TO_L2_DBI_NOP 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_ISO_PUSHBACK 0x0013C838 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_ISO_PUSHBACK__PRIV_LEVEL_MASK 0x0013C84C /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT 7:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_INIT 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_NONE 0x00 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_1PC 0x63 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_10PC 0x09 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_25PC 0x03 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_33PC 0x02 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_50PC 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_MLR_ISO_PUSHBACK 0x0013C840 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_MLR_ISO_PUSHBACK__PRIV_LEVEL_MASK 0x0013C84C /* */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_MLR_ISO_PUSHBACK_NONISO_TIMEOUT 7:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_MLR_ISO_PUSHBACK_NONISO_TIMEOUT_INIT 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_MLR_ISO_PUSHBACK_NONISO_TIMEOUT_NONE 0x00 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_MLR_ISO_PUSHBACK_NONISO_TIMEOUT_1PC 0x63 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_MLR_ISO_PUSHBACK_NONISO_TIMEOUT_10PC 0x09 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_MLR_ISO_PUSHBACK_NONISO_TIMEOUT_25PC 0x03 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_MLR_ISO_PUSHBACK_NONISO_TIMEOUT_33PC 0x02 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI0_PREG_MLR_ISO_PUSHBACK_NONISO_TIMEOUT_50PC 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0 0x0013CA7F:0x0013CA00 /* RW--D */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK 0x0013CA50 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_cya" /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK 0x0013CA54 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_pm" /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_PM_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT 0x0013CA00 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT__PRIV_LEVEL_MASK 0x0013CA50 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT_G2FC 7:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT_G2FC_INIT 0x20 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT_G2FC_OFF 0x00 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT_G2FD 15:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT_G2FD_INIT 0x20 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT_G2FD_OFF 0x00 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT_F2G 23:16 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT_F2G_INIT 0x20 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_SNAP_LIMIT_F2G_OFF 0x00 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL 0x0013CA04 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL__PRIV_LEVEL_MASK 0x0013CA50 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_H2A_DISPATCH_CNT 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_H2A_DISPATCH_CNT_INIT 0x5 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_H2A_DISPATCH_CNT_ALWAYS_CAMPER 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_H2A_DISPATCH_CNT_NEVER_CAMPER 0xF /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_H2A_BACKFILL_ATTEMPT_CNT 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_H2A_BACKFILL_ATTEMPT_CNT_INIT 0x5 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_H2A_BACKFILL_ATTEMPT_CNT_INIT_M1 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_H2A_BACKFILL_ATTEMPT_CNT_ALWAYS_BACKFILL 0xF /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_H2A_BACKFILL_ATTEMPT_CNT_NEVER_BACKFILL 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_A2H_DISPATCH_CNT 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_A2H_DISPATCH_CNT_INIT 0x5 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_A2H_DISPATCH_CNT_ALWAYS_CAMPER 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_A2H_DISPATCH_CNT_NEVER_CAMPER 0xF /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_A2H_BACKFILL_ATTEMPT_CNT 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_A2H_BACKFILL_ATTEMPT_CNT_INIT 0x5 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_A2H_BACKFILL_ATTEMPT_CNT_INIT_M1 0x4 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_A2H_BACKFILL_ATTEMPT_CNT_ALWAYS_BACKFILL 0xF /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_CAMP_CTRL_A2H_BACKFILL_ATTEMPT_CNT_NEVER_BACKFILL 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_ISO_PUSHBACK 0x0013CA08 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_ISO_PUSHBACK__PRIV_LEVEL_MASK 0x0013CA50 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT 7:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_INIT 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_NONE 0x00 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_1PC 0x63 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_10PC 0x09 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_25PC 0x03 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_33PC 0x02 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_ISO_PUSHBACK_NONISO_TIMEOUT_50PC 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY 0x0013CA0C /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY__PRIV_LEVEL_MASK 0x0013CA50 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY_XSC_CNT 2:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY_XSC_CNT_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY_XSC_CNT_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY_XSD_CNT 6:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY_XSD_CNT_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY_XSD_CNT_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY_NO_LEAKY_CYA 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY_NO_LEAKY_CYA_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY_NO_FS_WA_CYA 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_STICKY_NO_FS_WA_CYA_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_XSC_FAIRNESS_CTRL_CYA 0x0013CA10 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_XSC_FAIRNESS_CTRL_CYA__PRIV_LEVEL_MASK 0x0013CA50 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_XSC_FAIRNESS_CTRL_CYA_ENABLE 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_XSC_FAIRNESS_CTRL_CYA_ENABLE_INIT 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_XSC_FAIRNESS_CTRL_CYA_ENABLE_OFF 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER 0x0013CA14 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER__PRIV_LEVEL_MASK 0x0013CA54 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_NB 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_NB_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_NB_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_NB_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_B 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_B_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_B_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_B_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_BG 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_BG_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_BG_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_BG_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_BF 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_BF_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_BF_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_BF_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_NINB 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_NINB_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_NINB_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_NINB_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_ISO 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_ISO_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_ISO_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_ISO_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_ROP 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_ROP_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_ROP_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_ROP_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_PAC_CMD 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_PAC_CMD_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_PAC_CMD_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_PAC_CMD_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_PAC_DATA 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_PAC_DATA_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_PAC_DATA_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_PAC_DATA_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_CREQ 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_CREQ_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_CREQ_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_CREQ_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_RESP 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_RESP_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_RESP_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_RESP_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_LL 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_LL_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_LL_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_VC_LL_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_GLOBAL_ENABLE 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER_OUT_GLOBAL_ENABLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2 0x0013CA18 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2__PRIV_LEVEL_MASK 0x0013CA54 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC0 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC1 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC1_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC1_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC2 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC2_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC2_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC2_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC3 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC3_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC3_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC3_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC4 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC4_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC4_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC4_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC5 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC5_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC5_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC5_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC6 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC6_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC6_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC6_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC7 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC7_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC7_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_GPC7_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP0 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP1 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP1_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP1_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP2 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP2_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP2_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP2_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP3 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP3_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP3_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP3_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP4 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP4_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP4_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP4_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP5 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP5_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP5_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP5_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP6 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP6_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP6_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP6_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP7 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP7_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP7_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_FBP7_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_HUB0 16:16 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_HUB0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_HUB0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_HUB0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PGH0 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PGH0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PGH0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PGH0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_UHG0 18:18 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_UHG0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_UHG0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_UHG0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT1_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT1_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT2 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT2_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT2_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT2_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT3 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT3_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT3_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT3_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT4 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT4_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT4_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT4_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT5 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT5_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT5_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT5_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT6 30:30 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT6_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT6_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT6_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT7 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT7_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT7_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_OUT_PORT7_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB 0x0013CA20 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB__PRIV_LEVEL_MASK 0x0013CA54 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PF 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PF_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PF_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PF_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_FF 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_FF_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_FF_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_FF_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_DF 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_DF_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_DF_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_DF_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT1_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT1_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT2 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT2_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT2_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT2_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT3 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT3_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT3_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT3_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT4 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT4_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT4_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT4_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT5 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT5_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT5_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT5_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT6 30:30 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT6_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT6_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT6_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT7 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT7_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT7_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_REQ_STATUS_FILTER2_ARB_OUT_PORT7_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_PUSHBACK 0x0013CA24 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_PUSHBACK__PRIV_LEVEL_MASK 0x0013CA50 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_PUSHBACK_TIMEOUT 9:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_PUSHBACK_TIMEOUT_INIT 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_PUSHBACK_TIMEOUT_NONE 0x00 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_PUSHBACK_TIMEOUT_1PC 0x63 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_PUSHBACK_TIMEOUT_10PC 0x09 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_PUSHBACK_TIMEOUT_25PC 0x03 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_PUSHBACK_TIMEOUT_33PC 0x02 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_HUB_PUSHBACK_TIMEOUT_50PC 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA 0x0013CA28 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA__PRIV_LEVEL_MASK 0x0013CA50 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_NO_GFX_FF 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_NO_GFX_FF_DISABLE 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_NO_GFX_FF_ENABLE 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HOOK_BW_AMP 10:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HOOK_BW_AMP_ACT 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HOOK_BW_AMP_1X 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HOOK_BW_AMP_2X 0x02 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HOOK_BW_AMP_3X 0x03 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HOOK_BW_AMP_4X 0x04 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HOOK_BW_AMP_5X 0x05 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HOOK_BW_AMP_6X 0x06 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HOOK_BW_AMP_7X 0x07 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_NO_RR_COUNTERMEASURES 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_NO_RR_COUNTERMEASURES_DISABLE 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_NO_RR_COUNTERMEASURES_ENABLE 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_G2F_LOOSEN_WSTICKY 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_G2F_LOOSEN_WSTICKY_DISABLE 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_G2F_LOOSEN_WSTICKY_ENABLE 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HXBAR_BFA 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HXBAR_BFA_DISABLE 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_HXBAR_BFA_ENABLE 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_UNFOLD_WR_FORWARDING 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_UNFOLD_WR_FORWARDING_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_UNFOLD_WR_FORWARDING_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PER_VC_WR_DATA_CNTR 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PER_VC_WR_DATA_CNTR_DIS 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_PER_VC_WR_DATA_CNTR_EN 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_RESERVE2 30:30 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_RESERVE2_DISABLE 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_RESERVE2_ENABLE 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_RESERVE3 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_RESERVE3_DISABLE 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_CYA_RESERVE3_ENABLE 0x01 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER 0x0013CA2C /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER__PRIV_LEVEL_MASK 0x0013CA54 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_B 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_B_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_B_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_B_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BG 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BG_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BG_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BG_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BF 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BF_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BF_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BF_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NINB 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NINB_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NINB_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NINB_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_ISO 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_ISO_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_ISO_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_ISO_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_ROP 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_ROP_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_ROP_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_ROP_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_PAC_CMD 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_PAC_CMD_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_PAC_CMD_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_PAC_CMD_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_PAC_DATA 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_PAC_DATA_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_PAC_DATA_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_PAC_DATA_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_GP0 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_GP0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_GP0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_GP0_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_GP1 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_GP1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_GP1_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_NB_GP1_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BM 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BM_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BM_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_VC_BM_YES 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_GLOBAL_ENABLE 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER_OUT_GLOBAL_ENABLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2 0x0013CA30 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2__PRIV_LEVEL_MASK 0x0013CA54 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC0 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC1 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC1_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC1_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC2 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC2_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC2_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC2_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC3 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC3_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC3_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC3_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC4 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC4_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC4_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC4_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC5 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC5_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC5_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC5_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC6 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC6_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC6_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC6_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC7 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC7_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC7_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_GPC7_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP0 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP1 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP1_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP1_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP2 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP2_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP2_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP2_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP3 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP3_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP3_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP3_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP4 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP4_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP4_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP4_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP5 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP5_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP5_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP5_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP6 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP6_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP6_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP6_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP7 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP7_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP7_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_FBP7_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_HUB0 16:16 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_HUB0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_HUB0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_HUB0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_PGH0 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_PGH0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_PGH0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_PGH0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_UHG0 18:18 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_UHG0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_UHG0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_UHG0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR0 19:19 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR1 20:20 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR1_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR1_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR2 21:21 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR2_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR2_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR2_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR3 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR3_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR3_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR3_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR4 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR4_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR4_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR4_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR5 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR5_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR5_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR5_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR6 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR6_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR6_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR6_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR7 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR7_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR7_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_OUT_MLR7_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB 0x0013CA34 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB__PRIV_LEVEL_MASK 0x0013CA54 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PF 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PF_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PF_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PF_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_FF 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_FF_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_FF_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_FF_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_DF 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_DF_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_DF_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_DF_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT0_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT0_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT0_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT1_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT1_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT1_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT2 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT2_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT2_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT2_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT3 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT3_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT3_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT3_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT4 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT4_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT4_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT4_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT5 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT5_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT5_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT5_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT6 30:30 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT6_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT6_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT6_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT7 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT7_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT7_NO 0x0 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_RSP_STATUS_FILTER2_ARB_OUT_PORT7_YES 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE0 0x0013CA40 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE0__PRIV_LEVEL_MASK 0x0013CA50 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE0_GPC0_EN 7:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE0_GPC0_EN_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE0_GPC1_EN 15:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE0_GPC1_EN_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE0_GPC2_EN 23:16 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE0_GPC2_EN_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE0_GPC3_EN 31:24 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE0_GPC3_EN_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE1 0x0013CA44 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE1__PRIV_LEVEL_MASK 0x0013CA50 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE1_GPC4_EN 7:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE1_GPC4_EN_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE1_GPC5_EN 15:8 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE1_GPC5_EN_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE1_GPC6_EN 23:16 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE1_GPC6_EN_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE1_GPC7_EN 31:24 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE1_GPC7_EN_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE2 0x0013CA48 /* RW-4R */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE2__PRIV_LEVEL_MASK 0x0013CA50 /* */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE2_MODE 1:0 /* RWEVF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE2_MODE_NONE 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE2_MODE_REQ 0x1 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE2_MODE_RSP 0x2 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE2_MODE_BOTH 0x3 /* RW--V */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE2_REQ_CNT 14:8 /* RW-VF */ #define NV_XBAR_MXBAR_CS_PRI_XSU0_PREG_THROTTLE2_RSP_CNT 22:16 /* RW-VF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI 0x0013DC3F:0x0013DC00 /* RW--D */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK 0x0013DC30 /* RW-4R */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_cya" /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK 0x0013DC34 /* RW-4R */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_pm" /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL 0x0013DC00 /* RW-4R */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL__PRIV_LEVEL_MASK 0x0013DC34 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_ENABLE 0:0 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_ENABLE_OFF 0 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_ENABLE_ON 1 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2 13:8 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_0 0 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1 1 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_2 2 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_3 3 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_4 4 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_5 5 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_6 6 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_7 7 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_8 8 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_9 9 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_10 10 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_11 11 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_12 12 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_13 13 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_14 14 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_15 15 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_16 16 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_17 17 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_18 18 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_19 19 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_20 20 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_21 21 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_22 22 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_23 23 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_24 24 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_25 25 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_26 26 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_27 27 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_28 28 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_29 29 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_30 30 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_31 31 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_32 32 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_33 33 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_34 34 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_35 35 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_36 36 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_37 37 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_38 38 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_39 39 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_40 40 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_41 41 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_42 42 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_43 43 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_44 44 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_45 45 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_46 46 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_47 47 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_48 48 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_49 49 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_50 50 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_51 51 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_52 52 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_53 53 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_54 54 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_55 55 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_56 56 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_57 57 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_58 58 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_59 59 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_60 60 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_61 61 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_62 62 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_63 63 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1 20:16 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_0 0 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_1 1 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_2 2 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_3 3 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_4 4 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_5 5 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_6 6 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_7 7 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_8 8 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_9 9 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_10 10 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_11 11 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_12 12 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_13 13 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_14 14 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_15 15 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_16 16 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_17 17 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_18 18 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_19 19 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_20 20 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG 0x0013DC04 /* RWE4R */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_IDLE_CG_DLY_CNT 5:0 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_IDLE_CG_DLY_CNT__PROD 0x0000000A /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_IDLE_CG_EN 6:6 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STALL_CG_EN 14:14 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_WAKEUP_DLY_CNT 19:16 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_WAKEUP_DLY_CNT__PROD 0x00000001 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_SLEEP_DLY_CNT 23:20 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_SLEEP_DLY_CNT_HWINIT 0x00000000 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_SLEEP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG1 0x0013DC08 /* RWE4R */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG1_MONITOR_CG_EN 0:0 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG1_SLCG 31:1 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG1_SLCG_DISABLED 0x7FFFFFFF /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_CXBAR_PREG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_FIFO_STALLER 0x0013DC0C /* RW-4R */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_FIFO_STALLER__PRIV_LEVEL_MASK 0x0013DC30 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_FIFO_STALLER_HUB_CNT 2:0 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_FIFO_STALLER_HUB_CNT_INIT 0x1 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_FIFO_STALLER_GPC_CNT 5:3 /* RWEVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_FIFO_STALLER_GPC_CNT_INIT 0x2 /* RWE-V */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_BUS 0x0013DC10 /* R--4R */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_BUS__PRIV_LEVEL_MASK 0x0013DC34 /* */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_BUS_DATA 2:0 /* R-EVF */ #define NV_XBAR_CXBAR_CQ_PRI_SYS0_HXI_PREG_PM_BUS_DATA_INIT 0x0 /* R-E-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI 0x0013EC3F:0x0013EC00 /* RW--D */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK 0x0013EC34 /* RW-4R */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_cya" /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK 0x0013EC38 /* RW-4R */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_pm" /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_BUS 0x0013EC00 /* R--4R */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_BUS__PRIV_LEVEL_MASK 0x0013EC38 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_BUS_DATA 15:0 /* R-EVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_PM_BUS_DATA_INIT 0x0 /* R-E-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL 0x0013EC18 /* RW-4R */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL__PRIV_LEVEL_MASK 0x0013EC38 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_ENABLE 0:0 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_ENABLE_OFF 0 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_ENABLE_ON 1 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2 13:8 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_0 0 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1 1 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_2 2 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_3 3 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_4 4 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_5 5 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_6 6 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_7 7 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_8 8 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_9 9 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_10 10 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_11 11 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_12 12 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_13 13 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_14 14 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_15 15 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_16 16 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_17 17 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_18 18 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_19 19 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_20 20 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1 20:16 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_0 0 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_1 1 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_2 2 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_3 3 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_4 4 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_5 5 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_6 6 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_7 7 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_8 8 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_9 9 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_10 10 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_11 11 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_12 12 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_13 13 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_14 14 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_15 15 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_16 16 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_17 17 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_18 18 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_19 19 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_NODE0_PM_CTRL_SEL1_NODE_20 20 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_FIFO_STALLER 0x0013EC30 /* RW-4R */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_FIFO_STALLER__PRIV_LEVEL_MASK 0x0013EC34 /* */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_FIFO_STALLER_CNT 2:0 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_SYS0_HXI_PREG_FIFO_STALLER_CNT_INIT 0x1 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU 0x0013C97F:0x0013C900 /* RW--D */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK 0x0013C970 /* RW-4R */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_cya" /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_CYA_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK 0x0013C974 /* RW-4R */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION 3:0 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_ALL_LEVELS_ENABLED 0x0000000F /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLED 0x0000000C /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0 0:0 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1 1:1 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2 2:2 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3 3:3 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION 7:4 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION__FUSE_SIGNAL "xbar_pm" /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_ALL_LEVELS_ENABLED_FUSE0 0x0000000F /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLED_FUSE1 0x0000000C /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_ONLY_LEVEL3_ENABLED 0x00000008 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0 4:4 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1 5:5 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL1_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2 6:6 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL2_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3 7:7 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_ENABLE 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL3_DISABLE 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION 8:8 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_READ_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION 9:9 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION_REPORT_ERROR 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_WRITE_VIOLATION_SOLDIER_ON 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL 10:10 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_SOURCE_READ_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL 11:11 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_BLOCKED 0x00000001 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_SOURCE_WRITE_CONTROL_LOWERED 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_SOURCE_ENABLE 31:12 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_PRIV_LEVEL_MASK_SOURCE_ENABLE_ALL_SOURCES_ENABLED 0x000FFFFF /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT 0x0013C900 /* RW-4R */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT__PRIV_LEVEL_MASK 0x0013C970 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT_GFX 7:0 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT_GFX_INIT 0x10 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT_GFX_OFF 0x00 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT_NO_LEAKY_CYA 12:12 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT_NO_LEAKY_CYA_INIT 0x0 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT_NO_FS_WA_CYA 13:13 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT_NO_FS_WA_CYA_INIT 0x0 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT_HUB_GFX_BW 23:16 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_SNAP_LIMIT_HUB_GFX_BW_INIT 0xff /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_BUS 0x0013C910 /* R--4R */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_BUS__PRIV_LEVEL_MASK 0x0013C974 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_BUS_DATA 15:0 /* R-EVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_PM_BUS_DATA_INIT 0x0 /* R-E-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL 0x0013C914 /* RW-4R */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL__PRIV_LEVEL_MASK 0x0013C974 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_ENABLE 0:0 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_ENABLE_OFF 0 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_ENABLE_ON 1 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2 13:8 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_0 0 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_1 1 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_2 2 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_3 3 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_4 4 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_5 5 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_6 6 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_7 7 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_8 8 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_9 9 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_10 10 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_11 11 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_12 12 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_13 13 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_14 14 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_15 15 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_16 16 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_17 17 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_18 18 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_19 19 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_20 20 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL2_GRP_NEW_21 21 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL1 20:16 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL1_NODE_0 0 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL1_NODE_1 1 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL1_NODE_2 2 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL1_NODE_3 3 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_PREG_NODE0_PM_CTRL_SEL1_NODE_4 4 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG 0x0013C920 /* RWE4R */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_IDLE_CG_DLY_CNT 5:0 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_IDLE_CG_DLY_CNT__PROD 0x0000000A /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_IDLE_CG_EN 6:6 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STALL_CG_EN 14:14 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_WAKEUP_DLY_CNT 19:16 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_SLEEP_DLY_CNT 23:20 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_SLEEP_DLY_CNT_HWINIT 0x00000000 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_SLEEP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG1 0x0013C924 /* RWE4R */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG1_MONITOR_CG_EN 0:0 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG1_SLCG 30:1 /* RWEVF */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG1_SLCG_DISABLED 0x3FFFFFFF /* RWE-V */ #define NV_XBAR_WXBAR_CS_PRI_XSU_WXBAR_PREG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC 0x0013CBBF:0x0013CB80 /* RW--D */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG 0x0013CB80 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG1 0x0013CB84 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG 0x0013CB88 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG1 0x0013CB8C /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_EG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG 0x0013CB90 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_BF_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_BF_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_BF_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_GLOBAL_PACK_EN 1:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_LOCAL_PACK_EN 2:2 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_LOCAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_LOCAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_EN 3:3 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH 8:4 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_BF_NUM_ITERS 14:12 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_BF_NUM_ITERS_NONE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_BF_NUM_ITERS_1ITER 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_BF_NUM_ITERS_2ITER 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_BF_NUM_ITERS_3ITER 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_BF_NUM_ITERS_ALL 0x4 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP 15:15 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_AC 20:20 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_DC 21:21 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_DC_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_DC_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_BX 22:22 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_BX_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_BX_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_BYP 23:23 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_BYP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2T_BYP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_EN 25:25 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH 30:26 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2C_AC 31:31 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2C_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG_DBI_G2C_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL 0x0013CB94 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL 6:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL 22:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PERF_ENABLE 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PERF_ENABLE_OFF 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL_PERF_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0 0x0013CB98 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_CMD 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_CMD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_CMD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_DATA 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_DATA_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_DATA_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_FOLD 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_FOLD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_FOLD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT0 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT1 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT2 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT3 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_VC_BF 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_VC_BF_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_VC_BF_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_VC_NB 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_VC_NB_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_VC_NB_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_ASYNC_CDT 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_ASYNC_CDT_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_ASYNC_CDT_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_VC_BH 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_VC_BH_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_VC_BH_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP0 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP1 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP2 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP3 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_RGG 16:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_RGG_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_RGG_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_GPM 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_GPM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_GPM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP4 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP5 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_LTP5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT4 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT5 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT6 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT7 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL0_PORT7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1 0x0013CB9C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX0 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX1 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX2 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX3 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_RASTER 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_RASTER_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_RASTER_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_GCC 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_GCC_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_GCC_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_GPCCS 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_GPCCS_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_GPCCS_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX4 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX5 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX6 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX7 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX8 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX8_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX8_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX9 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX9_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX9_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX10 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX10_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX10_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX11 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX11_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TEX11_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS0_PE0 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS1_PE1 18:18 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS2_PE2 19:19 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS3_PE3 20:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS4_PE4 21:21 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS5_PE5 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT 30:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_M0 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_M1 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_M2 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_M3 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_M4 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_M5 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_M6 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_M7 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_Z0 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_Z1 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_Z2 0x0A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_Z3 0x0B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_Z4 0x0C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_Z5 0x0D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_Z6 0x0E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_Z7 0x0F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL1_WDATPAT_AZ 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2 0x0013CBA0 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_PMM 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_PMM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_PMM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_ROP0 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_ROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_ROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_UTLBROP0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_UTLBROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_UTLBROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_ROP1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_ROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_ROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_UTLBROP1 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_UTLBROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_FILTER_CTRL2_UTLBROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1 0x0013CBA4 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL 19:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL 23:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL 27:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL 31:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2 0x0013CBA8 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG2 0x0013CBAC /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG2_COMP_WT 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG2_COMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG2_UNCOMP_WT 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG2_UNCOMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG2_CYA 31:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ARB_CFG2_CYA_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IDLE_FILTER 0x0013CBB0 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IDLE_FILTER_GR_IDLE 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IDLE_FILTER_GR_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IDLE_FILTER_IG_BLCG_IDLE 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IDLE_FILTER_IG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IDLE_FILTER_EG_BLCG_IDLE 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_IDLE_FILTER_EG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ERROR 0x0013CBB4 /* R--4R */ #define NV_XBAR_MXBAR_PRI_GPCS_GNIC_PREG_ERROR_REG 31:0 /* R--VF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0 0x0013CC3F:0x0013CC00 /* RW--D */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG 0x0013CC00 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG1 0x0013CC04 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG 0x0013CC08 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG1 0x0013CC0C /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_EG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG 0x0013CC10 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_BF_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_BF_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_BF_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN 1:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN 2:2 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN 3:3 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH 8:4 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS 14:12 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_NONE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_1ITER 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_2ITER 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_3ITER 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_ALL 0x4 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP 15:15 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_AC 20:20 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_DC 21:21 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_BX 22:22 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP 23:23 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN 25:25 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH 30:26 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2C_AC 31:31 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL 0x0013CC14 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL 6:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL 22:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PERF_ENABLE 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PERF_ENABLE_OFF 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL_PERF_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0 0x0013CC18 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_CMD 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_CMD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_CMD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_DATA 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_DATA_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_DATA_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_FOLD 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT0 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT1 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT2 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT3 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP0 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP1 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP2 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP3 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_RGG 16:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_RGG_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_RGG_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_GPM 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_GPM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_GPM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP4 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP5 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT4 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT5 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT6 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT7 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1 0x0013CC1C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX0 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX1 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX2 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX3 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_RASTER 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_GCC 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_GCC_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_GCC_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX4 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX5 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX6 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX7 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX8 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX9 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX10 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX11 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1 18:18 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2 19:19 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3 20:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4 21:21 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT 30:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M0 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M1 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M2 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M3 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M4 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M5 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M6 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M7 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z0 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z1 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z2 0x0A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z3 0x0B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z4 0x0C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z5 0x0D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z6 0x0E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z7 0x0F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_AZ 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2 0x0013CC20 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_PMM 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_PMM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_PMM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_ROP0 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_ROP1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1 0x0013CC24 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL 19:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL 23:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL 27:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL 31:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2 0x0013CC28 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG2 0x0013CC2C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG2_COMP_WT 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG2_COMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG2_UNCOMP_WT 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG2_UNCOMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG2_CYA 31:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ARB_CFG2_CYA_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IDLE_FILTER 0x0013CC30 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IDLE_FILTER_GR_IDLE 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IDLE_FILTER_GR_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ERROR 0x0013CC34 /* R--4R */ #define NV_XBAR_MXBAR_PRI_GPC0_GNIC0_PREG_ERROR_REG 31:0 /* R--VF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0 0x0013CCBF:0x0013CC80 /* RW--D */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG 0x0013CC80 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG1 0x0013CC84 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG 0x0013CC88 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG1 0x0013CC8C /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_EG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG 0x0013CC90 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_BF_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_BF_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_BF_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN 1:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN 2:2 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN 3:3 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH 8:4 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS 14:12 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_NONE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_1ITER 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_2ITER 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_3ITER 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_ALL 0x4 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP 15:15 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_AC 20:20 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_DC 21:21 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_BX 22:22 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP 23:23 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN 25:25 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH 30:26 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2C_AC 31:31 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL 0x0013CC94 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL 6:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL 22:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PERF_ENABLE 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PERF_ENABLE_OFF 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL_PERF_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0 0x0013CC98 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_CMD 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_CMD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_CMD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_DATA 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_DATA_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_DATA_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_FOLD 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT0 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT1 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT2 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT3 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP0 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP1 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP2 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP3 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_RGG 16:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_RGG_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_RGG_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_GPM 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_GPM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_GPM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP4 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP5 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT4 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT5 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT6 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT7 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1 0x0013CC9C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX0 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX1 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX2 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX3 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_RASTER 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_GCC 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_GCC_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_GCC_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX4 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX5 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX6 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX7 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX8 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX9 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX10 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX11 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1 18:18 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2 19:19 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3 20:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4 21:21 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT 30:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M0 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M1 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M2 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M3 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M4 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M5 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M6 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M7 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z0 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z1 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z2 0x0A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z3 0x0B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z4 0x0C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z5 0x0D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z6 0x0E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z7 0x0F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_AZ 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2 0x0013CCA0 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_PMM 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_PMM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_PMM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_ROP0 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_ROP1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1 0x0013CCA4 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL 19:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL 23:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL 27:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL 31:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2 0x0013CCA8 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG2 0x0013CCAC /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG2_COMP_WT 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG2_COMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG2_UNCOMP_WT 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG2_UNCOMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG2_CYA 31:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ARB_CFG2_CYA_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IDLE_FILTER 0x0013CCB0 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IDLE_FILTER_GR_IDLE 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IDLE_FILTER_GR_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ERROR 0x0013CCB4 /* R--4R */ #define NV_XBAR_MXBAR_PRI_GPC1_GNIC0_PREG_ERROR_REG 31:0 /* R--VF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0 0x0013CD3F:0x0013CD00 /* RW--D */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG 0x0013CD00 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG1 0x0013CD04 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG 0x0013CD08 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG1 0x0013CD0C /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_EG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG 0x0013CD10 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_BF_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_BF_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_BF_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN 1:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN 2:2 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN 3:3 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH 8:4 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS 14:12 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_NONE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_1ITER 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_2ITER 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_3ITER 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_ALL 0x4 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP 15:15 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_AC 20:20 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_DC 21:21 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_BX 22:22 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP 23:23 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN 25:25 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH 30:26 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2C_AC 31:31 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL 0x0013CD14 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL 6:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL 22:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PERF_ENABLE 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PERF_ENABLE_OFF 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL_PERF_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0 0x0013CD18 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_CMD 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_CMD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_CMD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_DATA 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_DATA_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_DATA_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_FOLD 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT0 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT1 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT2 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT3 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP0 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP1 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP2 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP3 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_RGG 16:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_RGG_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_RGG_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_GPM 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_GPM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_GPM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP4 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP5 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT4 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT5 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT6 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT7 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1 0x0013CD1C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX0 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX1 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX2 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX3 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_RASTER 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_GCC 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_GCC_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_GCC_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX4 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX5 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX6 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX7 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX8 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX9 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX10 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX11 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1 18:18 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2 19:19 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3 20:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4 21:21 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT 30:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M0 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M1 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M2 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M3 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M4 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M5 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M6 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M7 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z0 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z1 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z2 0x0A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z3 0x0B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z4 0x0C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z5 0x0D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z6 0x0E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z7 0x0F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_AZ 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2 0x0013CD20 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_PMM 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_PMM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_PMM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_ROP0 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_ROP1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1 0x0013CD24 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL 19:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL 23:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL 27:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL 31:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2 0x0013CD28 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG2 0x0013CD2C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG2_COMP_WT 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG2_COMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG2_UNCOMP_WT 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG2_UNCOMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG2_CYA 31:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ARB_CFG2_CYA_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IDLE_FILTER 0x0013CD30 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IDLE_FILTER_GR_IDLE 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IDLE_FILTER_GR_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ERROR 0x0013CD34 /* R--4R */ #define NV_XBAR_MXBAR_PRI_GPC2_GNIC0_PREG_ERROR_REG 31:0 /* R--VF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0 0x0013CDBF:0x0013CD80 /* RW--D */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG 0x0013CD80 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG1 0x0013CD84 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG 0x0013CD88 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG1 0x0013CD8C /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_EG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG 0x0013CD90 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_BF_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_BF_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_BF_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN 1:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN 2:2 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN 3:3 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH 8:4 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS 14:12 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_NONE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_1ITER 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_2ITER 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_3ITER 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_ALL 0x4 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP 15:15 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_AC 20:20 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_DC 21:21 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_BX 22:22 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP 23:23 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN 25:25 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH 30:26 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2C_AC 31:31 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL 0x0013CD94 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL 6:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL 22:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PERF_ENABLE 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PERF_ENABLE_OFF 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL_PERF_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0 0x0013CD98 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_CMD 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_CMD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_CMD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_DATA 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_DATA_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_DATA_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_FOLD 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT0 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT1 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT2 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT3 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP0 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP1 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP2 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP3 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_RGG 16:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_RGG_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_RGG_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_GPM 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_GPM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_GPM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP4 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP5 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT4 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT5 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT6 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT7 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1 0x0013CD9C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX0 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX1 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX2 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX3 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_RASTER 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_GCC 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_GCC_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_GCC_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX4 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX5 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX6 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX7 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX8 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX9 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX10 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX11 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1 18:18 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2 19:19 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3 20:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4 21:21 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT 30:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M0 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M1 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M2 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M3 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M4 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M5 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M6 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M7 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z0 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z1 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z2 0x0A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z3 0x0B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z4 0x0C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z5 0x0D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z6 0x0E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z7 0x0F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_AZ 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2 0x0013CDA0 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_PMM 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_PMM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_PMM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_ROP0 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_ROP1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1 0x0013CDA4 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL 19:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL 23:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL 27:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL 31:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2 0x0013CDA8 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG2 0x0013CDAC /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG2_COMP_WT 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG2_COMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG2_UNCOMP_WT 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG2_UNCOMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG2_CYA 31:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ARB_CFG2_CYA_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IDLE_FILTER 0x0013CDB0 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IDLE_FILTER_GR_IDLE 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IDLE_FILTER_GR_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ERROR 0x0013CDB4 /* R--4R */ #define NV_XBAR_MXBAR_PRI_GPC3_GNIC0_PREG_ERROR_REG 31:0 /* R--VF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0 0x0013CE3F:0x0013CE00 /* RW--D */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG 0x0013CE00 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG1 0x0013CE04 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG 0x0013CE08 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG1 0x0013CE0C /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_EG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG 0x0013CE10 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_BF_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_BF_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_BF_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN 1:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN 2:2 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN 3:3 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH 8:4 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS 14:12 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_NONE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_1ITER 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_2ITER 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_3ITER 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_ALL 0x4 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP 15:15 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_AC 20:20 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_DC 21:21 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_BX 22:22 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP 23:23 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN 25:25 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH 30:26 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2C_AC 31:31 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL 0x0013CE14 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL 6:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL 22:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PERF_ENABLE 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PERF_ENABLE_OFF 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL_PERF_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0 0x0013CE18 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_CMD 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_CMD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_CMD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_DATA 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_DATA_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_DATA_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_FOLD 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT0 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT1 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT2 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT3 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP0 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP1 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP2 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP3 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_RGG 16:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_RGG_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_RGG_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_GPM 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_GPM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_GPM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP4 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP5 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT4 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT5 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT6 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT7 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1 0x0013CE1C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX0 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX1 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX2 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX3 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_RASTER 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_GCC 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_GCC_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_GCC_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX4 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX5 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX6 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX7 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX8 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX9 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX10 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX11 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1 18:18 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2 19:19 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3 20:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4 21:21 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT 30:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M0 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M1 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M2 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M3 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M4 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M5 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M6 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M7 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z0 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z1 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z2 0x0A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z3 0x0B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z4 0x0C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z5 0x0D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z6 0x0E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z7 0x0F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_AZ 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2 0x0013CE20 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_PMM 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_PMM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_PMM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_ROP0 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_ROP1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1 0x0013CE24 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL 19:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL 23:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL 27:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL 31:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2 0x0013CE28 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG2 0x0013CE2C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG2_COMP_WT 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG2_COMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG2_UNCOMP_WT 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG2_UNCOMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG2_CYA 31:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ARB_CFG2_CYA_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IDLE_FILTER 0x0013CE30 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IDLE_FILTER_GR_IDLE 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IDLE_FILTER_GR_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ERROR 0x0013CE34 /* R--4R */ #define NV_XBAR_MXBAR_PRI_GPC4_GNIC0_PREG_ERROR_REG 31:0 /* R--VF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0 0x0013CEBF:0x0013CE80 /* RW--D */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG 0x0013CE80 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG1 0x0013CE84 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG 0x0013CE88 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG1 0x0013CE8C /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_EG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG 0x0013CE90 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_BF_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_BF_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_BF_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN 1:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN 2:2 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN 3:3 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH 8:4 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS 14:12 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_NONE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_1ITER 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_2ITER 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_3ITER 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_ALL 0x4 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP 15:15 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_AC 20:20 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_DC 21:21 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_BX 22:22 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP 23:23 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN 25:25 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH 30:26 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2C_AC 31:31 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL 0x0013CE94 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL 6:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL 22:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PERF_ENABLE 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PERF_ENABLE_OFF 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL_PERF_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0 0x0013CE98 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_CMD 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_CMD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_CMD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_DATA 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_DATA_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_DATA_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_FOLD 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT0 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT1 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT2 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT3 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP0 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP1 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP2 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP3 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_RGG 16:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_RGG_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_RGG_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_GPM 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_GPM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_GPM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP4 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP5 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT4 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT5 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT6 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT7 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1 0x0013CE9C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX0 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX1 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX2 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX3 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_RASTER 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_GCC 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_GCC_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_GCC_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX4 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX5 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX6 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX7 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX8 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX9 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX10 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX11 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1 18:18 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2 19:19 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3 20:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4 21:21 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT 30:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M0 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M1 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M2 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M3 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M4 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M5 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M6 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M7 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z0 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z1 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z2 0x0A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z3 0x0B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z4 0x0C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z5 0x0D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z6 0x0E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z7 0x0F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_AZ 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2 0x0013CEA0 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_PMM 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_PMM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_PMM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_ROP0 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_ROP1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1 0x0013CEA4 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL 19:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL 23:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL 27:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL 31:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2 0x0013CEA8 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG2 0x0013CEAC /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG2_COMP_WT 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG2_COMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG2_UNCOMP_WT 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG2_UNCOMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG2_CYA 31:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ARB_CFG2_CYA_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IDLE_FILTER 0x0013CEB0 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IDLE_FILTER_GR_IDLE 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IDLE_FILTER_GR_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ERROR 0x0013CEB4 /* R--4R */ #define NV_XBAR_MXBAR_PRI_GPC5_GNIC0_PREG_ERROR_REG 31:0 /* R--VF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0 0x0013CF3F:0x0013CF00 /* RW--D */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG 0x0013CF00 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG1 0x0013CF04 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG 0x0013CF08 /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT 5:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_IDLE_CG_DLY_CNT__PROD 0x00000002 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_IDLE_CG_EN 6:6 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_IDLE_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_IDLE_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_IDLE_CG_EN__PROD 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STATE_CG_EN 7:7 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STATE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STATE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STATE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT 13:8 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STALL_CG_DLY_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STALL_CG_EN 14:14 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STALL_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STALL_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_STALL_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN 15:15 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_QUIESCENT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT 19:16 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT_HWINIT 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_WAKEUP_DLY_CNT__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_CNT 23:20 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_CNT_FULLSPEED 0x0000000f /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_CNT__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL 27:24 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL_HWINIT 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_DI_DT_SKEW_VAL__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_EN 28:28 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER 29:29 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_EN 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER_DIS 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_THROT_CLK_SW_OVER__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_PAUSE_CG_EN 30:30 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_PAUSE_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_PAUSE_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_PAUSE_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_HALT_CG_EN 31:31 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_HALT_CG_EN_ENABLED 0x00000001 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_HALT_CG_EN_DISABLED 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG_HALT_CG_EN__PROD 0x00000000 /* */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG1 0x0013CF0C /* RWI4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG1_MONITOR_CG_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_ENABLED 0x00000001 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG1_MONITOR_CG_EN_DISABLED 0x00000000 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG1_MONITOR_CG_EN__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG1_SLCG 28:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG1_SLCG_ENABLED 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG1_SLCG_DISABLED 0x0FFFFFFF /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_EG_CG1_SLCG__PROD 0x00000000 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG 0x0013CF10 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_BF_EN 0:0 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_BF_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_BF_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN 1:1 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_GLOBAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN 2:2 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_LOCAL_PACK_EN_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN 3:3 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH 8:4 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_IG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS 14:12 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_NONE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_1ITER 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_2ITER 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_3ITER 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_BF_NUM_ITERS_ALL 0x4 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP 15:15 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_IGNORE_X2G_WAKEUP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_AC 20:20 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_DC 21:21 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_DC_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_BX 22:22 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_BX_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP 23:23 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2T_BYP_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN 25:25 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_ON 1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_EN_OFF 0 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH 30:26 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_4 0x00 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_6 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_8 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_12 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_16 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_24 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_32 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_48 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_64 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_96 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_128 0x0a /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_192 0x0b /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_256 0x0c /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_384 0x0d /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_EG_STARVE_MODE_RED_THRESH_INIT 0x04 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2C_AC 31:31 /* RWIVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_ON 1 /* RWI-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG_DBI_G2C_AC_OFF 0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL 0x0013CF14 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL 6:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM0_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL 22:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP8 0x8 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP9 0x9 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP10 0xA /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP11 0xB /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP12 0xC /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP13 0xD /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP14 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP15 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP16 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP17 0x11 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP18 0x12 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP19 0x13 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP20 0x14 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP21 0x15 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP22 0x16 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP23 0x17 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP24 0x18 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP25 0x19 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP26 0x1A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP27 0x1B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP28 0x1C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP29 0x1D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP30 0x1E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP31 0x1F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP32 0x20 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP33 0x21 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP34 0x22 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP35 0x23 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP36 0x24 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP37 0x25 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP38 0x26 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP39 0x27 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP40 0x28 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP41 0x29 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP42 0x2A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP43 0x2B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP44 0x2C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP45 0x2D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP46 0x2E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP47 0x2F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP48 0x30 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP49 0x31 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP50 0x32 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP51 0x33 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP52 0x34 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP53 0x35 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP54 0x36 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP55 0x37 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP56 0x38 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP57 0x39 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP58 0x3A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP59 0x3B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP60 0x3C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP61 0x3D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP62 0x3E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP63 0x3F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP64 0x40 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP65 0x41 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP66 0x42 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP67 0x43 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP68 0x44 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP69 0x45 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP70 0x46 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP71 0x47 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP72 0x48 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP73 0x49 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP74 0x4A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP75 0x4B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP76 0x4C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP77 0x4D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP78 0x4E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP79 0x4F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP80 0x50 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP81 0x51 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP82 0x52 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP83 0x53 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP84 0x54 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP85 0x55 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP86 0x56 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP87 0x57 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP88 0x58 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP89 0x59 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP90 0x5A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP91 0x5B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP92 0x5C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP93 0x5D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP94 0x5E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP95 0x5F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP96 0x60 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP97 0x61 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP98 0x62 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP99 0x63 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP100 0x64 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP101 0x65 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP102 0x66 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP103 0x67 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP104 0x68 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP105 0x69 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP106 0x6A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP107 0x6B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP108 0x6C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP109 0x6D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP110 0x6E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP111 0x6F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP112 0x70 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP113 0x71 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP114 0x72 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP115 0x73 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP116 0x74 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP117 0x75 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP118 0x76 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP119 0x77 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP120 0x78 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP121 0x79 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP122 0x7A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_GRP123 0x7B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_AA 0x7C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PM1_PERF_SEL_STATIC_PATTERN_55 0x7D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PERF_ENABLE 31:31 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PERF_ENABLE_OFF 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL_PERF_ENABLE_ON 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0 0x0013CF18 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_CMD 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_CMD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_CMD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_DATA 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_DATA_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_DATA_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_FOLD 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_FOLD_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT0 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT1 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT2 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT3 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_VC_BF_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_VC_NB_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_ASYNC_CDT_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_VC_BH_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP0 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP1 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP2 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP3 15:15 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_RGG 16:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_RGG_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_RGG_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_GPM 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_GPM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_GPM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP4 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP5 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_LTP5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT4 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT5 27:27 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT6 28:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT7 29:29 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL0_PORT7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1 0x0013CF1C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX0 0:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX1 1:1 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX2 2:2 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX3 3:3 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_RASTER 4:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_RASTER_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_GCC 5:5 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_GCC_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_GCC_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS 6:6 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_GPCCS_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX4 7:7 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX5 8:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX6 9:9 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX6_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX7 10:10 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX7_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX8 11:11 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX8_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX9 12:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX9_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX10 13:13 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX10_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX11 14:14 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TEX11_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0 17:17 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS0_PE0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1 18:18 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS1_PE1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2 19:19 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS2_PE2_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3 20:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS3_PE3_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4 21:21 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS4_PE4_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_TPCCS5_PE5_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_SAME_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_VPACK_DIFF_DST_DISALE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT 30:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M0 0x00 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M1 0x01 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M2 0x02 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M3 0x03 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M4 0x04 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M5 0x05 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M6 0x06 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_M7 0x07 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z0 0x08 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z1 0x09 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z2 0x0A /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z3 0x0B /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z4 0x0C /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z5 0x0D /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z6 0x0E /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_Z7 0x0F /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL1_WDATPAT_AZ 0x10 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2 0x0013CF20 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_PMM 22:22 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_PMM_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_PMM_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_ROP0 23:23 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_ROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0 24:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP0_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_ROP1 25:25 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_ROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1 26:26 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_ENABLE 0x1 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_FILTER_CTRL2_UTLBROP1_DISABLE 0x0 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1 0x0013CF24 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX0_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX1_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX2_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX3_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL 19:16 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX4_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL 23:20 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX5_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL 27:24 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX6_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL 31:28 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL1_TEX7_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2 0x0013CF28 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX8_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX9_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX10_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL 15:12 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP0 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP1 0x1 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP2 0x2 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP3 0x3 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP4 0x4 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP5 0x5 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP6 0x6 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_GRP7 0x7 /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_AAAA_16_GROUP 0xE /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_PM_CTRL2_TEX11_PERF_SEL_STATIC_PATTERN_5555_16_GROUP 0xF /* RW--V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG2 0x0013CF2C /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG2_COMP_WT 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG2_COMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG2_UNCOMP_WT 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG2_UNCOMP_WT_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG2_CYA 31:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ARB_CFG2_CYA_INIT 0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IDLE_FILTER 0x0013CF30 /* RW-4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IDLE_FILTER_GR_IDLE 3:0 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IDLE_FILTER_GR_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE 7:4 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IDLE_FILTER_IG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE 11:8 /* RWEVF */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_IDLE_FILTER_EG_BLCG_IDLE_INIT 0x0 /* RWE-V */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ERROR 0x0013CF34 /* R--4R */ #define NV_XBAR_MXBAR_PRI_GPC6_GNIC0_PREG_ERROR_REG 31:0 /* R--VF */ #define NV_XBAR_MXBAR_CS_PRI_GXI_PREG_CTRL(i) (NV_XBAR_MXBAR_CS_PRI_GPC0_GXI_PREG_CTRL + (i) * 0x80) #define NV_XBAR_MXBAR_CS_PRI_GXI_PREG_CTRL__SIZE_1 7 #define NV_XBAR_MXBAR_CS_PRI_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK NV_XBAR_MXBAR_CS_PRI_GPC0_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK #define NV_XBAR_MXBAR_CS_PRI_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_DISABLE NV_XBAR_MXBAR_CS_PRI_GPC0_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_DISABLE #define NV_XBAR_MXBAR_CS_PRI_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_ENABLE NV_XBAR_MXBAR_CS_PRI_GPC0_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_ENABLE #define NV_XBAR_WXBAR_CS_PRI_GXI_PREG_CTRL(i) (NV_XBAR_WXBAR_CS_PRI_GPC0_GXI_PREG_CTRL + (i) * 0x40) #define NV_XBAR_WXBAR_CS_PRI_GXI_PREG_CTRL__SIZE_1 7 #define NV_XBAR_WXBAR_CS_PRI_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK NV_XBAR_WXBAR_CS_PRI_GPC0_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK #define NV_XBAR_WXBAR_CS_PRI_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_DISABLE NV_XBAR_WXBAR_CS_PRI_GPC0_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_DISABLE #define NV_XBAR_WXBAR_CS_PRI_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_ENABLE NV_XBAR_WXBAR_CS_PRI_GPC0_GXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_ENABLE #define NV_XBAR_MXBAR_CS_PRI_FXI_PREG_CTRL(i) (NV_XBAR_MXBAR_CS_PRI_FBP0_FXI_PREG_CTRL + (i) * 0x80) #define NV_XBAR_MXBAR_CS_PRI_FXI_PREG_CTRL__SIZE_1 6 #define NV_XBAR_MXBAR_CS_PRI_FXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK NV_XBAR_MXBAR_CS_PRI_FBP0_FXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK #define NV_XBAR_MXBAR_CS_PRI_FXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_DISABLE NV_XBAR_MXBAR_CS_PRI_FBP0_FXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_DISABLE #define NV_XBAR_MXBAR_CS_PRI_FXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_ENABLE NV_XBAR_MXBAR_CS_PRI_FBP0_FXI_PREG_CTRL_CHIPLET_CLK_EQ_XBAR_CLK_ENABLE #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI_PREG_FBP_PORT_SEL_FBP(i) (i):(i) #define NV_XBAR_MXBAR_CS_PRI_SYS0_HXI_PREG_FBP_PORT_SEL_FBP__SIZE_1 6 #endif // __ga102_dev_xbar_h__