first commit
This commit is contained in:
Ole Algoritme
698
include/nva/regspace.c
Normal file
698
include/nva/regspace.c
Normal file
@@ -0,0 +1,698 @@
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#include "nva.h"
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#include <stddef.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include <pciaccess.h>
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int nva_wr(struct nva_regspace *regspace, uint32_t addr, uint64_t val) {
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void *rawbase = 0;
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size_t rawlen;
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void *raw;
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int i;
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uint32_t vgaio;
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uint32_t vgabase;
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switch (regspace->type) {
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case NVA_REGSPACE_BAR0:
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rawbase = regspace->card->bar0;
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rawlen = regspace->card->bar0len;
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goto raw;
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case NVA_REGSPACE_BAR1:
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rawbase = regspace->card->bar1;
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rawlen = regspace->card->bar1len;
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if (!regspace->card->hasbar1)
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return NVA_ERR_NOSPC;
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goto raw;
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case NVA_REGSPACE_BAR2:
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rawbase = regspace->card->bar2;
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rawlen = regspace->card->bar2len;
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if (!regspace->card->hasbar2)
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return NVA_ERR_NOSPC;
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goto raw;
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case NVA_REGSPACE_RAWMEM:
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rawbase = regspace->card->rawmem;
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rawlen = 0x100000;
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raw:
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if (!rawbase)
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return NVA_ERR_MAP;
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if (addr > rawlen - regspace->regsz)
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return NVA_ERR_RANGE;
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raw = (uint8_t *)rawbase + addr;
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switch (regspace->regsz) {
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case 1:
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*(volatile uint8_t *)raw = val;
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return 0;
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case 2:
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*(volatile uint16_t *)raw = val;
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return 0;
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case 4:
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*(volatile uint32_t *)raw = val;
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return 0;
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case 8:
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*(volatile uint64_t *)raw = val;
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return 0;
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default:
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return NVA_ERR_REGSZ;
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}
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case NVA_REGSPACE_IOBAR:
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if (!regspace->card->iobar)
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return NVA_ERR_NOSPC;
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if (addr > regspace->card->iobarlen - regspace->regsz)
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return NVA_ERR_RANGE;
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switch (regspace->regsz) {
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case 1:
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pci_io_write8(regspace->card->iobar, addr, val);
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return 0;
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case 2:
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pci_io_write16(regspace->card->iobar, addr, val);
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return 0;
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case 4:
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pci_io_write32(regspace->card->iobar, addr, val);
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return 0;
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default:
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return NVA_ERR_REGSZ;
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}
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case NVA_REGSPACE_RAWIO:
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if (!regspace->card->rawio)
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return NVA_ERR_NOSPC;
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if (addr > 0x10000 - regspace->regsz)
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return NVA_ERR_RANGE;
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switch (regspace->regsz) {
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case 1:
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pci_io_write8(regspace->card->rawio, addr, val);
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return 0;
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case 2:
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pci_io_write16(regspace->card->rawio, addr, val);
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return 0;
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case 4:
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pci_io_write32(regspace->card->rawio, addr, val);
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return 0;
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default:
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return NVA_ERR_REGSZ;
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}
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case NVA_REGSPACE_PDAC:
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if (regspace->card->chipset.chipset != 0x01)
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return NVA_ERR_NOSPC;
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if (addr > 0x10000 - regspace->regsz)
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return NVA_ERR_RANGE;
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if (regspace->regsz > 8)
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return NVA_ERR_REGSZ;
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nva_wr32(regspace->cnum, 0x609010, addr & 0xff);
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nva_wr32(regspace->cnum, 0x609014, addr >> 8);
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for (i = 0; i < regspace->regsz; i++)
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nva_wr32(regspace->cnum, 0x609018, (val >> i * 8) & 0xff);
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return 0;
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case NVA_REGSPACE_EEPROM:
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if (regspace->card->chipset.chipset != 0x01)
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return NVA_ERR_NOSPC;
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if (regspace->regsz != 1)
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return NVA_ERR_REGSZ;
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if (addr >= 0x80)
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return NVA_ERR_RANGE;
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while (nva_rd32(regspace->cnum, 0x60a400) & 0x10000000);
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nva_wr32(regspace->cnum, 0x60a400, 0x1000000 | addr << 8 | (val & 0xff));
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while (nva_rd32(regspace->cnum, 0x60a400) & 0x10000000);
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return 0;
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case NVA_REGSPACE_VGA_CR:
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vgaio = 0x3d4;
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if (addr >= 0x100)
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return NVA_ERR_RANGE;
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goto vga;
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case NVA_REGSPACE_VGA_SR:
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vgaio = 0x3c4;
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if (addr >= 8)
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return NVA_ERR_RANGE;
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goto vga;
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case NVA_REGSPACE_VGA_GR:
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vgaio = 0x3ce;
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if (addr >= 0x10)
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return NVA_ERR_RANGE;
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goto vga;
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case NVA_REGSPACE_VGA_AR:
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vgaio = 0x3c0;
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if (addr >= 0x20)
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return NVA_ERR_RANGE;
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goto vga;
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vga:
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if (regspace->regsz != 1)
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return NVA_ERR_REGSZ;
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if (regspace->card->chipset.card_type == 0x01) {
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vgabase = 0x6d0000;
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if (regspace->idx != 0)
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return NVA_ERR_NOSPC;
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} else if (regspace->card->chipset.card_type < 0x50) {
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if (vgaio == 0x3c4 || vgaio == 0x3ce)
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vgabase = 0x0c0000;
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else
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vgabase = 0x601000;
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if (regspace->idx > 2)
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return NVA_ERR_NOSPC;
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if ((regspace->card->chipset.chipset < 0x17 || regspace->card->chipset.chipset == 0x1a || regspace->card->chipset.chipset == 0x20) && regspace->idx == 1)
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return NVA_ERR_NOSPC;
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vgabase += regspace->idx * 0x2000;
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} else {
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vgabase = 0x601000;
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if (regspace->idx != 0)
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return NVA_ERR_NOSPC;
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}
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if (vgaio == 0x3c0) {
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nva_rd8(regspace->cnum, vgabase + 0x3da);
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uint8_t idx = nva_rd8(regspace->cnum, vgabase + 0x3c0);
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nva_rd8(regspace->cnum, vgabase + 0x3da);
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nva_wr8(regspace->cnum, vgabase + 0x3c0, addr);
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nva_wr8(regspace->cnum, vgabase + 0x3c0, val);
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nva_wr8(regspace->cnum, vgabase + 0x3c0, idx);
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} else {
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uint8_t idx = nva_rd8(regspace->cnum, vgabase + vgaio);
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nva_wr8(regspace->cnum, vgabase + vgaio, addr);
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nva_wr8(regspace->cnum, vgabase + vgaio + 1, val);
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nva_wr8(regspace->cnum, vgabase + vgaio, idx);
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}
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return 0;
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case NVA_REGSPACE_VGA_ST:
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if (regspace->card->chipset.chipset < 0x41)
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return NVA_ERR_NOSPC;
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if (regspace->regsz != 1)
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return NVA_ERR_REGSZ;
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uint32_t vstbase = 0x1380;
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if (regspace->card->chipset.card_type >= 0x50)
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vstbase = 0x619e40;
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uint32_t savepos = nva_rd32(regspace->cnum, vstbase+0xc);
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uint32_t savecfg = nva_rd32(regspace->cnum, vstbase+0x8);
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nva_wr32(regspace->cnum, vstbase+0xc, addr);
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nva_wr32(regspace->cnum, vstbase+0x8, 7);
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nva_wr32(regspace->cnum, vstbase+0x0, val);
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nva_wr32(regspace->cnum, vstbase+0x8, savecfg);
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nva_wr32(regspace->cnum, vstbase+0xc, savepos);
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return 0;
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case NVA_REGSPACE_DPRAM:
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if (regspace->card->chipset.chipset == 0x34) {
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if (regspace->regsz != 4)
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return NVA_ERR_REGSZ;
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nva_wr32(regspace->cnum, 0x400bb0, addr);
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nva_wr32(regspace->cnum, 0x400bb4, val);
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return 0;
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}
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if (regspace->card->chipset.card_type < 4 || regspace->card->chipset.card_type >= 0x20)
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return NVA_ERR_NOSPC;
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if (regspace->regsz != 4)
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return NVA_ERR_REGSZ;
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nva_wr32(regspace->cnum, 0x400828, addr);
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nva_wr32(regspace->cnum, 0x40082c, val);
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return 0;
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case NVA_REGSPACE_PIPE:
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if (regspace->card->chipset.card_type < 0x10 || regspace->card->chipset.card_type >= 0x50)
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return NVA_ERR_NOSPC;
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if (regspace->regsz != 4)
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return NVA_ERR_REGSZ;
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nva_wr32(regspace->cnum, 0x400f50, addr);
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nva_wr32(regspace->cnum, 0x400f54, val);
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return 0;
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case NVA_REGSPACE_RDI:
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if (regspace->card->chipset.chipset == 0x17 || regspace->card->chipset.chipset == 0x18 || regspace->card->chipset.chipset == 0x1f) {
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if (regspace->regsz != 4)
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return NVA_ERR_REGSZ;
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nva_wr32(regspace->cnum, 0x400a08, addr);
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nva_wr32(regspace->cnum, 0x400a0c, val);
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return 0;
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}
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if (regspace->card->chipset.card_type < 0x20 || regspace->card->chipset.card_type >= 0x50)
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return NVA_ERR_NOSPC;
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nva_wr32(regspace->cnum, 0x400750, addr);
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nva_wr32(regspace->cnum, 0x400754, val);
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return 0;
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case NVA_REGSPACE_RDIB:
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if (regspace->card->chipset.card_type < 0x20 || regspace->card->chipset.card_type >= 0x50)
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return NVA_ERR_NOSPC;
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nva_wr32(regspace->cnum, 0x400750, addr);
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nva_wr32(regspace->cnum, 0x400758, val);
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return 0;
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case NVA_REGSPACE_VCOMP_CODE:
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if (regspace->card->chipset.chipset != 0xaf)
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return NVA_ERR_NOSPC;
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if (regspace->regsz != 4)
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return NVA_ERR_REGSZ;
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nva_wr32(regspace->cnum, 0x1c17c8, addr);
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nva_wr32(regspace->cnum, 0x1c17cc, val);
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return 0;
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case NVA_REGSPACE_VCOMP_REG:
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if (regspace->card->chipset.chipset != 0xaf)
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return NVA_ERR_NOSPC;
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if (regspace->regsz != 8)
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return NVA_ERR_REGSZ;
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nva_wr32(regspace->cnum, 0x1c17d0, addr/8);
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nva_wr32(regspace->cnum, 0x1c17d4, val);
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nva_wr32(regspace->cnum, 0x1c17d8, val >> 32);
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return 0;
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case NVA_REGSPACE_MACRO_CODE:
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if (regspace->card->chipset.chipset < 0xc0)
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return NVA_ERR_NOSPC;
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if (regspace->regsz != 4)
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return NVA_ERR_REGSZ;
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nva_wr32(regspace->cnum, 0x40986c, 0x10);
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nva_wr32(regspace->cnum, 0x409ffc, 2);
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nva_wr32(regspace->cnum, 0x409928, 0xc);
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while (nva_rd32(regspace->cnum, 0x409928));
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nva_wr32(regspace->cnum, 0x40993c, 0xf);
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nva_wr32(regspace->cnum, 0x409928, 0xa);
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while (nva_rd32(regspace->cnum, 0x409928));
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nva_wr32(regspace->cnum, 0x40991c, 0x1);
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nva_wr32(regspace->cnum, 0x409928, 0x1);
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while (nva_rd32(regspace->cnum, 0x409928));
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for (i = 0; i < addr; i+=4) {
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nva_wr32(regspace->cnum, 0x409928, 0x6);
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while (nva_rd32(regspace->cnum, 0x409928));
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}
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nva_wr32(regspace->cnum, 0x409918, val);
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nva_wr32(regspace->cnum, 0x409928, 0x7);
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while (nva_rd32(regspace->cnum, 0x409928));
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return 0;
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case NVA_REGSPACE_XT:
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if (regspace->regsz != 4)
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return NVA_ERR_REGSZ;
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nva_wr32(regspace->cnum, 0x1700, 0x30);
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nva_wr32(regspace->cnum, 0x700004, addr);
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nva_wr32(regspace->cnum, 0x700008, val);
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nva_wr32(regspace->cnum, 0x70000, 1);
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while (nva_rd32(regspace->cnum, 0x70000));
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nva_wr32(regspace->cnum, 0x700000, 2);
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while (nva_rd32(regspace->cnum, 0x700000));
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return 0;
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default:
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return NVA_ERR_NOSPC;
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}
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}
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int nva_rd(struct nva_regspace *regspace, uint32_t addr, uint64_t *val) {
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void *rawbase = 0;
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size_t rawlen;
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void *raw;
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int i;
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uint32_t vgaio;
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uint32_t vgabase;
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switch (regspace->type) {
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case NVA_REGSPACE_BAR0:
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rawbase = regspace->card->bar0;
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rawlen = regspace->card->bar0len;
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goto raw;
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case NVA_REGSPACE_BAR1:
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rawbase = regspace->card->bar1;
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rawlen = regspace->card->bar1len;
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goto raw;
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case NVA_REGSPACE_BAR2:
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rawbase = regspace->card->bar2;
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rawlen = regspace->card->bar2len;
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goto raw;
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case NVA_REGSPACE_RAWMEM:
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rawbase = regspace->card->rawmem;
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rawlen = 0x100000;
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raw:
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if (!rawbase)
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return NVA_ERR_MAP;
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if (addr > rawlen - regspace->regsz)
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return NVA_ERR_RANGE;
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raw = (uint8_t *)rawbase + addr;
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switch (regspace->regsz) {
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case 1:
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*val = *(volatile uint8_t *)raw;
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return 0;
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case 2:
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*val = *(volatile uint16_t *)raw;
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return 0;
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case 4:
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*val = *(volatile uint32_t *)raw;
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return 0;
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case 8:
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*val = *(volatile uint64_t *)raw;
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return 0;
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default:
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return NVA_ERR_REGSZ;
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}
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case NVA_REGSPACE_IOBAR:
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if (!regspace->card->iobar)
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return NVA_ERR_NOSPC;
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if (addr > regspace->card->iobarlen - regspace->regsz)
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return NVA_ERR_RANGE;
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switch (regspace->regsz) {
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case 1:
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*val = pci_io_read8(regspace->card->iobar, addr);
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return 0;
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case 2:
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*val = pci_io_read16(regspace->card->iobar, addr);
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return 0;
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case 4:
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*val = pci_io_read32(regspace->card->iobar, addr);
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return 0;
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default:
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return NVA_ERR_REGSZ;
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}
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case NVA_REGSPACE_RAWIO:
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if (!regspace->card->rawio)
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return NVA_ERR_NOSPC;
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if (addr > 0x10000 - regspace->regsz)
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return NVA_ERR_RANGE;
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switch (regspace->regsz) {
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case 1:
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*val = pci_io_read8(regspace->card->rawio, addr);
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return 0;
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case 2:
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*val = pci_io_read16(regspace->card->rawio, addr);
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return 0;
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case 4:
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*val = pci_io_read32(regspace->card->rawio, addr);
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return 0;
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default:
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return NVA_ERR_REGSZ;
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}
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case NVA_REGSPACE_PDAC:
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if (regspace->card->chipset.chipset != 0x01)
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return NVA_ERR_NOSPC;
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if (addr > 0x10000 - regspace->regsz)
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return NVA_ERR_RANGE;
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if (regspace->regsz > 8)
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return NVA_ERR_REGSZ;
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nva_wr32(regspace->cnum, 0x609010, addr & 0xff);
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nva_wr32(regspace->cnum, 0x609014, addr >> 8);
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*val = 0;
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for (i = 0; i < regspace->regsz; i++)
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*val |= (uint64_t)(nva_rd32(regspace->cnum, 0x609018) & 0xff) << i * 8;
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return 0;
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case NVA_REGSPACE_EEPROM:
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if (regspace->card->chipset.chipset != 0x01)
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return NVA_ERR_NOSPC;
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if (regspace->regsz != 1)
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return NVA_ERR_REGSZ;
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if (addr >= 0x80)
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return NVA_ERR_RANGE;
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while (nva_rd32(regspace->cnum, 0x60a400) & 0x10000000);
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nva_wr32(regspace->cnum, 0x60a400, 0x2000000 | addr << 8);
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while (nva_rd32(regspace->cnum, 0x60a400) & 0x10000000);
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*val = nva_rd32(regspace->cnum, 0x60a400) & 0xff;
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return 0;
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case NVA_REGSPACE_VGA_CR:
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vgaio = 0x3d4;
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if (addr >= 0x100)
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return NVA_ERR_RANGE;
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goto vga;
|
||||
case NVA_REGSPACE_VGA_SR:
|
||||
vgaio = 0x3c4;
|
||||
if (addr >= 8)
|
||||
return NVA_ERR_RANGE;
|
||||
goto vga;
|
||||
case NVA_REGSPACE_VGA_GR:
|
||||
vgaio = 0x3ce;
|
||||
if (addr >= 0x10)
|
||||
return NVA_ERR_RANGE;
|
||||
goto vga;
|
||||
case NVA_REGSPACE_VGA_AR:
|
||||
vgaio = 0x3c0;
|
||||
if (addr >= 0x20)
|
||||
return NVA_ERR_RANGE;
|
||||
goto vga;
|
||||
vga:
|
||||
if (regspace->regsz != 1)
|
||||
return NVA_ERR_REGSZ;
|
||||
if (regspace->card->chipset.card_type == 0x01) {
|
||||
vgabase = 0x6d0000;
|
||||
if (regspace->idx != 0)
|
||||
return NVA_ERR_NOSPC;
|
||||
} else if (regspace->card->chipset.card_type < 0x50) {
|
||||
if (vgaio == 0x3c4 || vgaio == 0x3ce)
|
||||
vgabase = 0x0c0000;
|
||||
else
|
||||
vgabase = 0x601000;
|
||||
if (regspace->idx > 2)
|
||||
return NVA_ERR_NOSPC;
|
||||
if ((regspace->card->chipset.chipset < 0x17 || regspace->card->chipset.chipset == 0x1a || regspace->card->chipset.chipset == 0x20) && regspace->idx == 1)
|
||||
return NVA_ERR_NOSPC;
|
||||
vgabase += regspace->idx * 0x2000;
|
||||
} else {
|
||||
vgabase = 0x601000;
|
||||
if (regspace->idx != 0)
|
||||
return NVA_ERR_NOSPC;
|
||||
}
|
||||
if (vgaio == 0x3c0) {
|
||||
nva_rd8(regspace->cnum, vgabase + 0x3da);
|
||||
uint8_t idx = nva_rd8(regspace->cnum, vgabase + 0x3c0);
|
||||
nva_rd8(regspace->cnum, vgabase + 0x3da);
|
||||
nva_wr8(regspace->cnum, vgabase + 0x3c0, addr);
|
||||
*val = nva_rd8(regspace->cnum, vgabase + 0x3c1);
|
||||
nva_rd8(regspace->cnum, vgabase + 0x3da);
|
||||
nva_wr8(regspace->cnum, vgabase + 0x3c0, idx);
|
||||
} else {
|
||||
uint8_t idx = nva_rd8(regspace->cnum, vgabase + vgaio);
|
||||
nva_wr8(regspace->cnum, vgabase + vgaio, addr);
|
||||
*val = nva_rd8(regspace->cnum, vgabase + vgaio + 1);
|
||||
nva_wr8(regspace->cnum, vgabase + vgaio, idx);
|
||||
}
|
||||
return 0;
|
||||
case NVA_REGSPACE_VGA_ST:
|
||||
if (regspace->card->chipset.chipset < 0x41)
|
||||
return NVA_ERR_NOSPC;
|
||||
if (regspace->regsz != 1)
|
||||
return NVA_ERR_REGSZ;
|
||||
uint32_t vstbase = 0x1380;
|
||||
if (regspace->card->chipset.card_type >= 0x50)
|
||||
vstbase = 0x619e40;
|
||||
uint32_t savepos = nva_rd32(regspace->cnum, vstbase+0xc);
|
||||
uint32_t savecfg = nva_rd32(regspace->cnum, vstbase+0x8);
|
||||
nva_wr32(regspace->cnum, vstbase+0xc, addr+1);
|
||||
nva_wr32(regspace->cnum, vstbase+0x8, 7);
|
||||
*val = nva_rd32(regspace->cnum, vstbase+0x0);
|
||||
nva_wr32(regspace->cnum, vstbase+0x8, savecfg);
|
||||
nva_wr32(regspace->cnum, vstbase+0xc, savepos);
|
||||
return 0;
|
||||
case NVA_REGSPACE_DPRAM:
|
||||
if (regspace->card->chipset.chipset == 0x34) {
|
||||
if (regspace->regsz != 4)
|
||||
return NVA_ERR_REGSZ;
|
||||
nva_wr32(regspace->cnum, 0x400bb0, addr);
|
||||
*val = nva_rd32(regspace->cnum, 0x400bb4);
|
||||
return 0;
|
||||
}
|
||||
if (regspace->card->chipset.card_type < 4 || regspace->card->chipset.card_type >= 0x20)
|
||||
return NVA_ERR_NOSPC;
|
||||
if (regspace->regsz != 4)
|
||||
return NVA_ERR_REGSZ;
|
||||
nva_wr32(regspace->cnum, 0x400828, addr);
|
||||
*val = nva_rd32(regspace->cnum, 0x40082c);
|
||||
return 0;
|
||||
case NVA_REGSPACE_PIPE:
|
||||
if (regspace->card->chipset.card_type < 0x10 || regspace->card->chipset.card_type >= 0x50)
|
||||
return NVA_ERR_NOSPC;
|
||||
if (regspace->regsz != 4)
|
||||
return NVA_ERR_REGSZ;
|
||||
nva_wr32(regspace->cnum, 0x400f50, addr);
|
||||
*val = nva_rd32(regspace->cnum, 0x400f54);
|
||||
return 0;
|
||||
case NVA_REGSPACE_RDI:
|
||||
if (regspace->card->chipset.chipset == 0x17 || regspace->card->chipset.chipset == 0x18 || regspace->card->chipset.chipset == 0x1f) {
|
||||
if (regspace->regsz != 4)
|
||||
return NVA_ERR_REGSZ;
|
||||
nva_wr32(regspace->cnum, 0x400a08, addr);
|
||||
*val = nva_rd32(regspace->cnum, 0x400a0c);
|
||||
return 0;
|
||||
}
|
||||
if (regspace->card->chipset.card_type < 0x20 || regspace->card->chipset.card_type >= 0x50)
|
||||
return NVA_ERR_NOSPC;
|
||||
if (regspace->regsz != 4)
|
||||
return NVA_ERR_REGSZ;
|
||||
nva_wr32(regspace->cnum, 0x400750, addr);
|
||||
*val = nva_rd32(regspace->cnum, 0x400754);
|
||||
return 0;
|
||||
case NVA_REGSPACE_RDIB:
|
||||
if (regspace->card->chipset.card_type < 0x20 || regspace->card->chipset.card_type >= 0x50)
|
||||
return NVA_ERR_NOSPC;
|
||||
if (regspace->regsz != 4)
|
||||
return NVA_ERR_REGSZ;
|
||||
nva_wr32(regspace->cnum, 0x400750, addr);
|
||||
*val = nva_rd32(regspace->cnum, 0x400758);
|
||||
return 0;
|
||||
case NVA_REGSPACE_VCOMP_CODE:
|
||||
if (regspace->card->chipset.chipset != 0xaf)
|
||||
return NVA_ERR_NOSPC;
|
||||
if (regspace->regsz != 4)
|
||||
return NVA_ERR_REGSZ;
|
||||
nva_wr32(regspace->cnum, 0x1c17c8, addr);
|
||||
*val = nva_rd32(regspace->cnum, 0x1c17cc);
|
||||
return 0;
|
||||
case NVA_REGSPACE_VCOMP_REG:
|
||||
if (regspace->card->chipset.chipset != 0xaf)
|
||||
return NVA_ERR_NOSPC;
|
||||
if (regspace->regsz != 8)
|
||||
return NVA_ERR_REGSZ;
|
||||
nva_wr32(regspace->cnum, 0x1c17d0, addr/8);
|
||||
*val = nva_rd32(regspace->cnum, 0x1c17d4);
|
||||
*val |= (uint64_t)nva_rd32(regspace->cnum, 0x1c17d8) << 32;
|
||||
return 0;
|
||||
case NVA_REGSPACE_MACRO_CODE:
|
||||
if (regspace->card->chipset.chipset < 0xc0)
|
||||
return NVA_ERR_NOSPC;
|
||||
if (regspace->regsz != 4)
|
||||
return NVA_ERR_REGSZ;
|
||||
nva_wr32(regspace->cnum, 0x40986c, 0x10);
|
||||
nva_wr32(regspace->cnum, 0x409ffc, 2);
|
||||
nva_wr32(regspace->cnum, 0x409928, 0xc);
|
||||
while (nva_rd32(regspace->cnum, 0x409928));
|
||||
nva_wr32(regspace->cnum, 0x40993c, 0xf);
|
||||
nva_wr32(regspace->cnum, 0x409928, 0xa);
|
||||
while (nva_rd32(regspace->cnum, 0x409928));
|
||||
nva_wr32(regspace->cnum, 0x40991c, 0x1);
|
||||
nva_wr32(regspace->cnum, 0x409928, 0x1);
|
||||
while (nva_rd32(regspace->cnum, 0x409928));
|
||||
for (i = 0; i < addr; i+=4) {
|
||||
nva_wr32(regspace->cnum, 0x409928, 0x6);
|
||||
while (nva_rd32(regspace->cnum, 0x409928));
|
||||
}
|
||||
nva_wr32(regspace->cnum, 0x409928, 0x6);
|
||||
while (nva_rd32(regspace->cnum, 0x409928));
|
||||
*val = nva_rd32(regspace->cnum, 0x409918);
|
||||
return 0;
|
||||
case NVA_REGSPACE_XT:
|
||||
if (regspace->regsz != 4)
|
||||
return NVA_ERR_REGSZ;
|
||||
nva_wr32(regspace->cnum, 0x1700, 0x30);
|
||||
nva_wr32(regspace->cnum, 0x700004, addr);
|
||||
nva_wr32(regspace->cnum, 0x70000, 1);
|
||||
while (nva_rd32(regspace->cnum, 0x70000));
|
||||
nva_wr32(regspace->cnum, 0x700000, 1);
|
||||
while (nva_rd32(regspace->cnum, 0x700000));
|
||||
*val = nva_rd32(regspace->cnum, 0x700004);
|
||||
return 0;
|
||||
default:
|
||||
return NVA_ERR_NOSPC;
|
||||
}
|
||||
}
|
||||
|
||||
int nva_rstype(const char *name) {
|
||||
if (!strcmp(name, "bar0"))
|
||||
return NVA_REGSPACE_BAR0;
|
||||
if (!strcmp(name, "mmio"))
|
||||
return NVA_REGSPACE_BAR0;
|
||||
if (!strcmp(name, "bar1"))
|
||||
return NVA_REGSPACE_BAR1;
|
||||
if (!strcmp(name, "fb"))
|
||||
return NVA_REGSPACE_BAR1;
|
||||
if (!strcmp(name, "bar2"))
|
||||
return NVA_REGSPACE_BAR2;
|
||||
if (!strcmp(name, "bar3"))
|
||||
return NVA_REGSPACE_BAR2;
|
||||
if (!strcmp(name, "ramin"))
|
||||
return NVA_REGSPACE_BAR2;
|
||||
if (!strcmp(name, "iobar"))
|
||||
return NVA_REGSPACE_IOBAR;
|
||||
if (!strcmp(name, "rawmem"))
|
||||
return NVA_REGSPACE_RAWMEM;
|
||||
if (!strcmp(name, "rawio"))
|
||||
return NVA_REGSPACE_RAWIO;
|
||||
if (!strcmp(name, "pdac"))
|
||||
return NVA_REGSPACE_PDAC;
|
||||
if (!strcmp(name, "eeprom"))
|
||||
return NVA_REGSPACE_EEPROM;
|
||||
if (!strcmp(name, "cr"))
|
||||
return NVA_REGSPACE_VGA_CR;
|
||||
if (!strcmp(name, "sr"))
|
||||
return NVA_REGSPACE_VGA_SR;
|
||||
if (!strcmp(name, "gr"))
|
||||
return NVA_REGSPACE_VGA_GR;
|
||||
if (!strcmp(name, "ar"))
|
||||
return NVA_REGSPACE_VGA_AR;
|
||||
if (!strcmp(name, "cr"))
|
||||
return NVA_REGSPACE_VGA_CR;
|
||||
if (!strcmp(name, "vst"))
|
||||
return NVA_REGSPACE_VGA_ST;
|
||||
if (!strcmp(name, "dpram"))
|
||||
return NVA_REGSPACE_DPRAM;
|
||||
if (!strcmp(name, "pipe"))
|
||||
return NVA_REGSPACE_PIPE;
|
||||
if (!strcmp(name, "rdi"))
|
||||
return NVA_REGSPACE_RDI;
|
||||
if (!strcmp(name, "rdib"))
|
||||
return NVA_REGSPACE_RDIB;
|
||||
if (!strcmp(name, "vcomp_code"))
|
||||
return NVA_REGSPACE_VCOMP_CODE;
|
||||
if (!strcmp(name, "vcomp_reg"))
|
||||
return NVA_REGSPACE_VCOMP_REG;
|
||||
if (!strcmp(name, "macro_code"))
|
||||
return NVA_REGSPACE_MACRO_CODE;
|
||||
if (!strcmp(name, "xt"))
|
||||
return NVA_REGSPACE_XT;
|
||||
return NVA_REGSPACE_UNKNOWN;
|
||||
}
|
||||
|
||||
int nva_rsdefsz(struct nva_regspace *regspace) {
|
||||
switch (regspace->type) {
|
||||
case NVA_REGSPACE_BAR0:
|
||||
case NVA_REGSPACE_BAR1:
|
||||
case NVA_REGSPACE_BAR2:
|
||||
case NVA_REGSPACE_IOBAR:
|
||||
case NVA_REGSPACE_DPRAM:
|
||||
case NVA_REGSPACE_PIPE:
|
||||
case NVA_REGSPACE_RDI:
|
||||
case NVA_REGSPACE_RDIB:
|
||||
case NVA_REGSPACE_VCOMP_CODE:
|
||||
case NVA_REGSPACE_MACRO_CODE:
|
||||
case NVA_REGSPACE_XT:
|
||||
return 4;
|
||||
case NVA_REGSPACE_VCOMP_REG:
|
||||
return 8;
|
||||
default:
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
int nva_rsunitsz(struct nva_regspace *regspace) {
|
||||
switch (regspace->type) {
|
||||
case NVA_REGSPACE_DPRAM:
|
||||
return 4;
|
||||
case NVA_REGSPACE_RDI:
|
||||
case NVA_REGSPACE_RDIB:
|
||||
if (regspace->card->chipset.chipset == 0x17 || regspace->card->chipset.chipset == 0x18 || regspace->card->chipset.chipset == 0x1f) {
|
||||
return 4;
|
||||
}
|
||||
return 1;
|
||||
default:
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
char nva_rserrc(enum nva_err err) {
|
||||
switch (err) {
|
||||
case NVA_ERR_RANGE:
|
||||
return 'R';
|
||||
case NVA_ERR_REGSZ:
|
||||
return 'B';
|
||||
case NVA_ERR_NOSPC:
|
||||
return 'S';
|
||||
case NVA_ERR_MAP:
|
||||
return 'M';
|
||||
default:
|
||||
abort();
|
||||
}
|
||||
}
|
||||
|
||||
void nva_rsprint(struct nva_regspace *regspace, enum nva_err err, uint64_t val) {
|
||||
if (err) {
|
||||
int k;
|
||||
char ec = nva_rserrc(err);
|
||||
printf(" ");
|
||||
for (k = 0; k < regspace->regsz; k++)
|
||||
printf("%c%c", ec, ec);
|
||||
} else {
|
||||
switch (regspace->regsz) {
|
||||
case 1:
|
||||
printf (" %02"PRIx64, val);
|
||||
break;
|
||||
case 2:
|
||||
printf (" %04"PRIx64, val);
|
||||
break;
|
||||
case 4:
|
||||
printf (" %08"PRIx64, val);
|
||||
break;
|
||||
case 8:
|
||||
printf (" %016"PRIx64, val);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user