first commit
This commit is contained in:
Ole Algoritme
97
include/nva/gpu.c
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97
include/nva/gpu.c
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#include "gpu.h"
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const struct gpu gpu_list[] = {
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{ "NV1", 0, false, 0x8, true, 1, true, 0, false, 0, false, BUS_PCI, FB_NV1, GEN_NV1, },
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{ "NV3", 0, false, 0x18, true, 1, true, 0, false, 0, false, BUS_PCI, FB_NV3, GEN_NV3, },
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{ "NV3T", 0, false, 0x18, true, 1, true, 0, false, 0, false, BUS_PCI, FB_NV3T, GEN_NV3, },
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{ "NV4", 0, false, 0x20, true, 0, true, 0, false, 0, false, BUS_PCI, FB_NV4, GEN_NV4, },
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{ "NV5", 0, false, 0x28, true, 2, true, 0x2, true, 0x5, true, BUS_PCI, FB_NV5, GEN_NV4, },
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{ "NV6", 0, false, 0x2c, true, 2, true, 0x2, true, 0x5, true, BUS_PCI, FB_NV5, GEN_NV4, },
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{ "NVA", 0, false, 0xa0, true, 0, true, 0x2, true, -1, false, BUS_PCI, FB_NVA, GEN_NV4, },
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{ "NV10", 0x10, true, 0x100, true, 2, true, 0x2, true, 0x10, true, BUS_PCI, FB_NV10, GEN_CELSIUS, },
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{ "NV15", 0x15, true, 0x150, true, 2, true, 0x3, true, 0x15, true, BUS_PCI, FB_NV10, GEN_CELSIUS, },
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{ "NV1A", 0x1a, true, 0x1a0, true, 2, true, 0x3, true, 0x1a, true, BUS_PCI, FB_NV1A, GEN_CELSIUS, },
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{ "NV11", 0x11, true, 0x110, true, 2, true, 0x3, true, 0x11, true, BUS_PCI, FB_NV10, GEN_CELSIUS, },
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{ "NV17", 0x17, true, 0x170, true, 4, true, 0x4, true, 0x17, true, BUS_PCI, FB_NV10, GEN_CELSIUS, },
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{ "NV1F", 0x1f, true, 0x1f0, true, 4, true, 0x4, true, 0x1f, true, BUS_PCI, FB_NV1F, GEN_CELSIUS, },
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{ "NV18", 0x18, true, 0x180, true, 4, true, 0x4, true, 0x18, true, BUS_PCI, FB_NV10, GEN_CELSIUS, },
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{ "NV20", 0x20, true, 0x200, true, 2, true, 0x3, true, 0x20, true, BUS_PCI, FB_NV20, GEN_KELVIN, },
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{ "NV2A", 0x2a, true, 0x2a0, true, 2, true, 0, false, 0, false, BUS_PCI, FB_NV2A, GEN_KELVIN, },
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{ "NV25", 0x25, true, 0x250, true, 4, true, 0x4, true, 0x25, true, BUS_PCI, FB_NV25, GEN_KELVIN, },
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{ "NV28", 0x28, true, 0x280, true, 4, true, 0x4, true, 0x28, true, BUS_PCI, FB_NV25, GEN_KELVIN, },
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{ "NV30", 0x30, true, 0x300, true, 4, true, 0x4, true, 0x30, true, BUS_PCI, FB_NV30, GEN_RANKINE, },
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{ "NV35", 0x35, true, 0x330, true, 4, true, 0x4, true, 0x35, true, BUS_PCI, FB_NV35, GEN_RANKINE, },
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{ "NV31", 0x31, true, 0x310, true, 4, true, 0x4, true, 0x31, true, BUS_PCI, FB_NV31, GEN_RANKINE, },
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{ "NV36", 0x36, true, 0x340, true, 4, true, 0x4, true, 0x36, true, BUS_PCI, FB_NV36, GEN_RANKINE, },
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{ "NV34", 0x34, true, 0x320, true, 4, true, 0x4, true, 0x34, true, BUS_PCI, FB_NV10, GEN_RANKINE, },
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{ "NV40", 0x40, true, 0x40, true, 4, true, 0x5, true, 0x40, true, BUS_PCI, FB_NV40, GEN_CURIE, },
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{ "NV45", 0x45, true, 0x40, true, 4, true, 0x5, true, 0x40, true, BUS_PCI, FB_NV40, GEN_CURIE, },
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{ "NV41", 0x41, true, 0xc0, true, 4, true, 0x5, true, 0x41, true, BUS_PCIE, FB_NV41, GEN_CURIE, },
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{ "NV42", 0x42, true, 0xc0, true, 4, true, 0x5, true, 0x41, true, BUS_PCIE, FB_NV41, GEN_CURIE, },
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{ "NV43", 0x43, true, 0x140, true, 4, true, 0x5, true, 0x43, true, BUS_PCIE, FB_NV43, GEN_CURIE, },
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{ "NV44", 0x44, true, 0x160, true, 4, true, 0x5, true, 0x44, true, BUS_PCIE, FB_NV44, GEN_CURIE, },
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{ "NV44A", 0x4a, true, 0x220, true, 4, true, 0x5, true, 0x44, true, BUS_PCI, FB_NV44, GEN_CURIE, },
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{ "G70", 0x47, true, 0x90, true, 4, true, 0x5, true, 0x70, true, BUS_PCIE, FB_G70, GEN_CURIE, },
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{ "G72", 0x46, true, 0x1d0, true, 4, true, 0x5, true, 0x72, true, BUS_PCIE, FB_G72, GEN_CURIE, },
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{ "G71", 0x49, true, 0x290, true, 4, true, 0x5, true, 0x71, true, BUS_PCIE, FB_G70, GEN_CURIE, },
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{ "G73", 0x4b, true, 0x390, true, 4, true, 0x5, true, 0x73, true, BUS_PCIE, FB_G73, GEN_CURIE, },
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{ "C51", 0x4e, true, 0x240, true, 4, true, 0x5, true, 0x51, true, BUS_IGP, FB_C51, GEN_CURIE, },
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{ "MCP61", 0x4c, true, 0x3d0, true, 4, true, 0x5, true, 0x61, true, BUS_IGP, FB_MCP61, GEN_CURIE, },
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{ "MCP67", 0x67, true, 0x530, true, 4, true, 0x5, true, 0x67, true, BUS_IGP, FB_MCP61, GEN_CURIE, },
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{ "MCP68", 0x68, true, 0x530, true, 4, true, 0x5, true, 0x67, true, BUS_IGP, FB_MCP61, GEN_CURIE, },
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{ "MCP73", 0x63, true, 0x7e0, true, 4, true, 0x5, true, 0x73, true, BUS_IGP, FB_MCP61, GEN_CURIE, },
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{ "RSX", 0x4d, true, 0, false, 4, true, 0, false, 0, false, BUS_FLEX_IO, FB_G72, GEN_CURIE, },
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{ "G80", 0x50, true, 0x190, true, 4, true, 0x60, true, 0x80, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "G84", 0x84, true, 0x400, true, 4, true, 0x60, true, 0x84, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "G86", 0x86, true, 0x420, true, 4, true, 0x60, true, 0x86, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "G92", 0x92, true, 0x600, true, 5, true, 0x62, true, 0x92, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "G94", 0x94, true, 0x620, true, 5, true, 0x62, true, 0x94, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "G96", 0x96, true, 0x640, true, 5, true, 0x62, true, 0x94, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "G98", 0x98, true, 0x6e0, true, 5, true, 0x62, true, 0x98, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "G200", 0xa0, true, 0x5e0, true, 5, true, 0x62, true, 0x0, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "MCP77", 0xaa, true, 0x840, true, 5, true, 0x62, true, 0x77, true, BUS_IGP, FB_MCP77, GEN_TESLA, },
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{ "MCP79", 0xac, true, 0x860, true, 5, true, 0x62, true, 0x79, true, BUS_IGP, FB_MCP77, GEN_TESLA, },
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{ "GT215", 0xa3, true, 0xca0, true, 5, true, 0x70, true, 0x15, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "GT216", 0xa5, true, 0xa20, true, 5, true, 0x70, true, 0x16, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "GT218", 0xa8, true, 0xa60, true, 5, true, 0x70, true, 0x18, true, BUS_PCIE, FB_G80, GEN_TESLA, },
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{ "MCP89", 0xaf, true, 0x8a0, true, 5, true, 0x70, true, 0x89, true, BUS_IGP, FB_MCP77, GEN_TESLA, },
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{ "GF100", 0xc0, true, 0x6c0, true, 5, true, 0x70, true, 0x0, true, BUS_PCIE, FB_GF100, GEN_FERMI, },
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{ "GF104", 0xc4, true, 0xe20, true, 5, true, 0x70, true, 0x4, true, BUS_PCIE, FB_GF100, GEN_FERMI, },
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{ "GF114", 0xce, true, 0x1200, true, 5, true, 0x70, true, 0x24, true, BUS_PCIE, FB_GF100, GEN_FERMI, },
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{ "GF106", 0xc3, true, 0xdc0, true, 5, true, 0x70, true, 0x6, true, BUS_PCIE, FB_GF100, GEN_FERMI, },
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{ "GF116", 0xcf, true, 0x1240, true, 5, true, 0x70, true, 0x26, true, BUS_PCIE, FB_GF100, GEN_FERMI, },
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{ "GF108", 0xc1, true, 0xde0, true, 5, true, 0x70, true, 0x8, true, BUS_PCIE, FB_GF100, GEN_FERMI, },
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{ "GF110", 0xc8, true, 0x1080, true, 5, true, 0x70, true, 0x10, true, BUS_PCIE, FB_GF100, GEN_FERMI, },
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{ "GF119", 0xd9, true, 0x1040, true, 6, true, 0x75, true, 0x19, true, BUS_PCIE, FB_GF100, GEN_FERMI, },
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{ "GF117", 0xd7, true, 0x1140, true, 6, true, 0x75, true, -1, false, BUS_PCIE, FB_GF100, GEN_FERMI, },
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{ "GK104", 0xe4, true, 0x1180, true, 6, true, 0x80, true, 0x4, true, BUS_PCIE, FB_GF100, GEN_KEPLER, },
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{ "GK107", 0xe7, true, 0xfc0, true, 6, true, 0x80, true, 0x7, true, BUS_PCIE, FB_GF100, GEN_KEPLER, },
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{ "GK106", 0xe6, true, 0x11c0, true, 6, true, 0x80, true, 0x6, true, BUS_PCIE, FB_GF100, GEN_KEPLER, },
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{ "GK110", 0xf0, true, 0x1000, true, 6, true, 0x80, true, 0x10, true, BUS_PCIE, FB_GF100, GEN_KEPLER, },
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{ "GK110B", 0xf1, true, 0x1000, true, 6, true, 0x80, true, 0x80, true, BUS_PCIE, FB_GF100, GEN_KEPLER, },
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{ "GK210", -1, false, -1, false, 6, true, 0x80, true, -1, false, BUS_PCIE, FB_GF100, GEN_KEPLER, },
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{ "GK208", 0x108, true, 0x1280, true, 6, true, 0x80, true, 0x28, true, BUS_PCIE, FB_GF100, GEN_KEPLER, },
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{ "GK208B", 0x106, true, 0x1280, true, 6, true, 0x80, true, 0x28, true, BUS_PCIE, FB_GF100, GEN_KEPLER, },
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{ "GK20A", 0xea, true, 0, false, 6, true, 0, false, 0, false, BUS_TEGRA, FB_GK20A, GEN_KEPLER, },
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{ "GM107", 0x117, true, 0x1380, true, 6, true, 0x82, true, 0x7, true, BUS_PCIE, FB_GF100, GEN_MAXWELL, },
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{ "GM108", 0x118, true, 0x1340, true, 6, true, 0x82, true, 0x8, true, BUS_PCIE, FB_GF100, GEN_MAXWELL, },
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{ "GM204", 0x124, true, 0x13c0, true, 6, true, 0x84, true, 0x4, true, BUS_PCIE, FB_GF100, GEN_MAXWELL, },
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{ "GM200", 0x120, true, 0x17c0, true, 6, true, 0x84, true, 0x0, true, BUS_PCIE, FB_GF100, GEN_MAXWELL, },
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{ "GM206", 0x126, true, 0x1400, true, 6, true, 0x84, true, 0x6, true, BUS_PCIE, FB_GF100, GEN_MAXWELL, },
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{ "GM20B", 0x12b, true, 0, false, 6, true, 0, false, 0, false, BUS_TEGRA, FB_GK20A, GEN_MAXWELL, },
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{ "GP100", 0x130, true, 0x1580, true, 7, true, 0x86, true, 0x0, true, BUS_PCIE, FB_GF100, GEN_PASCAL, },
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{ "GP102", 0x132, true, 0x1b00, true, 7, true, 0x86, true, 0x2, true, BUS_PCIE, FB_GF100, GEN_PASCAL, },
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{ "GP104", 0x134, true, 0x1b80, true, 7, true, 0x86, true, 0x4, true, BUS_PCIE, FB_GF100, GEN_PASCAL, },
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{ "GP106", 0x136, true, 0x1c00, true, 7, true, 0x86, true, 0x6, true, BUS_PCIE, FB_GF100, GEN_PASCAL, },
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{ "GP107", 0x137, true, 0x1c80, true, 7, true, 0x86, true, 0x7, true, BUS_PCIE, FB_GF100, GEN_PASCAL, },
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{ "GP108", 0x138, true, 0x1d00, true, 7, true, 0x86, true, 0x8, true, BUS_PCIE, FB_GF100, GEN_PASCAL, },
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{ "GP10B", 0x13b, true, 0x10e5, true, 7, true, 0, false, 0, false, BUS_TEGRA, FB_GF100, GEN_PASCAL, },
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{ "GV100", 0x140, true, 0x1d80, true, 7, true, 0x88, true, 0x0, true, BUS_PCIE, FB_GF100, GEN_VOLTA, },
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{ "GV11B", 0x15b, true, 0, false, 7, true, 0, false, 0, false, BUS_TEGRA, FB_GF100, GEN_VOLTA, },
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{ "TU102", 0x162, true, 0x1e00, true, 7, true, 0x90, true, 0x2, true, BUS_PCIE, FB_GF100, GEN_TURING, },
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{ "TU104", 0x164, true, 0x1e80, true, 7, true, 0x90, true, 0x4, true, BUS_PCIE, FB_GF100, GEN_TURING, },
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{ "TU106", 0x166, true, 0x1f00, true, 7, true, 0x90, true, 0x6, true, BUS_PCIE, FB_GF100, GEN_TURING, },
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{ "TU116", 0x168, true, 0x2180, true, 7, true, 0x90, true, 0x16, true, BUS_PCIE, FB_GF100, GEN_TURING, },
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{ "TU117", 0x167, true, 0x1f80, true, 7, true, 0x90, true, 0x17, true, BUS_PCIE, FB_GF100, GEN_TURING, },
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};
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